SWDEV-408180 - Add a new hipMemcpyKind
Add hipMemcpyDeviceToDeviceNoCU to force a non blit copy path. This
helps in cases where an app may determine that CU may be busy and copies
with SDMA may be quicker.
Change-Id: I59b415dd8f6022c244e8d75f265464d5c635df1e
[ROCm/clr commit: f316a30e5d]
Αυτή η υποβολή περιλαμβάνεται σε:
@@ -379,7 +379,7 @@ hipError_t ihipMemcpyCommand(amd::Command*& command, void* dst, const void* src,
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size_t dOffset = 0;
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amd::Memory* dstMemory = getMemoryObject(dst, dOffset);
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amd::Device* queueDevice = &stream.device();
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amd::CopyMetadata copyMetadata(isAsync, amd::CopyMetadata::CopyEnginePreference::SDMA);
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amd::CopyMetadata copyMetadata(isAsync, amd::CopyMetadata::CopyEnginePreference::NONE);
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if ((srcMemory == nullptr) && (dstMemory != nullptr)) {
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hip::Stream* pStream = &stream;
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if (queueDevice != dstMemory->getContext().devices()[0]) {
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@@ -424,7 +424,6 @@ hipError_t ihipMemcpyCommand(amd::Command*& command, void* dst, const void* src,
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hip::Stream* pStream = &stream;
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if ((srcMemory->getContext().devices()[0] == dstMemory->getContext().devices()[0]) &&
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(queueDevice != srcMemory->getContext().devices()[0])) {
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copyMetadata.copyEnginePreference_ = amd::CopyMetadata::CopyEnginePreference::NONE;
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pStream = hip::getNullStream(srcMemory->getContext());
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amd::Command* cmd = stream.getLastQueuedCommand(true);
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if (cmd != nullptr) {
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@@ -449,6 +448,10 @@ hipError_t ihipMemcpyCommand(amd::Command*& command, void* dst, const void* src,
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}
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}
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}
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copyMetadata.copyEnginePreference_ = (kind == hipMemcpyDeviceToDeviceNoCU) ?
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amd::CopyMetadata::CopyEnginePreference::SDMA :
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amd::CopyMetadata::CopyEnginePreference::NONE;
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command = new amd::CopyMemoryCommand(*pStream, CL_COMMAND_COPY_BUFFER, waitList,
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*srcMemory->asBuffer(), *dstMemory->asBuffer(), sOffset, dOffset, sizeBytes,
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copyMetadata);
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@@ -2807,7 +2810,7 @@ hipError_t ihipMemcpy3D_validate(const hipMemcpy3DParms* p) {
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}
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}
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}
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if (p->kind < hipMemcpyHostToHost || p->kind > hipMemcpyDefault) {
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return hipErrorInvalidMemcpyDirection;
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}
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@@ -398,7 +398,7 @@ bool DmaBlitManager::copyBuffer(device::Memory& srcMemory, device::Memory& dstMe
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return HostBlitManager::copyBuffer(srcMemory, dstMemory, srcOrigin, dstOrigin, size, false,
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copyMetadata);
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} else {
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return hsaCopy(gpuMem(srcMemory), gpuMem(dstMemory), srcOrigin, dstOrigin, size);
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return hsaCopy(gpuMem(srcMemory), gpuMem(dstMemory), srcOrigin, dstOrigin, size, copyMetadata);
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}
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return true;
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@@ -638,7 +638,7 @@ bool DmaBlitManager::copyImage(device::Memory& srcMemory, device::Memory& dstMem
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// ================================================================================================
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bool DmaBlitManager::hsaCopy(const Memory& srcMemory, const Memory& dstMemory,
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const amd::Coord3D& srcOrigin, const amd::Coord3D& dstOrigin,
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const amd::Coord3D& size) const {
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const amd::Coord3D& size, amd::CopyMetadata copyMetadata) const {
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address src = reinterpret_cast<address>(srcMemory.getDeviceMemory());
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address dst = reinterpret_cast<address>(dstMemory.getDeviceMemory());
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@@ -684,10 +684,14 @@ bool DmaBlitManager::hsaCopy(const Memory& srcMemory, const Memory& dstMemory,
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uint32_t copyMask = 0;
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uint32_t freeEngineMask = 0;
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bool kUseRegularCopyApi = 0;
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bool forceSDMA = (copyMetadata.copyEnginePreference_ ==
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amd::CopyMetadata::CopyEnginePreference::SDMA);
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HwQueueEngine engine = HwQueueEngine::Unknown;
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// Determine engine and assign a copy mask for the new versatile ROCr API
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// If engine preferred is SDMA, assign the SdmaWrite path
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if ((srcAgent.handle == dev().getCpuAgent().handle) &&
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(dstAgent.handle != dev().getCpuAgent().handle)) {
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(dstAgent.handle != dev().getCpuAgent().handle) || forceSDMA) {
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engine = HwQueueEngine::SdmaWrite;
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copyMask = kUseRegularCopyApi ? 0 : dev().fetchSDMAMask(this, false);
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} else if ((srcAgent.handle != dev().getCpuAgent().handle) &&
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@@ -711,8 +715,8 @@ bool DmaBlitManager::hsaCopy(const Memory& srcMemory, const Memory& dstMemory,
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if (copyMask == 0) {
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// Check SDMA engine status
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status = hsa_amd_memory_copy_engine_status(dstAgent, srcAgent, &freeEngineMask);
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ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Query copy engine status %x, free_engine mask 0x%x",
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status, freeEngineMask);
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ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Query copy engine status %x, "
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"free_engine mask 0x%x", status, freeEngineMask);
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// Return a mask with the rightmost bit set
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copyMask = freeEngineMask - (freeEngineMask & (freeEngineMask - 1));
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gpu().setLastUsedSdmaEngine(copyMask);
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@@ -725,13 +729,14 @@ bool DmaBlitManager::hsaCopy(const Memory& srcMemory, const Memory& dstMemory,
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ClPrint(amd::LOG_DEBUG, amd::LOG_COPY,
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"HSA Async Copy on copy_engine=0x%x, dst=0x%zx, src=0x%zx, "
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"size=%ld, wait_event=0x%zx, completion_signal=0x%zx", copyEngine,
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dst, src, size[0], (wait_events.size() != 0) ? wait_events[0].handle : 0,
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"size=%ld, forceSDMA=%d, wait_event=0x%zx, completion_signal=0x%zx", copyEngine,
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dst, src, size[0], forceSDMA, (wait_events.size() != 0) ? wait_events[0].handle : 0,
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active.handle);
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status = hsa_amd_memory_async_copy_on_engine(dst, dstAgent, src, srcAgent,
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size[0], wait_events.size(),
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wait_events.data(), active, copyEngine, false);
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wait_events.data(), active, copyEngine,
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forceSDMA);
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} else {
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kUseRegularCopyApi = true;
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}
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@@ -2258,7 +2263,9 @@ bool KernelBlitManager::copyBuffer(device::Memory& srcMemory, device::Memory& ds
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bool useShaderCopyPath = setup_.disableHwlCopyBuffer_ ||
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(!srcMemory.isHostMemDirectAccess() &&
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!dstMemory.isHostMemDirectAccess() &&
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!(p2p || asan) && !ipcShared);
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!(p2p || asan) && !ipcShared &&
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!(copyMetadata.copyEnginePreference_ ==
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amd::CopyMetadata::CopyEnginePreference::SDMA));
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if (!useShaderCopyPath) {
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if (amd::IS_HIP) {
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@@ -230,7 +230,8 @@ class DmaBlitManager : public device::HostBlitManager {
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//! Assits in transferring data from Host to Local or vice versa
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//! taking into account the Hsail profile supported by Hsa Agent
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bool hsaCopy(const Memory& srcMemory, const Memory& dstMemory, const amd::Coord3D& srcOrigin,
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const amd::Coord3D& dstOrigin, const amd::Coord3D& size) const;
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const amd::Coord3D& dstOrigin, const amd::Coord3D& size,
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amd::CopyMetadata copyMetadata) const;
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const size_t MinSizeForPinnedTransfer;
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bool completeOperation_; //!< DMA blit manager must complete operation
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