libhsakmt: Limit control stack size on gfx1032

Add to workaround list.

Change-Id: I01855d3404203760507879db5af23455407ac450
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>


[ROCm/ROCR-Runtime commit: 0fc623e873]

projects/rocr-runtime/src/queues.c

@@ -449,7 +449,7 @@ static bool update_ctx_save_restore_size(uint32_t nodeid, struct queue *q)
 		q->ctl_stack_size = PAGE_ALIGN_UP(sizeof(HsaUserContextSaveAreaHeader)
 					+ ctl_stack_size);
 		if (q->dev_info->asic_family >= CHIP_NAVI10 &&
-			q->dev_info->asic_family <= CHIP_NAVY_FLOUNDER) {
+			q->dev_info->asic_family <= CHIP_DIMGREY_CAVEFISH) {
 			/* HW design limits control stack size to 0x7000.
 			 * This is insufficient for theoretical PM4 cases
 			 * but sufficient for AQL, limited by SPI events.