libhsakmt: Limit control stack size on gfx1032
Add to workaround list.
Change-Id: I01855d3404203760507879db5af23455407ac450
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
[ROCm/ROCR-Runtime commit: 0fc623e873]
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Jay Cornwall
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@@ -449,7 +449,7 @@ static bool update_ctx_save_restore_size(uint32_t nodeid, struct queue *q)
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q->ctl_stack_size = PAGE_ALIGN_UP(sizeof(HsaUserContextSaveAreaHeader)
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+ ctl_stack_size);
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if (q->dev_info->asic_family >= CHIP_NAVI10 &&
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q->dev_info->asic_family <= CHIP_NAVY_FLOUNDER) {
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q->dev_info->asic_family <= CHIP_DIMGREY_CAVEFISH) {
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/* HW design limits control stack size to 0x7000.
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* This is insufficient for theoretical PM4 cases
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* but sufficient for AQL, limited by SPI events.
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