P4 to Git Change 1201301 by skudchad@skudchad_test_win_opencl2 on 2015/10/19 19:19:44

SWDEV-77172 - IOMMUv2 changes for Windows 10
	- Pass the GPUVM offset to MonitoredFence GPUVA as well
	- Other minor changes for SVM

	ReviewBoardURL = http://ocltc.amd.com/reviews/r/8729/diff/

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp#148 edit

rocclr/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp

@@ -868,7 +868,7 @@ CALGSLDevice::resMapLocal(size_t&           pitch,
 {
     // No map really necessary if IOMMUv2 is being used, return the surface address directly
     // as CPU can write to it for Linear tiled surfaces only
-    if (m_adp->pAsicInfo->svmFineGrainSystem && mem->getAttribs().tiling <= GSL_MOA_TILING_LINEAR)
+    if (mem->getAttribs().isAllocSVM && mem->getAttribs().tiling <= GSL_MOA_TILING_LINEAR)
     {
         return (void*)mem->getImage(0)->surf.addr.getAddress();
     }
@@ -988,7 +988,7 @@ CALGSLDevice::resUnmapLocal(gslMemObject mem)
 {
     // No unmap necessary with IOMMUv2 as map operation directly returned the base surface System VA
     // which CPU can write to it for Linear tiled surfaces only
-    if (m_adp->pAsicInfo->svmFineGrainSystem && mem->getAttribs().tiling <= GSL_MOA_TILING_LINEAR)
+    if (mem->getAttribs().isAllocSVM && mem->getAttribs().tiling <= GSL_MOA_TILING_LINEAR)
     {
         return;
     }
@@ -1073,7 +1073,7 @@ CALGSLDevice::resMapRemote(
 {
     // No map really necessary if IOMMUv2 is being used, return the surface address directly
     // as CPU can write to it for Linear tiled surfaces only
-    if (m_adp->pAsicInfo->svmFineGrainSystem && mem->getAttribs().tiling <= GSL_MOA_TILING_LINEAR)
+    if (mem->getAttribs().isAllocSVM && mem->getAttribs().tiling <= GSL_MOA_TILING_LINEAR)
     {
         return (void*)mem->getImage(0)->surf.addr.getAddress();
     }
@@ -1090,7 +1090,7 @@ CALGSLDevice::resUnmapRemote(gslMemObject mem) const
 {
     // No unmap necessary with IOMMUv2 as map operation directly returned the base surface System VA
     // which CPU can write to it for Linear tiled surfaces only
-    if (m_adp->pAsicInfo->svmFineGrainSystem && mem->getAttribs().tiling <= GSL_MOA_TILING_LINEAR)
+    if (mem->getAttribs().isAllocSVM && mem->getAttribs().tiling <= GSL_MOA_TILING_LINEAR)
     {
         return;
     }