Support cache type in cache info

Add the cache type to the cache info.

Change-Id: Ic13ca9640b65d2b414eeebe7b884530f2036aac8

example/amd_smi_drm_example.cc

@@ -312,9 +312,10 @@ int main() {
             CHK_AMDSMI_RET(ret)
             printf("    Output of amdsmi_get_gpu_cache_info:\n");
             for (unsigned int i = 0 ; i < cache_info.num_cache_types; i++) {
-                printf("\tCache Level: %d, Cache Size: %d KB\n",
+                printf("\tCache Level: %d, Cache Size: %d KB, Cache type: 0x%x\n",
                     cache_info.cache[i].cache_level,
-                    cache_info.cache[i].cache_size_kb);
+                    cache_info.cache[i].cache_size_kb,
+                    cache_info.cache[i].flags);
             }
 
             // Get power measure

include/amd_smi/amdsmi.h

@@ -455,11 +455,23 @@ typedef struct {
   uint32_t reserved[16];
 } amdsmi_vbios_info_t;
 
+/**
+ * @brief cache flags
+ */
+typedef enum {
+  CACHE_FLAGS_ENABLED = 0x00000001,
+  CACHE_FLAGS_DATA_CACHE = 0x00000002,
+  CACHE_FLAGS_INST_CACHE = 0x00000004,
+  CACHE_FLAGS_CPU_CACHE = 0x00000008,
+  CACHE_FLAGS_SIMD_CACHE = 0x00000010,
+} amdsmi_cache_flags_type_t;
+
 typedef struct {
   uint32_t num_cache_types;
   struct cache_ {
     uint32_t cache_size_kb; /* In KB */
     uint32_t cache_level;
+    uint32_t flags;  // amdsmi_cache_flags_type_t which is a bitmask
     uint32_t reserved[3];
   } cache[AMDSMI_MAX_CACHE_TYPES];
   uint32_t reserved[15];

rocm_smi/include/rocm_smi/rocm_smi.h

@@ -864,6 +864,14 @@ typedef struct {
   struct {
     uint32_t cache_size_kb; /* In KB */
     uint32_t cache_level;
+    /* 
+    HSA_CACHE_TYPE_DATA     0x00000001
+    HSA_CACHE_TYPE_INSTRUCTION  0x00000002
+    HSA_CACHE_TYPE_CPU      0x00000004
+    HSA_CACHE_TYPE_HSACU        0x00000008
+    so HSA_CACHE_TYPE_DATA|HSA_CACHE_TYPE_HSACU == 9
+    */
+    uint32_t flags;
   } cache[RSMI_MAX_CACHE_TYPES];
 } rsmi_gpu_cache_info_t;
 /// \cond Ignore in docs.

rocm_smi/src/rocm_smi_kfd.cc

@@ -926,10 +926,15 @@ int KFDNode::get_cache_info(rsmi_gpu_cache_info_t *info) {
       int cache_level = std::stoi(level);
       if (cache_level < 0 ) continue;
 
+      std::string type = get_properties_from_file(prop_file, "type ");
+      int cache_type = std::stoi(type);
+      if (cache_type <= 0) continue;
+
       // only count once
       bool is_count_already = false;
       for (unsigned int i=0; i < info->num_cache_types; i++) {
-        if (info->cache->cache_level == static_cast<uint32_t>(cache_level)) {
+        if (info->cache[i].cache_level == static_cast<uint32_t>(cache_level) &&
+            info->cache[i].flags == static_cast<uint32_t>(cache_type)) {
           is_count_already = true;
           break;
         }
@@ -940,8 +945,10 @@ int KFDNode::get_cache_info(rsmi_gpu_cache_info_t *info) {
       std::string size = get_properties_from_file(prop_file, "size ");
       int cache_size = std::stoi(size);
       if (cache_size <= 0) continue;
+
       info->cache[info->num_cache_types].cache_level = cache_level;
       info->cache[info->num_cache_types].cache_size_kb = cache_size;
+      info->cache[info->num_cache_types].flags = cache_type;
       info->num_cache_types++;
     } catch (...) {
       continue;

src/amd_smi/amd_smi.cc

@@ -510,12 +510,29 @@ amdsmi_status_t amdsmi_get_gpu_cache_info(
                     processor_handle, &rsmi_info);
     if (status != AMDSMI_STATUS_SUCCESS)
         return status;
+    // Sysfs cache type
+    #define  HSA_CACHE_TYPE_DATA     0x00000001
+    #define  HSA_CACHE_TYPE_INSTRUCTION  0x00000002
+    #define  HSA_CACHE_TYPE_CPU      0x00000004
+    #define  HSA_CACHE_TYPE_HSACU    0x00000008
 
     info->num_cache_types = rsmi_info.num_cache_types;
     for (unsigned int i =0; i < rsmi_info.num_cache_types; i++) {
         info->cache[i].cache_size_kb = rsmi_info.cache[i].cache_size_kb;
         info->cache[i].cache_level = rsmi_info.cache[i].cache_level;
+        // convert from sysfs type to CRAT type(HSA Cache Affinity type)
+        info->cache[i].flags = 0;
+        if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_DATA)
+            info->cache[i].flags |= CACHE_FLAGS_DATA_CACHE;
+        if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_INSTRUCTION)
+            info->cache[i].flags |= CACHE_FLAGS_INST_CACHE;
+        if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_CPU)
+            info->cache[i].flags |= CACHE_FLAGS_CPU_CACHE;
+        if (rsmi_info.cache[i].flags & HSA_CACHE_TYPE_HSACU)
+            info->cache[i].flags |= CACHE_FLAGS_SIMD_CACHE;
     }
+
+
     return AMDSMI_STATUS_SUCCESS;
 }