Fix clang compile warnings

Change-Id: Iea9afc3d998a6c5db28af6c7b54939960b11ae95


[ROCm/ROCR-Runtime commit: 3ee6c9b0e2]
Αυτή η υποβολή περιλαμβάνεται σε:
David Yat Sin
2023-07-31 22:04:40 +00:00
γονέας 3e286607ca
υποβολή 590cac0321
11 αρχεία άλλαξαν με 108 προσθήκες και 110 διαγραφές
@@ -114,8 +114,8 @@ class BlitKernel : public core::Blit {
virtual uint64_t PendingBytes() override;
void GangLeader(bool gang_leader) {}
bool GangLeader() const { return false; }
void GangLeader(bool gang_leader) override {}
bool GangLeader() const override { return false; }
private:
union KernelArgs {
@@ -145,8 +145,8 @@ class BlitSdma : public BlitSdmaBase {
virtual hsa_status_t EnableProfiling(bool enable) override;
virtual uint64_t PendingBytes() override;
void GangLeader(bool gang_leader) { gang_leader_ = gang_leader; }
bool GangLeader() const { return gang_leader_; }
void GangLeader(bool gang_leader) override { gang_leader_ = gang_leader; }
bool GangLeader() const override { return gang_leader_; }
private:
/// @brief Acquires the address into queue buffer where a new command
@@ -70,8 +70,6 @@
namespace rocr {
namespace AMD {
// Queue::amd_queue_ is cache-aligned for performance.
const uint32_t kAmdQueueAlignBytes = 0x40;
HsaEvent* AqlQueue::queue_event_ = nullptr;
std::atomic<uint32_t> AqlQueue::queue_count_(0);
@@ -1002,43 +1000,43 @@ bool AqlQueue::ExceptionHandler(hsa_signal_value_t error_code, void* arg) {
};
static const queue_error_t QueueErrors[] = {
// EC_QUEUE_WAVE_ABORT
1, HSA_STATUS_ERROR_EXCEPTION,
{ 1, HSA_STATUS_ERROR_EXCEPTION },
// EC_QUEUE_WAVE_TRAP
2, HSA_STATUS_ERROR_EXCEPTION,
{ 2, HSA_STATUS_ERROR_EXCEPTION },
// EC_QUEUE_WAVE_MATH_ERROR
3, HSA_STATUS_ERROR_EXCEPTION,
{ 3, HSA_STATUS_ERROR_EXCEPTION },
// EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION
4, (hsa_status_t)HSA_STATUS_ERROR_ILLEGAL_INSTRUCTION,
{ 4, (hsa_status_t)HSA_STATUS_ERROR_ILLEGAL_INSTRUCTION },
// EC_QUEUE_WAVE_MEMORY_VIOLATION
5, (hsa_status_t)HSA_STATUS_ERROR_MEMORY_FAULT,
{ 5, (hsa_status_t)HSA_STATUS_ERROR_MEMORY_FAULT },
// EC_QUEUE_WAVE_APERTURE_VIOLATION
6, (hsa_status_t)HSA_STATUS_ERROR_MEMORY_APERTURE_VIOLATION,
{ 6, (hsa_status_t)HSA_STATUS_ERROR_MEMORY_APERTURE_VIOLATION },
// EC_QUEUE_PACKET_DISPATCH_DIM_INVALID
16, HSA_STATUS_ERROR_INCOMPATIBLE_ARGUMENTS,
{ 16, HSA_STATUS_ERROR_INCOMPATIBLE_ARGUMENTS },
// EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID
17, HSA_STATUS_ERROR_INVALID_ALLOCATION,
{ 17, HSA_STATUS_ERROR_INVALID_ALLOCATION },
// EC_QUEUE_PACKET_DISPATCH_CODE_INVALID
18, HSA_STATUS_ERROR_INVALID_CODE_OBJECT,
{ 18, HSA_STATUS_ERROR_INVALID_CODE_OBJECT },
// EC_QUEUE_PACKET_UNSUPPORTED
20, HSA_STATUS_ERROR_INVALID_PACKET_FORMAT,
{ 20, HSA_STATUS_ERROR_INVALID_PACKET_FORMAT },
// EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID
21, HSA_STATUS_ERROR_INVALID_ARGUMENT,
{ 21, HSA_STATUS_ERROR_INVALID_ARGUMENT },
// EC_QUEUE_PACKET_DISPATCH_REGISTER_SIZE_INVALID
22, HSA_STATUS_ERROR_INVALID_ISA,
{ 22, HSA_STATUS_ERROR_INVALID_ISA },
// EC_QUEUE_PACKET_VENDOR_UNSUPPORTED
23, HSA_STATUS_ERROR_INVALID_PACKET_FORMAT,
{ 23, HSA_STATUS_ERROR_INVALID_PACKET_FORMAT },
// EC_QUEUE_PREEMPTION_ERROR
31, HSA_STATUS_ERROR,
{ 31, HSA_STATUS_ERROR },
// EC_DEVICE_MEMORY_VIOLATION
33, (hsa_status_t)HSA_STATUS_ERROR_MEMORY_APERTURE_VIOLATION,
{ 33, (hsa_status_t)HSA_STATUS_ERROR_MEMORY_APERTURE_VIOLATION },
// EC_DEVICE_RAS_ERROR
34, HSA_STATUS_ERROR,
{ 34, HSA_STATUS_ERROR },
// EC_DEVICE_FATAL_HALT
35, HSA_STATUS_ERROR,
{ 35, HSA_STATUS_ERROR },
// EC_DEVICE_NEW
36, HSA_STATUS_ERROR,
{ 36, HSA_STATUS_ERROR },
// EC_PROCESS_DEVICE_REMOVE
50, HSA_STATUS_ERROR};
{ 50, HSA_STATUS_ERROR }};
AqlQueue* queue = (AqlQueue*)arg;
hsa_status_t errorCode = HSA_STATUS_ERROR;
@@ -287,7 +287,7 @@ const core::MemoryRegion* RegionMemory::AgentLocal(hsa_agent_t agent, bool is_co
std::find_if(amd_agent->regions().begin(), amd_agent->regions().end(),
[&](const core::MemoryRegion* region) {
const AMD::MemoryRegion* amd_region = (const AMD::MemoryRegion*)region;
return amd_region->IsLocalMemory() & (!amd_region->fine_grain());
return amd_region->IsLocalMemory() && (!amd_region->fine_grain());
});
return agent_local_region == amd_agent->regions().end() ? nullptr : *agent_local_region;
}
@@ -85,7 +85,7 @@ namespace image {
{RW, 4, FMT_32, TYPE_UINT},
{RW, 2, FMT_16, TYPE_FLOAT},
{RW, 4, FMT_32, TYPE_FLOAT}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RX
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RX
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_RG
{RW, 2, FMT_8_8, TYPE_SNORM},
{RW, 4, FMT_16_16, TYPE_SNORM},
@@ -103,7 +103,7 @@ namespace image {
{RW, 8, FMT_32_32, TYPE_UINT},
{RW, 4, FMT_16_16, TYPE_FLOAT},
{RW, 8, FMT_32_32, TYPE_FLOAT}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGX
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGX
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_RA
{RW, 2, FMT_8_8, TYPE_SNORM},
{RW, 4, FMT_16_16, TYPE_SNORM},
@@ -138,7 +138,7 @@ namespace image {
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA
{RW, 4, FMT_8_8_8_8, TYPE_SNORM},
{RW, 8, FMT_16_16_16_16, TYPE_SNORM},
@@ -190,9 +190,9 @@ namespace image {
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA
{0, 0, 0, 0},
{0, 0, 0, 0},
@@ -210,7 +210,7 @@ namespace image {
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY
{RW, 1, FMT_8, TYPE_SNORM},
{RW, 2, FMT_16, TYPE_SNORM},
@@ -263,7 +263,7 @@ namespace image {
{0, 0, 0, 0},
{0, 0, 0, 0},
{ROWO, 4, FMT_32, TYPE_FLOAT}},
{0} // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL
{} // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL
};
ImageProperty ImageLutGfx11::MapFormat(const hsa_ext_image_format_t& format,
@@ -92,7 +92,7 @@ const ImageProperty ImageLutKv::kPropLut_[ORDER_COUNT][TYPE_COUNT] = {
{RW, 4, FMT_32, TYPE_UINT},
{RW, 2, FMT_16, TYPE_FLOAT},
{RW, 4, FMT_32, TYPE_FLOAT}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RX
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RX
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_RG
{RW, 2, FMT_8_8, TYPE_SNORM},
{RW, 4, FMT_16_16, TYPE_SNORM},
@@ -110,7 +110,7 @@ const ImageProperty ImageLutKv::kPropLut_[ORDER_COUNT][TYPE_COUNT] = {
{RW, 8, FMT_32_32, TYPE_UINT},
{RW, 4, FMT_16_16, TYPE_FLOAT},
{RW, 8, FMT_32_32, TYPE_FLOAT}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGX
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGX
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_RA
{RW, 2, FMT_8_8, TYPE_SNORM},
{RW, 4, FMT_16_16, TYPE_SNORM},
@@ -145,7 +145,7 @@ const ImageProperty ImageLutKv::kPropLut_[ORDER_COUNT][TYPE_COUNT] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA
{RW, 4, FMT_8_8_8_8, TYPE_SNORM},
{RW, 8, FMT_16_16_16_16, TYPE_SNORM},
@@ -197,9 +197,9 @@ const ImageProperty ImageLutKv::kPropLut_[ORDER_COUNT][TYPE_COUNT] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA
{0, 0, 0, 0},
{0, 0, 0, 0},
@@ -217,7 +217,7 @@ const ImageProperty ImageLutKv::kPropLut_[ORDER_COUNT][TYPE_COUNT] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}},
{0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA
{}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA
{ // HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY
{RW, 1, FMT_8, TYPE_SNORM},
{RW, 2, FMT_16, TYPE_SNORM},
@@ -270,7 +270,7 @@ const ImageProperty ImageLutKv::kPropLut_[ORDER_COUNT][TYPE_COUNT] = {
{0, 0, 0, 0},
{0, 0, 0, 0},
{ROWO, 4, FMT_32, TYPE_FLOAT}},
{0} // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL
{} // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL
};
const Swizzle ImageLutKv::kSwizzleLut_[ORDER_COUNT] = {
@@ -65,25 +65,24 @@ ImageManagerAi::ImageManagerAi() : ImageManagerKv() {}
ImageManagerAi::~ImageManagerAi() {}
static_assert(sizeof(SQ_BUF_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD3) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD0)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD1)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD2)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD3)
static_assert(sizeof(SQ_IMG_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD3) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD4) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD5) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD6) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD7) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD3) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD0)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD1)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD2)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD3)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD4)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD5)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD6)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD7)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD0)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD1)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD2)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD3)
hsa_status_t ImageManagerAi::CalculateImageSizeAndAlignment(
hsa_agent_t component, const hsa_ext_image_descriptor_t& desc,
@@ -125,8 +124,6 @@ hsa_status_t ImageManagerAi::CalculateImageSizeAndAlignment(
return HSA_STATUS_SUCCESS;
}
static const uint64_t kLimitSystem = 1ULL << 48;
bool ImageManagerAi::IsLocalMemory(const void* address) const {
return true;
}
@@ -60,24 +60,24 @@
namespace rocr {
namespace image {
static_assert(sizeof(SQ_BUF_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD3) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD0)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD1)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD2)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD3)
static_assert(sizeof(SQ_IMG_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD3) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD4) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD5) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD6) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD7) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD0)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD1)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD2)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD3)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD4)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD5)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD6)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD7)
static_assert(sizeof(SQ_IMG_SAMP_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD3) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD0)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD1)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD2)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD3)
//-----------------------------------------------------------------------------
// Workaround switch to combined format/type codes and missing gfx11
@@ -63,24 +63,24 @@
namespace rocr {
namespace image {
static_assert(sizeof(SQ_BUF_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD3) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD0)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD1)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD2)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD3)
static_assert(sizeof(SQ_IMG_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD3) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD4) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD5) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD6) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD7) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD0)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD1)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD2)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD3)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD4)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD5)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD6)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD7)
static_assert(sizeof(SQ_IMG_SAMP_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD3) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD0)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD1)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD2)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD3)
ImageManagerKv::ImageManagerKv() : ImageManager() {}
@@ -127,7 +127,7 @@ hsa_status_t ImageManagerKv::Initialize(hsa_agent_t agent_handle) {
addr_create_input.chipFamily = family_type_;
addr_create_input.chipRevision = 0; // TODO(bwicakso): find how to get this.
ADDR_CREATE_FLAGS create_flags = {0};
ADDR_CREATE_FLAGS create_flags = {};
create_flags.value = 0;
create_flags.useTileIndex = 1;
addr_create_input.createFlags = create_flags;
@@ -60,24 +60,24 @@
namespace rocr {
namespace image {
static_assert(sizeof(SQ_BUF_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD3) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD0)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD1)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD2)
ASSERT_SIZE_UINT32(SQ_BUF_RSRC_WORD3)
static_assert(sizeof(SQ_IMG_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD3) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD4) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD5) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD6) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD7) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD0)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD1)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD2)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD3)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD4)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD5)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD6)
ASSERT_SIZE_UINT32(SQ_IMG_RSRC_WORD7)
static_assert(sizeof(SQ_IMG_SAMP_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD3) == sizeof(uint32_t));
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD0)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD1)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD2)
ASSERT_SIZE_UINT32(SQ_IMG_SAMP_WORD3)
//-----------------------------------------------------------------------------
// Workaround switch to combined format/type codes and missing gfx10
@@ -66,6 +66,9 @@ namespace image {
#define MULTILINE(...) # __VA_ARGS__
#define ASSERT_SIZE_UINT32(desc) \
static_assert(sizeof(desc) == sizeof(uint32_t), #desc " size should be 32-bits");
} // namespace image
} // namespace rocr