Bring AMDHSAKernelDescriptor.h in sync with llvm
Change-Id: Icd35100ad4d7eb8638786d306ecfbbb1c8842db1
Цей коміт міститься в:
Konstantin Zhuravlyov
зафіксовано
Jonathan Kim
Jonathan Kim
джерело
d77cc854ff
коміт
5a49b4d17f
@@ -117,8 +117,11 @@ enum : int32_t {
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COMPUTE_PGM_RSRC1(ENABLE_IEEE_MODE, 23, 1),
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COMPUTE_PGM_RSRC1(BULKY, 24, 1),
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COMPUTE_PGM_RSRC1(CDBG_USER, 25, 1),
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COMPUTE_PGM_RSRC1(FP16_OVFL, 26, 1), // GFX9+
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COMPUTE_PGM_RSRC1(RESERVED0, 27, 5),
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COMPUTE_PGM_RSRC1(FP16_OVFL, 26, 1), // GFX9+
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COMPUTE_PGM_RSRC1(RESERVED0, 27, 2),
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COMPUTE_PGM_RSRC1(WGP_MODE, 29, 1), // GFX10+
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COMPUTE_PGM_RSRC1(MEM_ORDERED, 30, 1), // GFX10+
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COMPUTE_PGM_RSRC1(FWD_PROGRESS, 31, 1), // GFX10+
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};
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#undef COMPUTE_PGM_RSRC1
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@@ -126,7 +129,7 @@ enum : int32_t {
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#define COMPUTE_PGM_RSRC2(NAME, SHIFT, WIDTH) \
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AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC2_ ## NAME, SHIFT, WIDTH)
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enum : int32_t {
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COMPUTE_PGM_RSRC2(ENABLE_SGPR_PRIVATE_SEGMENT_WAVEFRONT_OFFSET, 0, 1),
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COMPUTE_PGM_RSRC2(ENABLE_PRIVATE_SEGMENT, 0, 1),
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COMPUTE_PGM_RSRC2(USER_SGPR_COUNT, 1, 5),
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COMPUTE_PGM_RSRC2(ENABLE_TRAP_HANDLER, 6, 1),
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COMPUTE_PGM_RSRC2(ENABLE_SGPR_WORKGROUP_ID_X, 7, 1),
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@@ -148,6 +151,32 @@ enum : int32_t {
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};
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#undef COMPUTE_PGM_RSRC2
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// Compute program resource register 3 for GFX90A+. Must match hardware
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// definition.
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#define COMPUTE_PGM_RSRC3_GFX90A(NAME, SHIFT, WIDTH) \
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AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC3_GFX90A_ ## NAME, SHIFT, WIDTH)
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enum : int32_t {
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COMPUTE_PGM_RSRC3_GFX90A(ACCUM_OFFSET, 0, 6),
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COMPUTE_PGM_RSRC3_GFX90A(RESERVED0, 6, 10),
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COMPUTE_PGM_RSRC3_GFX90A(TG_SPLIT, 16, 1),
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COMPUTE_PGM_RSRC3_GFX90A(RESERVED1, 17, 15),
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};
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#undef COMPUTE_PGM_RSRC3_GFX90A
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// Compute program resource register 3 for GFX10+. Must match hardware
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// definition.
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#define COMPUTE_PGM_RSRC3_GFX10_PLUS(NAME, SHIFT, WIDTH) \
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AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC3_GFX10_PLUS_ ## NAME, SHIFT, WIDTH)
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enum : int32_t {
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COMPUTE_PGM_RSRC3_GFX10_PLUS(SHARED_VGPR_COUNT, 0, 4), // GFX10+
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COMPUTE_PGM_RSRC3_GFX10_PLUS(INST_PREF_SIZE, 4, 6), // GFX11+
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COMPUTE_PGM_RSRC3_GFX10_PLUS(TRAP_ON_START, 10, 1), // GFX11+
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COMPUTE_PGM_RSRC3_GFX10_PLUS(TRAP_ON_END, 11, 1), // GFX11+
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COMPUTE_PGM_RSRC3_GFX10_PLUS(RESERVED0, 12, 19),
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COMPUTE_PGM_RSRC3_GFX10_PLUS(IMAGE_OP, 31, 1), // GFX11+
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};
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#undef COMPUTE_PGM_RSRC3_GFX10_PLUS
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// Kernel code properties. Must be kept backwards compatible.
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#define KERNEL_CODE_PROPERTY(NAME, SHIFT, WIDTH) \
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AMDHSA_BITS_ENUM_ENTRY(KERNEL_CODE_PROPERTY_ ## NAME, SHIFT, WIDTH)
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@@ -159,7 +188,9 @@ enum : int32_t {
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KERNEL_CODE_PROPERTY(ENABLE_SGPR_DISPATCH_ID, 4, 1),
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KERNEL_CODE_PROPERTY(ENABLE_SGPR_FLAT_SCRATCH_INIT, 5, 1),
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KERNEL_CODE_PROPERTY(ENABLE_SGPR_PRIVATE_SEGMENT_SIZE, 6, 1),
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KERNEL_CODE_PROPERTY(RESERVED0, 7, 9),
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KERNEL_CODE_PROPERTY(RESERVED0, 7, 3),
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KERNEL_CODE_PROPERTY(ENABLE_WAVEFRONT_SIZE32, 10, 1), // GFX10+
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KERNEL_CODE_PROPERTY(RESERVED1, 11, 5),
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};
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#undef KERNEL_CODE_PROPERTY
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@@ -170,46 +201,61 @@ struct kernel_descriptor_t {
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uint32_t kernarg_size;
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uint8_t reserved0[4];
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int64_t kernel_code_entry_byte_offset;
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uint8_t reserved1[24];
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uint8_t reserved1[20];
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uint32_t compute_pgm_rsrc3; // GFX10+ and GFX90A+
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uint32_t compute_pgm_rsrc1;
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uint32_t compute_pgm_rsrc2;
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uint16_t kernel_code_properties;
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uint8_t reserved2[6];
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};
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enum : uint32_t {
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GROUP_SEGMENT_FIXED_SIZE_OFFSET = 0,
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PRIVATE_SEGMENT_FIXED_SIZE_OFFSET = 4,
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KERNARG_SIZE_OFFSET = 8,
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RESERVED0_OFFSET = 12,
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KERNEL_CODE_ENTRY_BYTE_OFFSET_OFFSET = 16,
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RESERVED1_OFFSET = 24,
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COMPUTE_PGM_RSRC3_OFFSET = 44,
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COMPUTE_PGM_RSRC1_OFFSET = 48,
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COMPUTE_PGM_RSRC2_OFFSET = 52,
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KERNEL_CODE_PROPERTIES_OFFSET = 56,
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RESERVED2_OFFSET = 58,
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};
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static_assert(
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sizeof(kernel_descriptor_t) == 64,
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"invalid size for kernel_descriptor_t");
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static_assert(
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offsetof(kernel_descriptor_t, group_segment_fixed_size) == 0,
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"invalid offset for group_segment_fixed_size");
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static_assert(
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offsetof(kernel_descriptor_t, private_segment_fixed_size) == 4,
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"invalid offset for private_segment_fixed_size");
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static_assert(
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offsetof(kernel_descriptor_t, kernarg_size) == 8,
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"invalid offset for kernarg_size");
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static_assert(
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offsetof(kernel_descriptor_t, reserved0) == 12,
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"invalid offset for reserved0");
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static_assert(
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offsetof(kernel_descriptor_t, kernel_code_entry_byte_offset) == 16,
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"invalid offset for kernel_code_entry_byte_offset");
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static_assert(
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offsetof(kernel_descriptor_t, reserved1) == 24,
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"invalid offset for reserved1");
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static_assert(
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offsetof(kernel_descriptor_t, compute_pgm_rsrc1) == 48,
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"invalid offset for compute_pgm_rsrc1");
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static_assert(
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offsetof(kernel_descriptor_t, compute_pgm_rsrc2) == 52,
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"invalid offset for compute_pgm_rsrc2");
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static_assert(
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offsetof(kernel_descriptor_t, kernel_code_properties) == 56,
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"invalid offset for kernel_code_properties");
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static_assert(
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offsetof(kernel_descriptor_t, reserved2) == 58,
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"invalid offset for reserved2");
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static_assert(offsetof(kernel_descriptor_t, group_segment_fixed_size) ==
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GROUP_SEGMENT_FIXED_SIZE_OFFSET,
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"invalid offset for group_segment_fixed_size");
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static_assert(offsetof(kernel_descriptor_t, private_segment_fixed_size) ==
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PRIVATE_SEGMENT_FIXED_SIZE_OFFSET,
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"invalid offset for private_segment_fixed_size");
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static_assert(offsetof(kernel_descriptor_t, kernarg_size) ==
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KERNARG_SIZE_OFFSET,
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"invalid offset for kernarg_size");
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static_assert(offsetof(kernel_descriptor_t, reserved0) == RESERVED0_OFFSET,
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"invalid offset for reserved0");
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static_assert(offsetof(kernel_descriptor_t, kernel_code_entry_byte_offset) ==
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KERNEL_CODE_ENTRY_BYTE_OFFSET_OFFSET,
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"invalid offset for kernel_code_entry_byte_offset");
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static_assert(offsetof(kernel_descriptor_t, reserved1) == RESERVED1_OFFSET,
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"invalid offset for reserved1");
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static_assert(offsetof(kernel_descriptor_t, compute_pgm_rsrc3) ==
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COMPUTE_PGM_RSRC3_OFFSET,
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"invalid offset for compute_pgm_rsrc3");
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static_assert(offsetof(kernel_descriptor_t, compute_pgm_rsrc1) ==
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COMPUTE_PGM_RSRC1_OFFSET,
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"invalid offset for compute_pgm_rsrc1");
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static_assert(offsetof(kernel_descriptor_t, compute_pgm_rsrc2) ==
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COMPUTE_PGM_RSRC2_OFFSET,
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"invalid offset for compute_pgm_rsrc2");
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static_assert(offsetof(kernel_descriptor_t, kernel_code_properties) ==
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KERNEL_CODE_PROPERTIES_OFFSET,
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"invalid offset for kernel_code_properties");
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static_assert(offsetof(kernel_descriptor_t, reserved2) == RESERVED2_OFFSET,
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"invalid offset for reserved2");
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} // end namespace amdhsa
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} // end namespace llvm
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