kfdtest: Add macros to simplify instr differences
Makes use of macros to simplify shader code with instruction-level differences depending on GFX version. These macros are extensible and are prepended to every shader so that they are usable everywhere. This patch introduces three macros used within IterateIsa and ReadMemoryIsa shaders. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Change-Id: If954e1b6d2027e9f55bf7e99bd9df2668d1da524
Este commit está contenido en:
Graham Sider
cometido por
Harish Kasiviswanathan
Harish Kasiviswanathan
padre
b2b54dffe6
commit
5ceb35f428
@@ -21,6 +21,41 @@
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*
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*/
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/**
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* Macros
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*/
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/* Create macro for portable v_add_co_u32, v_add_co_ci_u32,
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* and v_cmp_lt_u32
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*/
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#define SHADER_MACROS \
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" .text\n"\
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" .macro V_ADD_CO_U32 vdst, src0, vsrc1\n"\
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" .if (.amdgcn.gfx_generation_number >= 10)\n"\
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" v_add_co_u32 \\vdst, vcc_lo, \\src0, \\vsrc1\n"\
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" .elseif (.amdgcn.gfx_generation_number >= 9)\n"\
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" v_add_co_u32 \\vdst, vcc, \\src0, \\vsrc1\n"\
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" .else\n"\
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" v_add_u32 \\vdst, vcc, \\src0, \\vsrc1\n"\
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" .endif\n"\
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" .endm\n"\
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" .macro V_ADD_CO_CI_U32 vdst, src0, vsrc1\n"\
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" .if (.amdgcn.gfx_generation_number >= 10)\n"\
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" v_add_co_ci_u32 \\vdst, vcc_lo, \\src0, \\vsrc1, vcc_lo\n"\
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" .elseif (.amdgcn.gfx_generation_number >= 9)\n"\
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" v_addc_co_u32 \\vdst, vcc, \\src0, \\vsrc1, vcc\n"\
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" .else\n"\
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" v_addc_u32 \\vdst, vcc, \\src0, \\vsrc1, vcc\n"\
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" .endif\n"\
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" .endm\n"\
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" .macro V_CMP_LT_U32 src0, vsrc1\n"\
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" .if (.amdgcn.gfx_generation_number >= 10)\n"\
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" v_cmp_lt_u32 vcc_lo, \\src0, \\vsrc1\n"\
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" .else\n"\
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" v_cmp_lt_u32 vcc, \\src0, \\vsrc1\n"\
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" .endif\n"\
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" .endm\n"
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/**
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* Common
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*/
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@@ -404,37 +439,24 @@ const char *LoopIsa = R"(
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* v[4:5] - corresponding output buf address: s[2:3] + v0 * 4
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* v6 - counter
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*/
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const char *IterateIsa = R"(
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.text
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const char *IterateIsa = SHADER_MACROS R"(
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// Copy the parameters from scalar registers to vector registers
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v_mov_b32 v2, s0 // v[2:3] = s[0:1]
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v_mov_b32 v3, s1 // v[2:3] = s[0:1]
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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.if (.amdgcn.gfx_generation_number >= 9)
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v_add_co_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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v_add_co_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP:
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v_add_co_u32 v6, vcc, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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v_cmp_lt_u32 vcc, v6, v2
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s_cbranch_vccnz LOOP
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.else
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v_add_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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v_add_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP_GFX8:
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v_add_u32 v6, vcc, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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v_cmp_lt_u32 vcc, v6, v2
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s_cbranch_vccnz LOOP_GFX8
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.endif
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flat_store_dword v[4:5], v6
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v_mov_b32 v2, s0 // v[2:3] = s[0:1]
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v_mov_b32 v3, s1 // v[2:3] = s[0:1]
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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V_ADD_CO_U32 v4, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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V_ADD_CO_CI_U32 v5, v5, 0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP:
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V_ADD_CO_U32 v6, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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V_CMP_LT_U32 v6, v2
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s_cbranch_vccnz LOOP
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flat_store_dword v[4:5], v6
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s_waitcnt vmcnt(0) & lgkmcnt(0)
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s_endpgm
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)";
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@@ -458,88 +480,49 @@ const char *IterateIsa = R"(
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* v[4:5] - corresponding output buf address: s[2:3] + v0 * 4
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* v[6:7] - local buf address used for read test
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*/
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const char *ReadMemoryIsa = R"(
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.text
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.if (.amdgcn.gfx_generation_number >= 9)
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// Compute address of corresponding output buffer
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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v_add_co_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3
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v_add_co_u32 v5, vcc, v5, vcc_lo
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// Compute input buffer offset used to store corresponding local buffer address
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v_lshlrev_b32 v0, 1, v0 // v0 *= 8
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v_add_co_u32 v2, vcc, s0, v0 // v[2:3] = s[0:1] + v0 * 8
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v_mov_b32 v3, s1
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v_add_co_u32 v3, vcc, v3, vcc_lo
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// Load 64bit local buffer address stored at v[2:3] to v[6:7]
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flat_load_dwordx2 v[6:7], v[2:3] slc
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory reads to finish
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v_mov_b32 v8, 0x5678
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s_movk_i32 s8, 0x5678
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L_REPEAT:
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s_load_dword s16, s[0:1], 0x0 glc
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory reads to finish
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s_cmp_eq_i32 s16, s8
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s_cbranch_scc1 L_QUIT // if notified to quit by host
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// Loop read 64M local buffer starting at v[6:7]
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// every 4k page only read once
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v_mov_b32 v9, 0
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v_mov_b32 v10, 0x1000 // 4k page
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v_mov_b32 v11, 0x4000000 // 64M size
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v_mov_b32 v12, v6
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v_mov_b32 v13, v7
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L_LOOP_READ:
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flat_load_dwordx2 v[14:15], v[12:13] slc
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v_add_co_u32 v9, vcc, v9, v10
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v_add_co_u32 v12, vcc, v12, v10
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v_add_co_u32 v13, vcc, v13, vcc_lo
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v_cmp_lt_u32 vcc, v9, v11
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s_cbranch_vccnz L_LOOP_READ
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s_branch L_REPEAT
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L_QUIT:
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flat_store_dword v[4:5], v8
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.else
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// Compute address of corresponding output buffer
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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v_add_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3
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v_addc_u32 v5, vcc, v5, 0, vcc
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// Compute input buffer offset used to store corresponding local buffer address
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v_lshlrev_b32 v0, 1, v0 // v0 *= 8
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v_add_u32 v2, vcc, s0, v0 // v[2:3] = s[0:1] + v0 * 8
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v_mov_b32 v3, s1
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v_addc_u32 v3, vcc, v3, 0, vcc
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// Load 64bit local buffer address stored at v[2:3] to v[6:7]
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flat_load_dwordx2 v[6:7], v[2:3] slc
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory reads to finish
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v_mov_b32 v8, 0x5678
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s_movk_i32 s8, 0x5678
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L_REPEAT_GFX8:
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s_load_dword s16, s[0:1], 0x0 glc
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory reads to finish
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s_cmp_eq_i32 s16, s8
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s_cbranch_scc1 L_QUIT_8 // if notified to quit by host
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// Loop read 64M local buffer starting at v[6:7]
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// every 4k page only read once
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v_mov_b32 v9, 0
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v_mov_b32 v10, 0x1000 // 4k page
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v_mov_b32 v11, 0x4000000 // 64M size
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v_mov_b32 v12, v6
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v_mov_b32 v13, v7
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L_LOOP_READ_GFX8:
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flat_load_dwordx2 v[14:15], v[12:13] slc
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v_add_u32 v9, vcc, v9, v10
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v_add_u32 v12, vcc, v12, v10
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v_addc_u32 v13, vcc, v13, 0, vcc
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v_cmp_lt_u32 vcc, v9, v11
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s_cbranch_vccnz L_LOOP_READ_GFX8
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s_branch L_REPEAT_GFX8
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L_QUIT_8:
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flat_store_dword v[4:5], v8
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.endif
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory writes to finish
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const char *ReadMemoryIsa = SHADER_MACROS R"(
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// Compute address of corresponding output buffer
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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V_ADD_CO_U32 v4, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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V_ADD_CO_CI_U32 v5, v5, 0 // v[4:5] = s[2:3] + v0 * 4
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// Compute input buffer offset used to store corresponding local buffer address
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v_lshlrev_b32 v0, 1, v0 // v0 *= 8
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V_ADD_CO_U32 v2, s0, v0 // v[2:3] = s[0:1] + v0 * 8
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v_mov_b32 v3, s1 // v[2:3] = s[0:1] + v0 * 8
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V_ADD_CO_CI_U32 v3, v3, 0 // v[2:3] = s[0:1] + v0 * 8
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// Load 64bit local buffer address stored at v[2:3] to v[6:7]
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flat_load_dwordx2 v[6:7], v[2:3] slc
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory reads to finish
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v_mov_b32 v8, 0x5678
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s_movk_i32 s8, 0x5678
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L_REPEAT:
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s_load_dword s16, s[0:1], 0x0 glc
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory reads to finish
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s_cmp_eq_i32 s16, s8
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s_cbranch_scc1 L_QUIT // if notified to quit by host
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// Loop read 64M local buffer starting at v[6:7]
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// every 4k page only read once
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v_mov_b32 v9, 0
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v_mov_b32 v10, 0x1000 // 4k page
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v_mov_b32 v11, 0x4000000 // 64M size
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v_mov_b32 v12, v6
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v_mov_b32 v13, v7
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L_LOOP_READ:
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flat_load_dwordx2 v[14:15], v[12:13] slc
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V_ADD_CO_U32 v9, v9, v10
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V_ADD_CO_U32 v12, v12, v10
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V_ADD_CO_CI_U32 v13, v13, 0
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V_CMP_LT_U32 v9, v11
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s_cbranch_vccnz L_LOOP_READ
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s_branch L_REPEAT
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L_QUIT:
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flat_store_dword v[4:5], v8
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s_waitcnt vmcnt(0) & lgkmcnt(0) // wait for memory writes to finish
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s_endpgm
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)";
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