Add a threshold for forcing ROCr to take blit path
This workaround is to avoid performance penalty of SDMA engine taking a while to clock up from a lower DPM state. Add env var GPU_FORCE_BLIT_COPY_SIZE (1024 by default for HIP in KB). Forcing Src and Dst agent to be amdgpu makes ROCr take blit copy path for what otherwise should have been SDMA copy Change-Id: I222f687155f86000d17d66d25182e490b6710463
Este cometimento está contido em:
@@ -486,6 +486,10 @@ Settings::Settings() : value_(0) {
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if (flagIsDefault(HIP_HIDDEN_FREE_MEM)) {
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HIP_HIDDEN_FREE_MEM = 320;
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}
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if (flagIsDefault(GPU_FORCE_BLIT_COPY_SIZE)) {
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GPU_FORCE_BLIT_COPY_SIZE = 1024;
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}
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}
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}
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@@ -599,6 +599,13 @@ bool DmaBlitManager::hsaCopy(const Memory& srcMemory, const Memory& dstMemory,
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dstAgent = dstMemory.dev().getBackendDevice();
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}
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// This workaround is needed for performance to get around the slowdown
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// caused to SDMA engine powering down if its not active. Forcing agents
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// to amdgpu device causes rocr to take blit path internally.
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if (size[0] <= dev().settings().sdmaCopyThreshold_) {
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srcAgent = dstAgent = dev().getBackendDevice();
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}
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const hsa_signal_value_t kInitVal = 1;
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hsa_signal_store_relaxed(completion_signal_, kInitVal);
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@@ -656,13 +663,19 @@ bool DmaBlitManager::hsaCopyStaged(const_address hostSrc, address hostDst, size_
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// Allocate requested size of memory
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while (totalSize > 0) {
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size = std::min(totalSize, dev().settings().stagedXferSize_);
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hsa_signal_store_relaxed(completion_signal_, kInitVal);
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hsa_signal_silent_store_relaxed(completion_signal_, kInitVal);
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// Copy data from Host to Device
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if (hostToDev) {
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// This workaround is needed for performance to get around the slowdown
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// caused to SDMA engine powering down if its not active. Forcing agents
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// to amdgpu device causes rocr to take blit path internally.
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const hsa_agent_t srcAgent =
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(size <= dev().settings().sdmaCopyThreshold_) ? dev().getBackendDevice() : dev().getCpuAgent();
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memcpy(hsaBuffer, hostSrc + offset, size);
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status = hsa_amd_memory_async_copy(hostDst + offset, dev().getBackendDevice(), hsaBuffer,
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dev().getCpuAgent(), size, 0, nullptr, completion_signal_);
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srcAgent, size, 0, nullptr, completion_signal_);
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if (status == HSA_STATUS_SUCCESS) {
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hsa_signal_value_t val = hsa_signal_wait_acquire(
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completion_signal_, HSA_SIGNAL_CONDITION_EQ, 0, uint64_t(-1), HSA_WAIT_STATE_BLOCKED);
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@@ -680,9 +693,15 @@ bool DmaBlitManager::hsaCopyStaged(const_address hostSrc, address hostDst, size_
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continue;
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}
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// This workaround is needed for performance to get around the slowdown
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// caused to SDMA engine powering down if its not active. Forcing agents
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// to amdgpu device causes rocr to take blit path internally.
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const hsa_agent_t dstAgent =
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(size <= dev().settings().sdmaCopyThreshold_) ? dev().getBackendDevice() : dev().getCpuAgent();
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// Copy data from Device to Host
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status =
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hsa_amd_memory_async_copy(hsaBuffer, dev().getCpuAgent(), hostSrc + offset,
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hsa_amd_memory_async_copy(hsaBuffer, dstAgent, hostSrc + offset,
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dev().getBackendDevice(), size, 0, nullptr, completion_signal_);
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if (status == HSA_STATUS_SUCCESS) {
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hsa_signal_value_t val = hsa_signal_wait_acquire(completion_signal_, HSA_SIGNAL_CONDITION_EQ,
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@@ -74,6 +74,8 @@ Settings::Settings() {
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pinnedXferSize_ = std::min(GPU_PINNED_XFER_SIZE, MaxPinnedXferSize) * Mi;
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pinnedMinXferSize_ = std::min(GPU_PINNED_MIN_XFER_SIZE * Ki, pinnedXferSize_);
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sdmaCopyThreshold_ = GPU_FORCE_BLIT_COPY_SIZE * Ki;
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// Don't support Denormals for single precision by default
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singleFpDenorm_ = false;
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@@ -73,6 +73,8 @@ class Settings : public device::Settings {
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size_t pinnedXferSize_; //!< Pinned buffer size for transfer
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size_t pinnedMinXferSize_; //!< Minimal buffer size for pinned transfer
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size_t sdmaCopyThreshold_; //!< Use SDMA to copy above this size
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//! Default constructor
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Settings();
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@@ -72,6 +72,8 @@ release(bool, GPU_FLUSH_ON_EXECUTION, false, \
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"Submit commands to HW on every operation. 0 - Disable, 1 - Enable") \
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release(bool, GPU_USE_SYNC_OBJECTS, true, \
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"If enabled, use sync objects instead of polling") \
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release(size_t, GPU_FORCE_BLIT_COPY_SIZE, 0, \
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"Size in KB of the threshold below which to force blit instead for sdma") \
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release(bool, CL_KHR_FP64, true, \
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"Enable/Disable support for double precision") \
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release(cstring, AMD_OCL_BUILD_OPTIONS, 0, \
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