Add a threshold for forcing ROCr to take blit path

This workaround is to avoid performance penalty of SDMA engine taking a while to clock up from a lower DPM state. Add env var GPU_FORCE_BLIT_COPY_SIZE (1024 by default for HIP in KB). Forcing Src and Dst agent to be amdgpu makes ROCr take blit copy path for what otherwise should have been SDMA copy Change-Id: I222f687155f86000d17d66d25182e490b6710463
2020-04-24 10:07:50 -07:00
parent cba7a4d20e
commit 5f64e6e7ad
5 changed files with 32 additions and 3 deletions
@@ -72,6 +72,8 @@ release(bool, GPU_FLUSH_ON_EXECUTION, false,                                  \
        "Submit commands to HW on every operation. 0 - Disable, 1 - Enable")  \
 release(bool, GPU_USE_SYNC_OBJECTS, true,                                     \
        "If enabled, use sync objects instead of polling")                    \
+release(size_t, GPU_FORCE_BLIT_COPY_SIZE, 0,                                  \
+        "Size in KB of the threshold below which to force blit instead for sdma") \
 release(bool, CL_KHR_FP64, true,                                              \
        "Enable/Disable support for double precision")                        \
 release(cstring, AMD_OCL_BUILD_OPTIONS, 0,                                    \