@@ -1,75 +0,0 @@
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/*************************************************************************
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* Copyright (c) 2015-2019, NVIDIA CORPORATION. All rights reserved.
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* Modifications Copyright (c) 2019-2020 Advanced Micro Devices, Inc. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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#include "devcomm.h"
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#include "primitives.h"
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#include "collectives.h"
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template<int UNROLL, class FUNC, typename T>
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__attribute__((noinline))
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__device__ void ncclGatherKernel(struct CollectiveArgs* args) {
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const int tid = threadIdx.x;
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const int nthreads = args->coll.nThreads;
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const int nChannels = args->coll.nChannels;
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struct ncclDevComm* comm = args->comm;
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struct ncclChannel* channel = comm->channels+blockIdx.x;
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struct ncclRing* ring = &channel->ring;
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const ssize_t size = args->coll.count;
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const int nranks = comm->nRanks;
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const int bid = args->coll.bid;
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const int rank = ring->devUserRanks[0];
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const int stepSize = comm->buffSizes[NCCL_PROTO_SIMPLE] / (sizeof(T)*NCCL_STEPS);
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const int chunkSize = stepSize * GATHER_CHUNKSTEPS;
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const int peersPerChan = DIVUP(nranks, nChannels);
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const ssize_t loopSize = (peersPerChan == 1 ? (nChannels/nranks)*(ssize_t)chunkSize : (ssize_t)chunkSize);
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const int root = args->coll.root;
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// Compute pointers
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const T * __restrict__ thisInput = (const T*)args->sendbuff;
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T * __restrict__ thisOutput = (T*)args->recvbuff;
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for (ssize_t gridOffset = 0; gridOffset < size; gridOffset += loopSize) {
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for (int i = 0; i < peersPerChan; i++) {
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if ((peersPerChan == 1 && blockIdx.x >= (nChannels/nranks)*nranks) ||
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(peersPerChan > 1 && blockIdx.x*peersPerChan+i >= nranks))
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continue;
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int realChunkSize = min(chunkSize, DIVUP(size-gridOffset, (peersPerChan == 1 ? (nChannels/nranks) : 1)));
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ALIGN_SIZE(realChunkSize, nthreads*sizeof(uint64_t)/sizeof(T));
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ssize_t chunkOffset = gridOffset + (peersPerChan == 1 ? (bid/nranks)*realChunkSize : 0);
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int nelem = min(realChunkSize, size-chunkOffset);
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if ((blockIdx.x*peersPerChan+i)%nranks == 0 && rank == root) {
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const T* sendbuff = thisInput+chunkOffset;
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T* recvbuff = thisOutput+chunkOffset+rank*size;
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if (tid < nthreads && sendbuff != recvbuff) {
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// local copy
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ReduceOrCopyMulti<UNROLL, FUNC, T, 1, 1, 1, 1>(tid, nthreads, 1, &sendbuff, 1, &recvbuff, nelem);
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}
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}
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else {
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int peerSend = (rank+(blockIdx.x*peersPerChan)+i)%nranks;
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int peerRecv = (2*nranks+rank-((blockIdx.x*peersPerChan)%nranks)-(i%nranks))%nranks;
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int peerNone = -1;
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if (rank == root) {
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ncclPrimitives<UNROLL, GATHER_CHUNKSTEPS/GATHER_SLICESTEPS, GATHER_SLICESTEPS, T, 1, 1, 0, FUNC>
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prims(tid, nthreads, &peerRecv, &peerNone, NULL, stepSize, channel, comm);
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ssize_t recv_offset = chunkOffset + peerRecv*size;
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prims.recv(thisOutput+recv_offset, nelem);
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}
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else {
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if (peerSend == root) {
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ncclPrimitives<UNROLL, GATHER_CHUNKSTEPS/GATHER_SLICESTEPS, GATHER_SLICESTEPS, T, 1, 1, 0, FUNC>
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prims(tid, nthreads, &peerNone, &peerSend, NULL, stepSize, channel, comm);
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ssize_t send_offset = chunkOffset;
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prims.send(thisInput+send_offset, nelem);
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}
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}
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}
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}
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}
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}
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@@ -1,75 +0,0 @@
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/*************************************************************************
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||||
* Copyright (c) 2015-2019, NVIDIA CORPORATION. All rights reserved.
|
||||
* Modifications Copyright (c) 2019-2020 Advanced Micro Devices, Inc. All rights reserved.
|
||||
*
|
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* See LICENSE.txt for license information
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************************************************************************/
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#include "devcomm.h"
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#include "primitives.h"
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#include "collectives.h"
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template<int UNROLL, class FUNC, typename T>
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__attribute__((noinline))
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__device__ void ncclScatterKernel(struct CollectiveArgs* args) {
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const int tid = threadIdx.x;
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const int nthreads = args->coll.nThreads;
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const int nChannels = args->coll.nChannels;
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struct ncclDevComm* comm = args->comm;
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struct ncclChannel* channel = comm->channels+blockIdx.x;
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struct ncclRing* ring = &channel->ring;
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const ssize_t size = args->coll.count;
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const int nranks = comm->nRanks;
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const int bid = args->coll.bid;
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const int rank = ring->devUserRanks[0];
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const int stepSize = comm->buffSizes[NCCL_PROTO_SIMPLE] / (sizeof(T)*NCCL_STEPS);
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const int chunkSize = stepSize * SCATTER_CHUNKSTEPS;
|
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const int peersPerChan = DIVUP(nranks, nChannels);
|
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const ssize_t loopSize = (peersPerChan == 1 ? (nChannels/nranks)*(ssize_t)chunkSize : (ssize_t)chunkSize);
|
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const int root = args->coll.root;
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// Compute pointers
|
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const T * __restrict__ thisInput = (const T*)args->sendbuff;
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T * __restrict__ thisOutput = (T*)args->recvbuff;
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|
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for (ssize_t gridOffset = 0; gridOffset < size; gridOffset += loopSize) {
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for (int i = 0; i < peersPerChan; i++) {
|
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if ((peersPerChan == 1 && blockIdx.x >= (nChannels/nranks)*nranks) ||
|
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(peersPerChan > 1 && blockIdx.x*peersPerChan+i >= nranks))
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continue;
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int realChunkSize = min(chunkSize, DIVUP(size-gridOffset, (peersPerChan == 1 ? (nChannels/nranks) : 1)));
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ALIGN_SIZE(realChunkSize, nthreads*sizeof(uint64_t)/sizeof(T));
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ssize_t chunkOffset = gridOffset + (peersPerChan == 1 ? (bid/nranks)*realChunkSize : 0);
|
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int nelem = min(realChunkSize, size-chunkOffset);
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if ((blockIdx.x*peersPerChan+i)%nranks == 0 && rank == root) {
|
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const T* sendbuff = thisInput+chunkOffset+rank*size;
|
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T* recvbuff = thisOutput+chunkOffset;
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if (tid < nthreads && sendbuff != recvbuff) {
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// local copy
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ReduceOrCopyMulti<UNROLL, FUNC, T, 1, 1, 1, 1>(tid, nthreads, 1, &sendbuff, 1, &recvbuff, nelem);
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}
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}
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else {
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int peerSend = (rank+(blockIdx.x*peersPerChan)+i)%nranks;
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int peerRecv = (2*nranks+rank-((blockIdx.x*peersPerChan)%nranks)-(i%nranks))%nranks;
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int peerNone = -1;
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if (rank == root) {
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ncclPrimitives<UNROLL, SCATTER_CHUNKSTEPS/SCATTER_SLICESTEPS, SCATTER_SLICESTEPS, T, 1, 1, 0, FUNC>
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prims(tid, nthreads, &peerNone, &peerSend, NULL, stepSize, channel, comm);
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ssize_t send_offset = chunkOffset + peerSend*size;
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prims.send(thisInput+send_offset, nelem);
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}
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else {
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if (peerRecv == root) {
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ncclPrimitives<UNROLL, SCATTER_CHUNKSTEPS/SCATTER_SLICESTEPS, SCATTER_SLICESTEPS, T, 1, 1, 0, FUNC>
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prims(tid, nthreads, &peerRecv, &peerNone, NULL, stepSize, channel, comm);
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ssize_t recv_offset = chunkOffset;
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prims.recv(thisOutput+recv_offset, nelem);
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}
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}
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}
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}
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}
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}
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@@ -101,29 +101,6 @@ ncclResult_t netSendSetup(struct ncclComm* comm, struct ncclTopoGraph* graph, st
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if (resources->buffSizes[LOC_HOSTMEM]) {
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NCCLCHECK(ncclCudaHostCalloc(resources->buffers+LOC_HOSTMEM, resources->buffSizes[LOC_HOSTMEM]));
|
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}
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if (resources->useGdr) {
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//CUDACHECK(hipDeviceGetAttribute((int*)&resources->curr_hdp_reg, hipDeviceAttributeHdpMemFlushCntl, myInfo->cudaDev));
|
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struct data_struct {hsa_agent_t agent; int counter;} out;
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out.counter = 0;
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out.agent.handle = myInfo->cudaDev;
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hsa_iterate_agents([](hsa_agent_t agent, void* data) {
|
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int devId = ((struct data_struct *)data)->agent.handle;
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hsa_device_type_t type;
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hsa_agent_get_info(agent, HSA_AGENT_INFO_DEVICE, &type);
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if(type != HSA_DEVICE_TYPE_GPU)
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return HSA_STATUS_SUCCESS;
|
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if(((struct data_struct *)data)->counter!=devId) {
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((struct data_struct *)data)->counter++;
|
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return HSA_STATUS_SUCCESS;
|
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}
|
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((struct data_struct *)data)->agent = agent;
|
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return HSA_STATUS_SUCCESS;
|
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}, (void*)&out);
|
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hsa_amd_hdp_flush_t hdpinfo;
|
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hsa_status_t err = hsa_agent_get_info(out.agent, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_HDP_FLUSH, &hdpinfo);
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resources->curr_hdp_reg = hdpinfo.HDP_MEM_FLUSH_CNTL;
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send->conn.curr_hdp_reg = resources->curr_hdp_reg;
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}
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int offsets[LOC_COUNT];
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offsets[LOC_HOSTMEM] = offsets[LOC_DEVMEM] = 0;
|
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@@ -134,6 +111,29 @@ ncclResult_t netSendSetup(struct ncclComm* comm, struct ncclTopoGraph* graph, st
|
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}
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}
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if (resources->useGdr) {
|
||||
//CUDACHECK(hipDeviceGetAttribute((int*)&resources->curr_hdp_reg, hipDeviceAttributeHdpMemFlushCntl, myInfo->cudaDev));
|
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struct data_struct {hsa_agent_t agent; int counter;} out;
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out.counter = 0;
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||||
out.agent.handle = myInfo->cudaDev;
|
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hsa_iterate_agents([](hsa_agent_t agent, void* data) {
|
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int devId = ((struct data_struct *)data)->agent.handle;
|
||||
hsa_device_type_t type;
|
||||
hsa_agent_get_info(agent, HSA_AGENT_INFO_DEVICE, &type);
|
||||
if(type != HSA_DEVICE_TYPE_GPU)
|
||||
return HSA_STATUS_SUCCESS;
|
||||
if(((struct data_struct *)data)->counter!=devId) {
|
||||
((struct data_struct *)data)->counter++;
|
||||
return HSA_STATUS_SUCCESS;
|
||||
}
|
||||
((struct data_struct *)data)->agent = agent;
|
||||
return HSA_STATUS_SUCCESS;
|
||||
}, (void*)&out);
|
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hsa_amd_hdp_flush_t hdpinfo;
|
||||
hsa_status_t err = hsa_agent_get_info(out.agent, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_HDP_FLUSH, &hdpinfo);
|
||||
resources->curr_hdp_reg = hdpinfo.HDP_MEM_FLUSH_CNTL;
|
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send->conn.curr_hdp_reg = resources->curr_hdp_reg;
|
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}
|
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INFO(NCCL_INIT|NCCL_NET,"Channel %02d : %d[%lx] -> %d[%lx] [send] via NET/%s/%d%s%s", channelId, myInfo->rank, myInfo->busId, peerInfo->rank, peerInfo->busId, ncclNetName(), resources->netDev,
|
||||
resources->useGdr ? "/GDRDMA" : "", resources->shared ? "/Shared" : "");
|
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return ncclSuccess;
|
||||
|
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