Initial support for HIP managed memory
- Call the new ROCclr interfaces for HMM
Change-Id: I2cd1bf438f712a9e9e328340e7d0c025257ca6c1
[ROCm/hip commit: f4211c3905]
This commit is contained in:
@@ -178,8 +178,10 @@ enum hipLimit_t {
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0x80000000 ///< Allocate non-coherent memory. Overrides HIP_COHERENT_HOST_ALLOC for specific
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///< allocation.
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#define hipMemAttachGlobal 0x0
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#define hipMemAttachHost 0x1
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#define hipMemAttachGlobal 0x01 ///< Memory can be accessed by any stream on any device
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#define hipMemAttachHost 0x02 ///< Memory cannot be accessed by any stream on any device
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#define hipMemAttachSingle 0x04 ///< Memory can only be accessed by a single stream on
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///< the associated device
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#define hipDeviceMallocDefault 0x0
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#define hipDeviceMallocFinegrained 0x1 ///< Memory is allocated in fine grained region of device.
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@@ -217,6 +219,41 @@ enum hipLimit_t {
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#define hipCooperativeLaunchMultiDeviceNoPreSync 0x01
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#define hipCooperativeLaunchMultiDeviceNoPostSync 0x02
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#define hipCpuDeviceId ((int)-1)
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#define hipInvalidDeviceId ((int)-2)
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/*
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* @brief HIP Memory Advise values
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* @enum
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* @ingroup Enumerations
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*/
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typedef enum hipMemoryAdvise {
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hipMemAdviseSetReadMostly = 1, ///< Data will mostly be read and only occassionally
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///< be written to
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hipMemAdviseUnsetReadMostly = 2, ///< Undo the effect of hipMemAdviseSetReadMostly
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hipMemAdviseSetPreferredLocation = 3, ///< Set the preferred location for the data as
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///< the specified device
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hipMemAdviseUnsetPreferredLocation = 4, ///< Clear the preferred location for the data
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hipMemAdviseSetAccessedBy = 5, ///< Data will be accessed by the specified device,
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///< so prevent page faults as much as possible
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hipMemAdviseUnsetAccessedBy = 6 ///< Let the Unified Memory subsystem decide on
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///< the page faulting policy for the specified device
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} hipMemoryAdvise;
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/*
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* @brief HIP range attributes
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* @enum
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* @ingroup Enumerations
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*/
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typedef enum hipMemRangeAttribute {
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hipMemRangeAttributeReadMostly = 1, ///< Whether the range will mostly be read and
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///< only occassionally be written to
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hipMemRangeAttributePreferredLocation = 2, ///< The preferred location of the range
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hipMemRangeAttributeAccessedBy = 3, ///< Memory range has cudaMemAdviseSetAccessedBy
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///< set for specified device
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hipMemRangeAttributeLastPrefetchLocation = 4,///< The last location to which the range was prefetched
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} hipMemRangeAttribute;
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/*
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* @brief hipJitOption
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* @enum
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@@ -1180,15 +1217,18 @@ hipError_t hipMemAllocHost(void** ptr, size_t size);
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hipError_t hipHostMalloc(void** ptr, size_t size, unsigned int flags);
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/**
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* @brief Allocates memory that will be automatically managed by the Unified Memory system.
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* @brief Allocates memory that will be automatically managed by AMD HMM.
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*
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* @param[out] ptr Pointer to the allocated managed memory
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* @param[in] size Requested memory size
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* @param[in] flags must be either hipMemAttachGlobal/hipMemAttachHost
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* @param [out] dev_ptr - pointer to allocated device memory
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* @param [in] size - requested allocation size in bytes
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* @param [in] flags - must be either hipMemAttachGlobal or hipMemAttachHost
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* (defaults to hipMemAttachGlobal)
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*
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* @return #hipSuccess, #hipErrorOutOfMemory
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* @returns #hipSuccess, #hipErrorMemoryAllocation, #hipErrorNotSupported, #hipErrorInvalidValue
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*/
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hipError_t hipMallocManaged(void** devPtr, size_t size, unsigned int flags __dparm(0));
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hipError_t hipMallocManaged(void** dev_ptr,
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size_t size,
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unsigned int flags __dparm(hipMemAttachGlobal));
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/**
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* @brief Allocate device accessible page locked host memory [Deprecated]
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@@ -3369,7 +3409,6 @@ hipError_t __hipPopCallConfiguration(dim3 *gridDim,
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* @returns #hipSuccess, #hipErrorInvalidValue, hipInvalidDevice
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*
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*/
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hipError_t hipLaunchKernel(const void* function_address,
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dim3 numBlocks,
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dim3 dimBlocks,
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@@ -3377,6 +3416,92 @@ hipError_t hipLaunchKernel(const void* function_address,
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size_t sharedMemBytes __dparm(0),
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hipStream_t stream __dparm(0));
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/**
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* @brief Prefetches memory to the specified destination device using AMD HMM.
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*
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* @param [in] dev_ptr pointer to be prefetched
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* @param [in] count size in bytes for prefetching
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* @param [in] device destination device to prefetch to
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* @param [in] stream stream to enqueue prefetch operation
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*/
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hipError_t hipMemPrefetchAsync(const void* dev_ptr,
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size_t count,
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int device,
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hipStream_t stream __dparm(0));
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/**
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* @brief Advise about the usage of a given memory range to AMD HMM.
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*
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* @param [in] dev_ptr pointer to memory to set the advice for
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* @param [in] count size in bytes of the memory range
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* @param [in] advice advice to be applied for the specified memory range
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* @param [in] device device to apply the advice for
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*/
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hipError_t hipMemAdvise(const void* dev_ptr,
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size_t count,
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hipMemoryAdvise advice,
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int device);
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/**
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* @brief Query an attribute of a given memory range in AMD HMM.
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*
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* @param [in/out] data a pointer to a memory location where the result of each
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* attribute query will be written to
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* @param [in] data_size the size of data
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* @param [in] attribute the attribute to query
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* @param [in] dev_ptr start of the range to query
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* @param [in] count size of the range to query
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*/
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hipError_t hipMemRangeGetAttribute(void* data,
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size_t data_size,
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hipMemRangeAttribute attribute,
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const void* dev_ptr,
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size_t count);
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/**
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* @brief Query attributes of a given memory range in AMD HMM.
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*
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* @param [in/out] data a two-dimensional array containing pointers to memory locations
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* where the result of each attribute query will be written to
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* @param [in] data_sizes an array, containing the sizes of each result
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* @param [in] attributes the attribute to query
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* @param [in] num_attributes an array of attributes to query (numAttributes and the number
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* of attributes in this array should match)
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* @param [in] dev_ptr start of the range to query
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* @param [in] count size of the range to query
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*/
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hipError_t hipMemRangeGetAttributes(void** data,
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size_t* data_sizes,
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hipMemRangeAttribute* attributes,
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size_t num_attributes,
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const void* dev_ptr,
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size_t count);
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/**
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* @brief Attach memory to a stream asynchronously in AMD HMM.
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*
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* @param [in] stream - stream in which to enqueue the attach operation
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* @param [in] dev_ptr - pointer to memory (must be a pointer to managed memory or
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* to a valid host-accessible region of system-allocated memory)
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* @param [in] length - length of memory (defaults to zero)
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* @param [in] flags - must be one of cudaMemAttachGlobal, cudaMemAttachHost or
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* cudaMemAttachSingle (defaults to cudaMemAttachSingle)
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*
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* @returns #hipSuccess, #hipErrorInvalidValue
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*/
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hipError_t hipStreamAttachMemAsync(hipStream_t stream,
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hipDeviceptr_t* dev_ptr,
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size_t length __dparm(0),
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unsigned int flags __dparm(hipMemAttachSingle));
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#if __HIP_ROCclr__ || !defined(__HCC__)
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//TODO: Move this to hip_ext.h
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hipError_t hipExtLaunchKernel(const void* function_address, dim3 numBlocks, dim3 dimBlocks,
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@@ -81,6 +81,7 @@ add_library(hip64 OBJECT
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hip_error.cpp
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hip_event.cpp
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hip_global.cpp
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hip_hmm.cpp
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hip_memory.cpp
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hip_module.cpp
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hip_peer.cpp
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@@ -80,6 +80,7 @@ hipMallocManaged
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hipArrayCreate
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hipArray3DCreate
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hipMallocArray
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hipMemAdvise
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hipMemAllocPitch
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hipMallocPitch
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hipMemcpy
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@@ -111,7 +112,10 @@ hipMemGetAddressRange
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hipGetSymbolAddress
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hipGetSymbolSize
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hipMemGetInfo
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hipMemPrefetchAsync
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hipMemPtrGetInfo
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hipMemRangeGetAttribute
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hipMemRangeGetAttributes
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hipMemset
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hipMemsetAsync
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hipMemsetD8
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@@ -154,6 +158,7 @@ hipGetDeviceFlags
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hipSetDevice
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hipSetDeviceFlags
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hipStreamAddCallback
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hipStreamAttachMemAsync
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hipStreamCreate
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hipStreamCreateWithFlags
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hipStreamCreateWithPriority
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@@ -62,6 +62,7 @@ global:
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hipGetErrorName;
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hipGetErrorString;
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hipGetLastError;
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hipMemAdvise;
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hipMemAllocHost;
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hipHostAlloc;
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hipHostFree;
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@@ -112,7 +113,10 @@ global:
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hipGetSymbolAddress;
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hipGetSymbolSize;
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hipMemGetInfo;
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hipMemPrefetchAsync;
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hipMemPtrGetInfo;
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hipMemRangeGetAttribute;
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hipMemRangeGetAttributes;
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hipMemset;
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hipMemsetAsync;
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hipMemsetD8;
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@@ -154,6 +158,7 @@ global:
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hipSetDevice;
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hipSetDeviceFlags;
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hipStreamAddCallback;
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hipStreamAttachMemAsync;
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hipStreamCreate;
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hipStreamCreateWithFlags;
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hipStreamCreateWithPriority;
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@@ -0,0 +1,215 @@
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/* Copyright (c) 2020-present Advanced Micro Devices, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE. */
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#include <hip/hip_runtime.h>
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#include "hip_internal.hpp"
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#include "hip_conversions.hpp"
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#include "platform/context.hpp"
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#include "platform/command.hpp"
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#include "platform/memory.hpp"
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// Forward declaraiton of a static function
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static hipError_t ihipMallocManaged(void** ptr, size_t size);
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// Make sure HIP defines match ROCclr to avoid double conversion
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static_assert(hipCpuDeviceId == amd::CpuDeviceId, "CPU device ID mismatch with ROCclr!");
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static_assert(hipInvalidDeviceId == amd::InvalidDeviceId,
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"Invalid device ID mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemAdviseSetReadMostly) ==
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amd::MemoryAdvice::SetReadMostly, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemAdviseUnsetReadMostly) ==
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amd::MemoryAdvice::UnsetReadMostly, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemAdviseSetPreferredLocation) ==
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amd::MemoryAdvice::SetPreferredLocation, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemAdviseUnsetPreferredLocation) ==
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amd::MemoryAdvice::UnsetPreferredLocation, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemAdviseSetAccessedBy) ==
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amd::MemoryAdvice::SetAccessedBy, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemAdviseUnsetAccessedBy) ==
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amd::MemoryAdvice::UnsetAccessedBy, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemRangeAttributeReadMostly) ==
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amd::MemRangeAttribute::ReadMostly, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemRangeAttributePreferredLocation) ==
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amd::MemRangeAttribute::PreferredLocation, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemRangeAttributeAccessedBy) ==
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amd::MemRangeAttribute::AccessedBy, "Enum mismatch with ROCclr!");
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static_assert(static_cast<uint32_t>(hipMemRangeAttributeLastPrefetchLocation) ==
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amd::MemRangeAttribute::LastPrefetchLocation, "Enum mismatch with ROCclr!");
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// ================================================================================================
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hipError_t hipMallocManaged(void** dev_ptr, size_t size, unsigned int flags) {
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HIP_INIT_API(hipMallocManaged, dev_ptr, size, flags);
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if ((dev_ptr == nullptr) || (flags != hipMemAttachGlobal)) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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HIP_RETURN(ihipMallocManaged(dev_ptr, size), *dev_ptr);
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}
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// ================================================================================================
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hipError_t hipMemPrefetchAsync(const void* dev_ptr, size_t count, int device,
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hipStream_t stream) {
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HIP_INIT_API(hipMemPrefetchAsync, dev_ptr, count, device, stream);
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if ((dev_ptr == nullptr) || (count == 0) || (stream == nullptr)) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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amd::HostQueue* queue = nullptr;
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bool cpu_access = (device == hipCpuDeviceId) ? true : false;
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// Pick the specified stream or Null one from the provided device
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if (stream != nullptr) {
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queue = hip::getQueue(stream);
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} else {
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if (!cpu_access) {
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queue = g_devices[device]->NullStream();
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} else {
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queue = hip::getCurrentDevice()->NullStream();
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}
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}
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if (queue == nullptr) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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amd::Command::EventWaitList waitList;
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amd::SvmPrefetchAsyncCommand* command =
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new amd::SvmPrefetchAsyncCommand(*queue, waitList, dev_ptr, count, cpu_access);
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if (command == nullptr) {
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return hipErrorOutOfMemory;
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}
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if (!command->validateMemory()) {
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delete command;
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HIP_RETURN(hipErrorInvalidValue);
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}
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command->enqueue();
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command->release();
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HIP_RETURN(hipErrorInvalidValue);
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}
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// ================================================================================================
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hipError_t hipMemAdvise(const void* dev_ptr, size_t count, hipMemoryAdvise advice, int device) {
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HIP_INIT_API(hipMemAdvise, dev_ptr, count, advice, device);
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if ((dev_ptr == nullptr) || (count == 0) || (device >= g_devices.size())) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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amd::Device* dev = g_devices[device]->devices()[0];
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// Set the allocation attributes in AMD HMM
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if (!dev->SetSvmAttributes(dev_ptr, count, static_cast<amd::MemoryAdvice>(advice))) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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HIP_RETURN(hipSuccess);
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}
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// ================================================================================================
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hipError_t hipMemRangeGetAttribute(void* data, size_t data_size, hipMemRangeAttribute attribute,
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const void* dev_ptr, size_t count) {
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HIP_INIT_API(hipMemRangeGetAttribute, data, data_size, attribute, dev_ptr, count);
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if ((data == nullptr) || (data_size == 0) || (dev_ptr == nullptr) || (count == 0)) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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// Shouldn't matter for which device the interface is called
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amd::Device* dev = g_devices[0]->devices()[0];
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// Get the allocation attribute from AMD HMM
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if (!dev->GetSvmAttributes(&data, &data_size, reinterpret_cast<int*>(&attribute), 1,
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dev_ptr, count)) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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HIP_RETURN(hipErrorInvalidValue);
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}
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// ================================================================================================
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hipError_t hipMemRangeGetAttributes(void** data, size_t* data_sizes,
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hipMemRangeAttribute* attributes, size_t num_attributes,
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const void* dev_ptr, size_t count) {
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HIP_INIT_API(hipMemRangeGetAttributes, data, data_sizes,
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attributes, num_attributes, dev_ptr, count);
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if ((data == nullptr) || (data_sizes == nullptr) || (attributes == nullptr) ||
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(num_attributes == 0) || (dev_ptr == nullptr) || (count == 0)) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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// Shouldn't matter for which device the interface is called
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amd::Device* dev = g_devices[0]->devices()[0];
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// Get the allocation attributes from AMD HMM
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if (!dev->GetSvmAttributes(data, data_sizes, reinterpret_cast<int*>(attributes),
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num_attributes, dev_ptr, count)) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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HIP_RETURN(hipErrorInvalidValue);
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}
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// ================================================================================================
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hipError_t hipStreamAttachMemAsync(hipStream_t stream, hipDeviceptr_t* dev_ptr,
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size_t length, unsigned int flags) {
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HIP_INIT_API(hipStreamAttachMemAsync, stream, dev_ptr, length, flags);
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if ((stream == nullptr) || (dev_ptr == nullptr) || (length == 0)) {
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HIP_RETURN(hipErrorInvalidValue);
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}
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// Unclear what should be done for this interface in AMD HMM, since it's generic SVM alloc
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HIP_RETURN(hipErrorInvalidValue);
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}
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// ================================================================================================
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static hipError_t ihipMallocManaged(void** ptr, size_t size) {
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if (size == 0) {
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*ptr = nullptr;
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return hipSuccess;
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} else if (ptr == nullptr) {
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return hipErrorInvalidValue;
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}
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||||
assert((hip::host_device->asContext()!= nullptr) && "Current host context must be valid");
|
||||
amd::Context& ctx = *hip::host_device->asContext();
|
||||
|
||||
const amd::Device& dev = *ctx.devices()[0];
|
||||
// For now limit to the max allocation size on the device.
|
||||
// The apps should be able to go over theCould you limit allocation in the future
|
||||
if (dev.info().maxMemAllocSize_ < size) {
|
||||
return hipErrorMemoryAllocation;
|
||||
}
|
||||
|
||||
// Allocate SVM fine grain buffer with the forced host pointer, avoiding explicit memory
|
||||
// allocation in the device driver
|
||||
*ptr = amd::SvmBuffer::malloc(ctx, CL_MEM_SVM_FINE_GRAIN_BUFFER | CL_MEM_ALLOC_HOST_PTR,
|
||||
size, dev.info().memBaseAddrAlign_);
|
||||
if (*ptr == nullptr) {
|
||||
return hipErrorMemoryAllocation;
|
||||
}
|
||||
|
||||
ClPrint(amd::LOG_INFO, amd::LOG_API, "%-5d: [%zx] ihipMallocManaged ptr=0x%zx", getpid(),
|
||||
std::this_thread::get_id(), *ptr);
|
||||
return hipSuccess;
|
||||
}
|
||||
@@ -105,6 +105,7 @@ hipError_t ihipMalloc(void** ptr, size_t sizeBytes, unsigned int flags)
|
||||
return hipSuccess;
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
hipError_t ihipMemcpy(void* dst, const void* src, size_t sizeBytes, hipMemcpyKind kind,
|
||||
amd::HostQueue& queue, bool isAsync = false) {
|
||||
if (sizeBytes == 0) {
|
||||
@@ -154,36 +155,26 @@ hipError_t ihipMemcpy(void* dst, const void* src, size_t sizeBytes, hipMemcpyKin
|
||||
*srcMemory->asBuffer(), sOffset, sizeBytes, dst);
|
||||
isAsync = false;
|
||||
} else if ((srcMemory != nullptr) && (dstMemory != nullptr)) {
|
||||
if (queueDevice != srcMemory->getContext().devices()[0]) {
|
||||
amd::Coord3D srcOffset(sOffset, 0, 0);
|
||||
amd::Coord3D dstOffset(dOffset, 0, 0);
|
||||
amd::Coord3D copySize(sizeBytes, 1, 1);
|
||||
if ((kind == hipMemcpyDeviceToDevice) &&
|
||||
// Check if the queue device doesn't match the device on any memory object. Hence
|
||||
// it's a P2P transfer, because the app has requested access to another GPU
|
||||
(srcMemory->getContext().devices()[0] != dstMemory->getContext().devices()[0])) {
|
||||
command = new amd::CopyMemoryP2PCommand(queue, CL_COMMAND_COPY_BUFFER, waitList,
|
||||
*srcMemory->asBuffer(),*dstMemory->asBuffer(), srcOffset, dstOffset, copySize);
|
||||
command->enqueue();
|
||||
if (!isAsync) {
|
||||
command->awaitCompletion();
|
||||
*srcMemory->asBuffer(), *dstMemory->asBuffer(), sOffset, dOffset, sizeBytes);
|
||||
if (command == nullptr) {
|
||||
return hipErrorOutOfMemory;
|
||||
}
|
||||
command->release();
|
||||
return hipSuccess;
|
||||
}
|
||||
if (queueDevice != dstMemory->getContext().devices()[0]) {
|
||||
amd::Coord3D srcOffset(sOffset, 0, 0);
|
||||
amd::Coord3D dstOffset(dOffset, 0, 0);
|
||||
amd::Coord3D copySize(sizeBytes, 1, 1);
|
||||
command = new amd::CopyMemoryP2PCommand(queue, CL_COMMAND_COPY_BUFFER, waitList,
|
||||
*srcMemory->asBuffer(),*dstMemory->asBuffer(), srcOffset, dstOffset, copySize);
|
||||
command->enqueue();
|
||||
if (!isAsync) {
|
||||
command->awaitCompletion();
|
||||
// Make sure runtime has valid memory for the command execution. P2P access
|
||||
// requires page table mapping on the current device to another GPU memory
|
||||
if (!static_cast<amd::CopyMemoryP2PCommand*>(command)->validateMemory()) {
|
||||
delete command;
|
||||
return hipErrorInvalidValue;
|
||||
}
|
||||
command->release();
|
||||
return hipSuccess;
|
||||
} else {
|
||||
command = new amd::CopyMemoryCommand(queue, CL_COMMAND_COPY_BUFFER, waitList,
|
||||
*srcMemory->asBuffer(), *dstMemory->asBuffer(), sOffset, dOffset, sizeBytes);
|
||||
}
|
||||
command = new amd::CopyMemoryCommand(queue, CL_COMMAND_COPY_BUFFER, waitList,
|
||||
*srcMemory->asBuffer(),*dstMemory->asBuffer(), sOffset, dOffset, sizeBytes);
|
||||
}
|
||||
|
||||
if (command == nullptr) {
|
||||
return hipErrorOutOfMemory;
|
||||
}
|
||||
@@ -201,6 +192,7 @@ hipError_t ihipMemcpy(void* dst, const void* src, size_t sizeBytes, hipMemcpyKin
|
||||
return hipSuccess;
|
||||
}
|
||||
|
||||
// ================================================================================================
|
||||
hipError_t hipExtMallocWithFlags(void** ptr, size_t sizeBytes, unsigned int flags) {
|
||||
HIP_INIT_API(hipExtMallocWithFlags, ptr, sizeBytes, flags);
|
||||
|
||||
@@ -245,17 +237,6 @@ hipError_t hipHostMalloc(void** ptr, size_t sizeBytes, unsigned int flags) {
|
||||
HIP_RETURN(ihipMalloc(ptr, sizeBytes, ihipFlags), *ptr);
|
||||
}
|
||||
|
||||
hipError_t hipMallocManaged(void** devPtr, size_t size,
|
||||
unsigned int flags) {
|
||||
HIP_INIT_API(hipMallocManaged, devPtr, size, flags);
|
||||
|
||||
if (flags != hipMemAttachGlobal) {
|
||||
HIP_RETURN(hipErrorInvalidValue);
|
||||
}
|
||||
|
||||
HIP_RETURN(ihipMalloc(devPtr, size, CL_MEM_SVM_FINE_GRAIN_BUFFER), *devPtr);
|
||||
}
|
||||
|
||||
hipError_t hipFree(void* ptr) {
|
||||
HIP_INIT_API(hipFree, ptr);
|
||||
|
||||
|
||||
Reference in New Issue
Block a user