kfdtest: add RAS tests
They are disabled for now.
Change-Id: I9c936130cbaf8c773f4b8e94bccf4af1f45eda65
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
[ROCm/ROCR-Runtime commit: 7349276860]
This commit is contained in:
@@ -11,7 +11,8 @@ PERMANENT_BLACKLIST_ALL_ASICS=\
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"-KFDEventTest.MeasureInterruptConsumption:"\
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"KFDLocalMemoryTest.Fragmentation:"\
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"KFDQMTest.BasicCuMaskingLinear:"\
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"RDMATest.GPUDirect"
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"RDMATest.GPUDirect:"\
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"KFDRASTest.*"
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# This is the temporary blacklist for all ASICs. This is to be used when a test is failing consistently
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# on every ASIC (Kaveri, Carrizo, Hawaii, Tonga, Fiji, Polaris10, Polaris11 and Vega10 .
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@@ -0,0 +1,149 @@
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/*
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* Copyright (C) 2019 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <math.h>
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#include <limits.h>
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#include "linux/kfd_ioctl.h"
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#include "KFDRASTest.hpp"
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#include "PM4Queue.hpp"
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#define AMDGPU_DEBUGFS_NODES "/sys/kernel/debug/dri/"
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#define RAS_SDMA_ERR_INJECTION "ras/sdma_err_inject"
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void KFDRASTest::SetUp() {
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ROUTINE_START
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KFDBaseComponentTest::SetUp();
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char path[256];
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int renderNode;
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uint32_t rasFeatures = 0;
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HsaEventDescriptor eventDesc;
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m_pRasEvent = NULL;
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m_setupStatus = false;
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m_defaultGPUNode = m_NodeInfo.HsaDefaultGPUNode();
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renderNode = KFDBaseComponentTest::FindDRMRenderNode(m_defaultGPUNode);
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if (renderNode < 0) {
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LOG() << "Skipping test: Could not find render node for default GPU." << std::endl;
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return;
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}
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amdgpu_query_info(m_RenderNodes[renderNode].device_handle,
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AMDGPU_INFO_RAS_ENABLED_FEATURES,
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sizeof(uint32_t), &rasFeatures);
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if (!(rasFeatures &
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(AMDGPU_INFO_RAS_ENABLED_SDMA ||
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AMDGPU_INFO_RAS_ENABLED_UMC ||
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AMDGPU_INFO_RAS_ENABLED_GFX))) {
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LOG() << "Skipping test: GPU doesn't support RAS features!" << std::endl;
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return;
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}
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snprintf(path, sizeof(path), "%s/%d/%s", AMDGPU_DEBUGFS_NODES, renderNode, RAS_SDMA_ERR_INJECTION);
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m_pFile = fopen(path, "w");
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if (!m_pFile) {
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LOG() << "Skipping test: RAS error injection requires root access!" << std::endl;
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return;
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}
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eventDesc.EventType = HSA_EVENTTYPE_MEMORY;
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eventDesc.NodeId = m_defaultGPUNode;
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eventDesc.SyncVar.SyncVar.UserData = NULL;
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eventDesc.SyncVar.SyncVarSize = 0;
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ASSERT_SUCCESS(hsaKmtCreateEvent(&eventDesc, true, false, &m_pRasEvent));
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m_setupStatus = true;
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ROUTINE_END
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}
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void KFDRASTest::TearDown() {
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ROUTINE_START
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if (m_pRasEvent != NULL) {
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EXPECT_SUCCESS(hsaKmtDestroyEvent(m_pRasEvent));
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}
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fclose(m_pFile);
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KFDBaseComponentTest::TearDown();
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ROUTINE_END
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}
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TEST_F(KFDRASTest, BasicTest) {
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TEST_START(TESTPROFILE_RUNALL);
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if (!m_setupStatus) {
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return;
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}
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// write an uncorrectable error injection at address 1 as value 1
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ASSERT_SUCCESS(fwrite("ue 1 1", sizeof(char), 6, m_pFile));
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EXPECT_SUCCESS(hsaKmtWaitOnEvent(m_pRasEvent, g_TestTimeOut));
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EXPECT_EQ(1, m_pRasEvent->EventData.EventData.MemoryAccessFault.Failure.ErrorType);
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TEST_END;
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}
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TEST_F(KFDRASTest, MixEventsTest) {
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TEST_START(TESTPROFILE_RUNALL);
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if (!m_setupStatus) {
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return;
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}
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PM4Queue queue;
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HsaEvent* pHsaEvent;
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ASSERT_SUCCESS(CreateQueueTypeEvent(false, false, m_defaultGPUNode, &pHsaEvent));
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ASSERT_NE(0, pHsaEvent->EventData.HWData2);
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ASSERT_SUCCESS(queue.Create(m_defaultGPUNode));
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queue.PlaceAndSubmitPacket(PM4ReleaseMemoryPacket(false,
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pHsaEvent->EventData.HWData2, pHsaEvent->EventId));
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queue.Wait4PacketConsumption();
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EXPECT_SUCCESS(hsaKmtWaitOnEvent(pHsaEvent, g_TestTimeOut));
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ASSERT_SUCCESS(fwrite("ue 1 1", sizeof(char), 6, m_pFile));
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EXPECT_SUCCESS(hsaKmtWaitOnEvent(m_pRasEvent, g_TestTimeOut));
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EXPECT_EQ(1, m_pRasEvent->EventData.EventData.MemoryAccessFault.Failure.ErrorType);
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EXPECT_SUCCESS(queue.Destroy());
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EXPECT_SUCCESS(hsaKmtDestroyEvent(pHsaEvent));
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TEST_END;
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}
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@@ -0,0 +1,56 @@
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/*
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* Copyright (C) 2019 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "KFDBaseComponentTest.hpp"
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#ifndef __KFD_RAS_TEST__H__
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#define __KFD_RAS_TEST__H__
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// To be removed when amdgpu_drm.h updated with those definitions
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#ifndef AMDGPU_INFO_RAS_ENABLED_FEATURES
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#define AMDGPU_INFO_RAS_ENABLED_FEATURES 0x20
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#define AMDGPU_INFO_RAS_ENABLED_UMC (1 << 0)
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#define AMDGPU_INFO_RAS_ENABLED_SDMA (1 << 1)
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#define AMDGPU_INFO_RAS_ENABLED_GFX (1 << 2)
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#endif
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class KFDRASTest : public KFDBaseComponentTest {
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public:
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KFDRASTest(void) {}
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~KFDRASTest(void) {}
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// @brief Executed before every test in KFDRASTest.
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virtual void SetUp();
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// @brief Executed after every test in KFDRASTest.
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virtual void TearDown();
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protected:
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static const unsigned int EVENT_TIMEOUT = 5000; // 5 seconds
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HsaEvent* m_pRasEvent;
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HSAint32 m_defaultGPUNode;
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FILE* m_pFile;
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bool m_setupStatus;
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};
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#endif // __KFD_RAS_TEST__H__
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