Bypass HDP flush during SDMA copies on A+A GPU-CPU xGMI connections
Host to device SDMA copies do not require an HDP cache flush when connected by xGMI since data copies over the data fabric and not HDP. Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Reviewed-by: Sean Keely <sean.keely@amd.com> Change-Id: I78d73a47edcc1a9c0ba59f33cf91485f13f1c45b
This commit is contained in:
committed by
Jonathan Kim
parent
64dae113b1
commit
658b053943
@@ -146,18 +146,20 @@ hsa_status_t BlitSdma<RingIndexTy, HwIndexMonotonic, SizeToCountOffset, useGCR>:
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return HSA_STATUS_ERROR;
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}
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const core::Runtime::LinkInfo& link = core::Runtime::runtime_singleton_->GetLinkInfo(
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agent_->node_id(), core::Runtime::runtime_singleton_->cpu_agents()[0]->node_id());
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if (agent_->isa()->GetVersion() == core::Isa::Version(7, 0, 1)) {
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platform_atomic_support_ = false;
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} else {
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const core::Runtime::LinkInfo& link = core::Runtime::runtime_singleton_->GetLinkInfo(
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agent_->node_id(), core::Runtime::runtime_singleton_->cpu_agents()[0]->node_id());
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platform_atomic_support_ = link.info.atomic_support_64bit;
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}
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// HDP flush supported on gfx900 and forward.
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// FIXME: Not working on gfx10, raises SRBM write protection interrupt.
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// gfx90a can support xGMI host to device connections so bypass HDP flush
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// in this case.
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if (agent_->isa()->GetMajorVersion() == 9) {
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hdp_flush_support_ = true;
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hdp_flush_support_ = link.info.link_type != HSA_AMD_LINK_INFO_TYPE_XGMI;
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}
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// Allocate queue buffer.
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