SWDEV-286739 - Support hipDeviceAttributeWallClockRate

Part 1: Query constant frequence of wall clock from RocR

Change-Id: I52cbba6d67d11cde6d019c5ab530059f426a9bf2


[ROCm/clr commit: 1e26165cd0]

projects/clr/rocclr/device/device.hpp

@@ -297,6 +297,9 @@ struct Info : public amd::EmbeddedObject {
   //! Maximum configured memory clock frequency of the device in MHz.
   uint32_t maxMemoryClockFrequency_;
 
+  //! The constant frequency of wall clock in KHz
+  uint32_t wallClockFrequency_;
+
   //! Memory bus width in bits.
   uint32_t vramBusBitWidth_;
 

projects/clr/rocclr/device/pal/paldevice.cpp

@@ -351,6 +351,7 @@ void NullDevice::fillDeviceInfo(const Pal::DeviceProperties& palProp,
   info_.maxMemoryClockFrequency_ = (palProp.gpuMemoryProperties.performance.maxMemClock != 0)
       ? palProp.gpuMemoryProperties.performance.maxMemClock
       : 555;
+  info_.wallClockFrequency_ = palProp.timestampFrequency / 1000; // in KHz
   info_.vramBusBitWidth_ = palProp.gpuMemoryProperties.performance.vramBusBitWidth;
   info_.l2CacheSize_ = palProp.gfxipProperties.shaderCore.tccSizeInBytes;
   info_.maxParameterSize_ = 1024;

projects/clr/rocclr/device/rocm/rocdevice.cpp

@@ -1164,6 +1164,14 @@ bool Device::populateOCLDeviceConstants() {
       return false;
   }
 
+  uint64_t wallClockFrequency = 0; // in Hz
+  if (HSA_STATUS_SUCCESS !=
+      hsa_agent_get_info(bkendDevice_, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_TIMESTAMP_FREQUENCY ,
+          &wallClockFrequency)) {
+    LogWarning("HSA_AMD_AGENT_INFO_TIMESTAMP_FREQUENCY cannot be queried. Ignored!");
+  }
+  info_.wallClockFrequency_ = static_cast<uint32_t>(wallClockFrequency / 1000); // in KHz
+
   if (HSA_STATUS_SUCCESS !=
       hsa_agent_get_info(bkendDevice_,
                          static_cast<hsa_agent_info_t>(HSA_AMD_AGENT_INFO_MEMORY_WIDTH),