Merge pull request #121 from AMDResearch/agg-l2-per-channel
Agg L2 per channel stats
[ROCm/rocprofiler-compute commit: 22edc18eb4]
This commit is contained in:
Cole Ramos
GitHub
File diff suppressed because one or more lines are too long
@@ -176,9 +176,12 @@ Panel Config:
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unit: ( + $normUnit)
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tips:
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L1-L2 BW:
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avg: AVG(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
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min: MIN(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
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max: MAX(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
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avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
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+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
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min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
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+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
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max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
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+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
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unit: (Bytes + $normUnit)
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tips:
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L1-L2 Read:
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+891
-1
@@ -10,6 +10,896 @@ Panel Config:
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data source:
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- metric_table:
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id: 1801
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title: Aggregate Stats (All 32 channels)
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header:
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metric: Metric
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mean: Mean
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std dev: Std Dev
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min: Min
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max: Max
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units: Units
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tips: Tips
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metric:
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L2 Cache Hit Rate:
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mean: AVG(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1]))
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+ (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 *
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TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8]))
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+ (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100
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* TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15]))
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+ (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100
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* TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22]))
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+ (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100
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* TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29]))
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+ (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0]
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+ TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2]))
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+ (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5]
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+ TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7]))
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+ (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10]
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+ TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12]))
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+ (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15]
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+ TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17]))
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+ (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20]
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+ TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22]))
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+ (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25]
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+ TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27]))
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+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
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+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0]
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+ TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2]))
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+ (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5]
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+ TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7]))
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+ (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10]
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+ TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12]))
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+ (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15]
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+ TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17]))
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+ (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20]
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+ TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22]))
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+ (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25]
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+ TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27]))
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+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[29] + TCC_HIT[29])) + (TCC_MISS[30]
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+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None))
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std dev: STD(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1]))
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+ (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 *
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TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8]))
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+ (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100
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* TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15]))
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+ (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100
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* TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22]))
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+ (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100
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* TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29]))
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+ (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0]
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+ TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2]))
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+ (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5]
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+ TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7]))
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+ (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10]
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+ TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12]))
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+ (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15]
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+ TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17]))
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+ (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20]
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+ TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22]))
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+ (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25]
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+ TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27]))
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+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
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+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0]
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+ TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2]))
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+ (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5]
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+ TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7]))
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+ (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10]
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+ TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12]))
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+ (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15]
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+ TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17]))
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+ (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20]
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+ TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22]))
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+ (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25]
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+ TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27]))
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+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
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+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None))
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min: MIN(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1]))
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+ (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 *
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TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8]))
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+ (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100
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* TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15]))
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+ (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100
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* TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22]))
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+ (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100
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* TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29]))
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+ (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0]
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+ TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2]))
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+ (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5]
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+ TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7]))
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+ (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10]
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+ TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12]))
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+ (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15]
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+ TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17]))
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+ (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20]
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+ TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22]))
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+ (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25]
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+ TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27]))
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+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
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+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0]
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+ TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2]))
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+ (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5]
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+ TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7]))
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+ (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10]
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+ TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12]))
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+ (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15]
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+ TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17]))
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+ (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20]
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+ TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22]))
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+ (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25]
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+ TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27]))
|
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+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
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+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None))
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max: MAX(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1]))
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+ (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 *
|
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TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8]))
|
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+ (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100
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* TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15]))
|
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+ (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100
|
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* TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22]))
|
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+ (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100
|
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* TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29]))
|
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+ (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0]
|
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+ TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2]))
|
||||
+ (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5]
|
||||
+ TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7]))
|
||||
+ (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10]
|
||||
+ TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12]))
|
||||
+ (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15]
|
||||
+ TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17]))
|
||||
+ (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20]
|
||||
+ TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22]))
|
||||
+ (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25]
|
||||
+ TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27]))
|
||||
+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
|
||||
+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0]
|
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+ TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2]))
|
||||
+ (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5]
|
||||
+ TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7]))
|
||||
+ (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10]
|
||||
+ TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12]))
|
||||
+ (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15]
|
||||
+ TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17]))
|
||||
+ (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20]
|
||||
+ TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22]))
|
||||
+ (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25]
|
||||
+ TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27]))
|
||||
+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
|
||||
+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None))
|
||||
units: pct
|
||||
tips:
|
||||
Req:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1]))
|
||||
+ TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5]))
|
||||
+ TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9]))
|
||||
+ TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13]))
|
||||
+ TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17]))
|
||||
+ TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21]))
|
||||
+ TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25]))
|
||||
+ TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29]))
|
||||
+ TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1]))
|
||||
+ TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5]))
|
||||
+ TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9]))
|
||||
+ TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13]))
|
||||
+ TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17]))
|
||||
+ TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21]))
|
||||
+ TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25]))
|
||||
+ TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29]))
|
||||
+ TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1]))
|
||||
+ TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5]))
|
||||
+ TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9]))
|
||||
+ TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13]))
|
||||
+ TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17]))
|
||||
+ TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21]))
|
||||
+ TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25]))
|
||||
+ TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29]))
|
||||
+ TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1]))
|
||||
+ TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5]))
|
||||
+ TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9]))
|
||||
+ TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13]))
|
||||
+ TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17]))
|
||||
+ TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21]))
|
||||
+ TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25]))
|
||||
+ TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29]))
|
||||
+ TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom))
|
||||
units: ( $normUnit )
|
||||
tips:
|
||||
L1 - L2 Read Req:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1]))
|
||||
+ TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5]))
|
||||
+ TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9]))
|
||||
+ TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) +
|
||||
TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16]))
|
||||
+ TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) +
|
||||
TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23]))
|
||||
+ TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) +
|
||||
TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30]))
|
||||
+ TO_INT(TCC_READ[31])) / 32) / $denom))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1]))
|
||||
+ TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5]))
|
||||
+ TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9]))
|
||||
+ TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) +
|
||||
TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16]))
|
||||
+ TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) +
|
||||
TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23]))
|
||||
+ TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) +
|
||||
TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30]))
|
||||
+ TO_INT(TCC_READ[31])) / 32) / $denom))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1]))
|
||||
+ TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5]))
|
||||
+ TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9]))
|
||||
+ TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) +
|
||||
TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16]))
|
||||
+ TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) +
|
||||
TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23]))
|
||||
+ TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) +
|
||||
TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30]))
|
||||
+ TO_INT(TCC_READ[31])) / 32) / $denom))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1]))
|
||||
+ TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5]))
|
||||
+ TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9]))
|
||||
+ TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) +
|
||||
TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16]))
|
||||
+ TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) +
|
||||
TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23]))
|
||||
+ TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) +
|
||||
TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30]))
|
||||
+ TO_INT(TCC_READ[31])) / 32) / $denom))
|
||||
units: ( $normUnit )
|
||||
tips:
|
||||
L1 - L2 Write Req:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1]))
|
||||
+ TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) +
|
||||
TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8]))
|
||||
+ TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11]))
|
||||
+ TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14]))
|
||||
+ TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17]))
|
||||
+ TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20]))
|
||||
+ TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23]))
|
||||
+ TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26]))
|
||||
+ TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29]))
|
||||
+ TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1]))
|
||||
+ TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) +
|
||||
TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8]))
|
||||
+ TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11]))
|
||||
+ TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14]))
|
||||
+ TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17]))
|
||||
+ TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20]))
|
||||
+ TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23]))
|
||||
+ TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26]))
|
||||
+ TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29]))
|
||||
+ TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1]))
|
||||
+ TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) +
|
||||
TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8]))
|
||||
+ TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11]))
|
||||
+ TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14]))
|
||||
+ TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17]))
|
||||
+ TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20]))
|
||||
+ TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23]))
|
||||
+ TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26]))
|
||||
+ TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29]))
|
||||
+ TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1]))
|
||||
+ TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) +
|
||||
TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8]))
|
||||
+ TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11]))
|
||||
+ TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14]))
|
||||
+ TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17]))
|
||||
+ TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20]))
|
||||
+ TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23]))
|
||||
+ TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26]))
|
||||
+ TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29]))
|
||||
+ TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom))
|
||||
units: ( $normUnit )
|
||||
tips:
|
||||
L1 - L2 Atomic Req:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1]))
|
||||
+ TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4]))
|
||||
+ TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7]))
|
||||
+ TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10]))
|
||||
+ TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13]))
|
||||
+ TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16]))
|
||||
+ TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19]))
|
||||
+ TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22]))
|
||||
+ TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25]))
|
||||
+ TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28]))
|
||||
+ TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31]))
|
||||
/ 32) / $denom))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1]))
|
||||
+ TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4]))
|
||||
+ TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7]))
|
||||
+ TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10]))
|
||||
+ TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13]))
|
||||
+ TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16]))
|
||||
+ TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19]))
|
||||
+ TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22]))
|
||||
+ TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25]))
|
||||
+ TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28]))
|
||||
+ TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31]))
|
||||
/ 32) / $denom))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1]))
|
||||
+ TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4]))
|
||||
+ TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7]))
|
||||
+ TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10]))
|
||||
+ TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13]))
|
||||
+ TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16]))
|
||||
+ TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19]))
|
||||
+ TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22]))
|
||||
+ TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25]))
|
||||
+ TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28]))
|
||||
+ TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31]))
|
||||
/ 32) / $denom))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1]))
|
||||
+ TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4]))
|
||||
+ TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7]))
|
||||
+ TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10]))
|
||||
+ TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13]))
|
||||
+ TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16]))
|
||||
+ TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19]))
|
||||
+ TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22]))
|
||||
+ TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25]))
|
||||
+ TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28]))
|
||||
+ TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31]))
|
||||
/ 32) / $denom))
|
||||
units: ( $normUnit )
|
||||
tips:
|
||||
L2 - EA Read Req:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1]))
|
||||
+ TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4]))
|
||||
+ TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7]))
|
||||
+ TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10]))
|
||||
+ TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13]))
|
||||
+ TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16]))
|
||||
+ TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19]))
|
||||
+ TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22]))
|
||||
+ TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25]))
|
||||
+ TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28]))
|
||||
+ TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31]))
|
||||
/ 32) / $denom))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1]))
|
||||
+ TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4]))
|
||||
+ TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7]))
|
||||
+ TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10]))
|
||||
+ TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13]))
|
||||
+ TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16]))
|
||||
+ TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19]))
|
||||
+ TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22]))
|
||||
+ TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25]))
|
||||
+ TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28]))
|
||||
+ TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31]))
|
||||
/ 32) / $denom))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1]))
|
||||
+ TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4]))
|
||||
+ TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7]))
|
||||
+ TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10]))
|
||||
+ TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13]))
|
||||
+ TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16]))
|
||||
+ TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19]))
|
||||
+ TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22]))
|
||||
+ TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25]))
|
||||
+ TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28]))
|
||||
+ TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31]))
|
||||
/ 32) / $denom))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1]))
|
||||
+ TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4]))
|
||||
+ TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7]))
|
||||
+ TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10]))
|
||||
+ TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13]))
|
||||
+ TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16]))
|
||||
+ TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19]))
|
||||
+ TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22]))
|
||||
+ TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25]))
|
||||
+ TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28]))
|
||||
+ TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31]))
|
||||
/ 32) / $denom))
|
||||
units: ( $normUnit )
|
||||
tips:
|
||||
L2 - EA Write Req:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1]))
|
||||
+ TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4]))
|
||||
+ TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7]))
|
||||
+ TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10]))
|
||||
+ TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13]))
|
||||
+ TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16]))
|
||||
+ TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19]))
|
||||
+ TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22]))
|
||||
+ TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25]))
|
||||
+ TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28]))
|
||||
+ TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31]))
|
||||
/ 32) / $denom))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1]))
|
||||
+ TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4]))
|
||||
+ TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7]))
|
||||
+ TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10]))
|
||||
+ TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13]))
|
||||
+ TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16]))
|
||||
+ TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19]))
|
||||
+ TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22]))
|
||||
+ TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25]))
|
||||
+ TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28]))
|
||||
+ TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31]))
|
||||
/ 32) / $denom))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1]))
|
||||
+ TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4]))
|
||||
+ TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7]))
|
||||
+ TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10]))
|
||||
+ TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13]))
|
||||
+ TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16]))
|
||||
+ TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19]))
|
||||
+ TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22]))
|
||||
+ TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25]))
|
||||
+ TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28]))
|
||||
+ TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31]))
|
||||
/ 32) / $denom))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1]))
|
||||
+ TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4]))
|
||||
+ TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7]))
|
||||
+ TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10]))
|
||||
+ TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13]))
|
||||
+ TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16]))
|
||||
+ TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19]))
|
||||
+ TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22]))
|
||||
+ TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25]))
|
||||
+ TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28]))
|
||||
+ TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31]))
|
||||
/ 32) / $denom))
|
||||
units: ( $normUnit )
|
||||
tips:
|
||||
L2 - EA Atomic Req:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31]))
|
||||
/ 32) / $denom))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31]))
|
||||
/ 32) / $denom))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31]))
|
||||
/ 32) / $denom))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28]))
|
||||
+ TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31]))
|
||||
/ 32) / $denom))
|
||||
units: ( $normUnit )
|
||||
tips:
|
||||
L2 - EA Read Lat:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1])
|
||||
+ TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4])
|
||||
+ TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7])
|
||||
+ TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10])
|
||||
+ TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13])
|
||||
+ TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16])
|
||||
+ TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19])
|
||||
+ TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22])
|
||||
+ TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25])
|
||||
+ TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28])
|
||||
+ TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2])
|
||||
+ TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6])
|
||||
+ TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10])
|
||||
+ TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14])
|
||||
+ TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18])
|
||||
+ TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22])
|
||||
+ TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26])
|
||||
+ TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30])
|
||||
+ TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] +
|
||||
TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4])
|
||||
+ TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8])
|
||||
+ TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12])
|
||||
+ TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16])
|
||||
+ TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20])
|
||||
+ TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24])
|
||||
+ TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28])
|
||||
+ TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1])
|
||||
+ TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4])
|
||||
+ TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7])
|
||||
+ TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10])
|
||||
+ TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13])
|
||||
+ TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16])
|
||||
+ TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19])
|
||||
+ TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22])
|
||||
+ TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25])
|
||||
+ TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28])
|
||||
+ TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2])
|
||||
+ TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6])
|
||||
+ TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10])
|
||||
+ TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14])
|
||||
+ TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18])
|
||||
+ TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22])
|
||||
+ TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26])
|
||||
+ TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30])
|
||||
+ TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] +
|
||||
TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4])
|
||||
+ TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8])
|
||||
+ TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12])
|
||||
+ TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16])
|
||||
+ TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20])
|
||||
+ TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24])
|
||||
+ TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28])
|
||||
+ TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1])
|
||||
+ TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4])
|
||||
+ TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7])
|
||||
+ TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10])
|
||||
+ TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13])
|
||||
+ TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16])
|
||||
+ TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19])
|
||||
+ TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22])
|
||||
+ TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25])
|
||||
+ TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28])
|
||||
+ TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2])
|
||||
+ TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6])
|
||||
+ TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10])
|
||||
+ TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14])
|
||||
+ TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18])
|
||||
+ TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22])
|
||||
+ TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26])
|
||||
+ TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30])
|
||||
+ TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] +
|
||||
TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4])
|
||||
+ TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8])
|
||||
+ TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12])
|
||||
+ TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16])
|
||||
+ TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20])
|
||||
+ TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24])
|
||||
+ TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28])
|
||||
+ TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1])
|
||||
+ TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4])
|
||||
+ TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7])
|
||||
+ TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10])
|
||||
+ TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13])
|
||||
+ TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16])
|
||||
+ TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19])
|
||||
+ TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22])
|
||||
+ TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25])
|
||||
+ TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28])
|
||||
+ TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2])
|
||||
+ TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6])
|
||||
+ TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10])
|
||||
+ TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14])
|
||||
+ TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18])
|
||||
+ TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22])
|
||||
+ TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26])
|
||||
+ TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30])
|
||||
+ TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] +
|
||||
TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4])
|
||||
+ TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8])
|
||||
+ TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12])
|
||||
+ TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16])
|
||||
+ TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20])
|
||||
+ TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24])
|
||||
+ TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28])
|
||||
+ TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None))
|
||||
units: Cycles
|
||||
tips:
|
||||
L2 - EA Write Lat:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1])
|
||||
+ TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4])
|
||||
+ TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7])
|
||||
+ TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10])
|
||||
+ TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13])
|
||||
+ TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16])
|
||||
+ TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19])
|
||||
+ TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22])
|
||||
+ TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25])
|
||||
+ TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28])
|
||||
+ TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2])
|
||||
+ TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6])
|
||||
+ TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10])
|
||||
+ TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14])
|
||||
+ TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18])
|
||||
+ TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22])
|
||||
+ TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26])
|
||||
+ TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30])
|
||||
+ TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] +
|
||||
TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4])
|
||||
+ TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8])
|
||||
+ TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12])
|
||||
+ TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16])
|
||||
+ TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20])
|
||||
+ TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24])
|
||||
+ TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28])
|
||||
+ TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1])
|
||||
+ TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4])
|
||||
+ TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7])
|
||||
+ TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10])
|
||||
+ TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13])
|
||||
+ TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16])
|
||||
+ TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19])
|
||||
+ TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22])
|
||||
+ TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25])
|
||||
+ TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28])
|
||||
+ TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2])
|
||||
+ TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6])
|
||||
+ TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10])
|
||||
+ TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14])
|
||||
+ TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18])
|
||||
+ TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22])
|
||||
+ TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26])
|
||||
+ TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30])
|
||||
+ TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] +
|
||||
TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4])
|
||||
+ TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8])
|
||||
+ TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12])
|
||||
+ TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16])
|
||||
+ TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20])
|
||||
+ TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24])
|
||||
+ TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28])
|
||||
+ TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1])
|
||||
+ TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4])
|
||||
+ TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7])
|
||||
+ TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10])
|
||||
+ TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13])
|
||||
+ TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16])
|
||||
+ TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19])
|
||||
+ TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22])
|
||||
+ TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25])
|
||||
+ TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28])
|
||||
+ TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2])
|
||||
+ TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6])
|
||||
+ TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10])
|
||||
+ TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14])
|
||||
+ TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18])
|
||||
+ TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22])
|
||||
+ TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26])
|
||||
+ TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30])
|
||||
+ TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] +
|
||||
TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4])
|
||||
+ TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8])
|
||||
+ TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12])
|
||||
+ TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16])
|
||||
+ TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20])
|
||||
+ TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24])
|
||||
+ TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28])
|
||||
+ TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1])
|
||||
+ TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4])
|
||||
+ TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7])
|
||||
+ TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10])
|
||||
+ TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13])
|
||||
+ TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16])
|
||||
+ TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19])
|
||||
+ TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22])
|
||||
+ TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25])
|
||||
+ TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28])
|
||||
+ TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2])
|
||||
+ TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6])
|
||||
+ TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10])
|
||||
+ TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14])
|
||||
+ TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18])
|
||||
+ TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22])
|
||||
+ TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26])
|
||||
+ TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30])
|
||||
+ TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] +
|
||||
TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4])
|
||||
+ TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8])
|
||||
+ TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12])
|
||||
+ TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16])
|
||||
+ TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20])
|
||||
+ TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24])
|
||||
+ TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28])
|
||||
+ TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None))
|
||||
units: Cycles
|
||||
tips:
|
||||
L2 - EA Atomic Lat:
|
||||
mean: AVG((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1])
|
||||
+ TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4])
|
||||
+ TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7])
|
||||
+ TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10])
|
||||
+ TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13])
|
||||
+ TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16])
|
||||
+ TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19])
|
||||
+ TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22])
|
||||
+ TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25])
|
||||
+ TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28])
|
||||
+ TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2])
|
||||
+ TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6])
|
||||
+ TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10])
|
||||
+ TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14])
|
||||
+ TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18])
|
||||
+ TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22])
|
||||
+ TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26])
|
||||
+ TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30])
|
||||
+ TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0]
|
||||
+ TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4])
|
||||
+ TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8])
|
||||
+ TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12])
|
||||
+ TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16])
|
||||
+ TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20])
|
||||
+ TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24])
|
||||
+ TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28])
|
||||
+ TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else
|
||||
None))
|
||||
std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1])
|
||||
+ TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4])
|
||||
+ TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7])
|
||||
+ TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10])
|
||||
+ TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13])
|
||||
+ TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16])
|
||||
+ TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19])
|
||||
+ TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22])
|
||||
+ TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25])
|
||||
+ TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28])
|
||||
+ TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2])
|
||||
+ TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6])
|
||||
+ TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10])
|
||||
+ TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14])
|
||||
+ TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18])
|
||||
+ TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22])
|
||||
+ TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26])
|
||||
+ TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30])
|
||||
+ TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0]
|
||||
+ TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4])
|
||||
+ TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8])
|
||||
+ TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12])
|
||||
+ TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16])
|
||||
+ TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20])
|
||||
+ TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24])
|
||||
+ TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28])
|
||||
+ TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else
|
||||
None))
|
||||
min: MIN((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1])
|
||||
+ TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4])
|
||||
+ TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7])
|
||||
+ TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10])
|
||||
+ TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13])
|
||||
+ TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16])
|
||||
+ TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19])
|
||||
+ TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22])
|
||||
+ TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25])
|
||||
+ TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28])
|
||||
+ TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2])
|
||||
+ TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6])
|
||||
+ TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10])
|
||||
+ TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14])
|
||||
+ TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18])
|
||||
+ TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22])
|
||||
+ TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26])
|
||||
+ TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30])
|
||||
+ TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0]
|
||||
+ TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4])
|
||||
+ TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8])
|
||||
+ TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12])
|
||||
+ TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16])
|
||||
+ TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20])
|
||||
+ TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24])
|
||||
+ TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28])
|
||||
+ TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else
|
||||
None))
|
||||
max: MAX((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1])
|
||||
+ TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4])
|
||||
+ TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7])
|
||||
+ TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10])
|
||||
+ TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13])
|
||||
+ TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16])
|
||||
+ TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19])
|
||||
+ TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22])
|
||||
+ TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25])
|
||||
+ TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28])
|
||||
+ TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31])
|
||||
/ (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2])
|
||||
+ TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6])
|
||||
+ TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10])
|
||||
+ TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14])
|
||||
+ TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18])
|
||||
+ TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22])
|
||||
+ TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26])
|
||||
+ TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30])
|
||||
+ TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0]
|
||||
+ TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4])
|
||||
+ TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8])
|
||||
+ TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12])
|
||||
+ TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16])
|
||||
+ TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20])
|
||||
+ TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24])
|
||||
+ TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28])
|
||||
+ TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else
|
||||
None))
|
||||
units: Cycles
|
||||
tips:
|
||||
L2 - EA Read Stall (IO):
|
||||
mean: None # No perf counter
|
||||
std dev: None # No perf counter
|
||||
min: None # No perf counter
|
||||
max: None # No perf counter
|
||||
units: (Cycles + $normUnit)
|
||||
tips:
|
||||
L2 - EA Read Stall (GMI):
|
||||
mean: None # No perf counter
|
||||
std dev: None # No perf counter
|
||||
min: None # No perf counter
|
||||
max: None # No perf counter
|
||||
units: (Cycles + $normUnit)
|
||||
tips:
|
||||
L2 - EA Read Stall (DRAM):
|
||||
mean: None # No perf counter
|
||||
std dev: None # No perf counter
|
||||
min: None # No perf counter
|
||||
max: None # No perf counter
|
||||
units: (Cycles + $normUnit)
|
||||
tips:
|
||||
L2 - EA Write Stall (IO):
|
||||
mean: None # No perf counter
|
||||
std dev: None # No perf counter
|
||||
min: None # No perf counter
|
||||
max: None # No perf counter
|
||||
units: (Cycles + $normUnit)
|
||||
tips:
|
||||
L2 - EA Write Stall (GMI):
|
||||
mean: None # No perf counter
|
||||
std dev: None # No perf counter
|
||||
min: None # No perf counter
|
||||
max: None # No perf counter
|
||||
units: (Cycles + $normUnit)
|
||||
tips:
|
||||
L2 - EA Write Stall (DRAM):
|
||||
mean: None # No perf counter
|
||||
std dev: None # No perf counter
|
||||
min: None # No perf counter
|
||||
max: None # No perf counter
|
||||
units: (Cycles + $normUnit)
|
||||
tips:
|
||||
L2 - EA Write Starve:
|
||||
mean: None # No perf counter
|
||||
std dev: None # No perf counter
|
||||
min: None # No perf counter
|
||||
max: None # No perf counter
|
||||
units: (Cycles + $normUnit)
|
||||
tips:
|
||||
- metric_table:
|
||||
id: 1802
|
||||
title: Channel 0-15
|
||||
columnwise: True
|
||||
header:
|
||||
@@ -484,7 +1374,7 @@ Panel Config:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1802
|
||||
id: 1803
|
||||
title: Channel 16-31
|
||||
columnwise: True
|
||||
header:
|
||||
|
||||
@@ -176,9 +176,12 @@ Panel Config:
|
||||
unit: ( + $normUnit)
|
||||
tips:
|
||||
L1-L2 BW:
|
||||
avg: AVG(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
min: MIN(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
max: MAX(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
L1-L2 Read:
|
||||
|
||||
+1339
-1
File diff suppressed because it is too large
Load Diff
-1
@@ -117,7 +117,6 @@ Panel Config:
|
||||
tips:
|
||||
Conversion:
|
||||
count: AVG((SQ_INSTS_VALU_CVT / $denom))
|
||||
unit: (# instr + $normUnit)
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
|
||||
|
||||
@@ -176,9 +176,12 @@ Panel Config:
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
L1-L2 BW:
|
||||
avg: AVG(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
min: MIN(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
max: MAX(((64 * (TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
L1-L2 Read:
|
||||
|
||||
+1339
-1
File diff suppressed because it is too large
Load Diff
@@ -36,7 +36,7 @@ import os
|
||||
import argparse
|
||||
from pathlib import Path
|
||||
|
||||
input_file_path = '../../../../dashboards/Omniperf_v1.0.3_pub.json'
|
||||
input_file_path = '../../../../dashboards/Omniperf_v1.0.8_pub.json'
|
||||
#df = pd.read_json(file_path)
|
||||
|
||||
staging_path = "./staging/"
|
||||
@@ -90,6 +90,7 @@ supported_call = {
|
||||
# simple aggr
|
||||
"$avg": "AVG",
|
||||
"$median": "MEDIAN",
|
||||
"$stdDevPop": "STD",
|
||||
|
||||
# If the below has single arg, like(expr), it is a aggr.
|
||||
# If it has args like list [], support scalar only for now.
|
||||
@@ -1006,9 +1007,10 @@ def gen_from_modified_query():
|
||||
215: "Dispatch IDs - Baseline", # Unnecessary
|
||||
157: "Kernel Time Histogram", # Not supported yet
|
||||
171: "Memory Chart (Normalization: $normUnit)", # Not supported yet
|
||||
237: "$soc Roofline", # Not supported yet
|
||||
253: "EMPIRICAL-ROOFLINE-MI200",
|
||||
251: "TOP-DISPATCHES",
|
||||
253: "EMPIRICAL-ROOFLINE-FP32FP64-MI200",
|
||||
312: "EMPIRICAL-ROOFLINE-FP16INT8-MI200",
|
||||
|
||||
|
||||
# manual
|
||||
159: "System Info", # raw_csv_table with redifined name for each item
|
||||
|
||||
+5
@@ -2,6 +2,7 @@
|
||||
{"$project": {
|
||||
"_id": 0,
|
||||
"date":1,
|
||||
"command": 1,
|
||||
"host_name": 1,
|
||||
"host_cpu": 1,
|
||||
"host_distro": 1,
|
||||
@@ -31,6 +32,10 @@
|
||||
"Metric":"Date",
|
||||
"Value": "&date"
|
||||
},
|
||||
{
|
||||
"Metric":"App Command",
|
||||
"Value": "&command"
|
||||
},
|
||||
{
|
||||
"Metric":"Host Name",
|
||||
"Value": "&host_name"
|
||||
|
||||
-56
@@ -1,56 +0,0 @@
|
||||
[
|
||||
{"$match": {
|
||||
"Index": { "$in": [${DispatchIDFilter:raw}] },
|
||||
"gpu-id": { "$in": [${gpuFilter:raw}] },
|
||||
"KernelName": { "$in": ${KernelNameFilter:json}}
|
||||
}},
|
||||
{"$group": {
|
||||
"_id": null,
|
||||
"mmfa_i8": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_I8", "&SQ_WAVES" ] }
|
||||
},
|
||||
"mmfa_f16": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F16", "&SQ_WAVES" ] }
|
||||
},
|
||||
"mmfa_bf16": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_BF16", "&SQ_WAVES" ] }
|
||||
},
|
||||
"mfma_f32": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F32", "&SQ_WAVES" ] }
|
||||
},
|
||||
"mfma_f64": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F64", "&SQ_WAVES" ] }
|
||||
}
|
||||
}
|
||||
},
|
||||
{"$set": {
|
||||
"array": [
|
||||
{
|
||||
"type": "MFMA-I8",
|
||||
"count": "&mmfa_i8"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F16",
|
||||
"count": "&mmfa_f16"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-BF16",
|
||||
"count": "&mmfa_bf16"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F32",
|
||||
"count": "&mfma_f32"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F64",
|
||||
"count": "&mfma_f64"
|
||||
}
|
||||
]
|
||||
}},
|
||||
{"$unwind": {
|
||||
"path": "&array"
|
||||
}},
|
||||
{"$replaceRoot": {
|
||||
"newRoot": "&array"
|
||||
}}
|
||||
]
|
||||
+77
@@ -0,0 +1,77 @@
|
||||
[
|
||||
{"$match": {
|
||||
"Index": { "$in": [${DispatchIDFilter:raw}] },
|
||||
"gpu-id": { "$in": [${gpuFilter:raw}] },
|
||||
"KernelName": { "$in": ${KernelNameFilter:json}}
|
||||
}},
|
||||
{"$addFields": {
|
||||
"denom": {
|
||||
"$switch" : {
|
||||
"branches": [
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Wave"]} ,
|
||||
"then": "&SQ_WAVES"
|
||||
},
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Cycle"]} ,
|
||||
"then": "&GRBM_GUI_ACTIVE"
|
||||
},
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Sec"]} ,
|
||||
"then": {"$divide":[{"$subtract": ["&EndNs", "&BeginNs" ]}, 1000000000]}
|
||||
}
|
||||
],
|
||||
"default": 1
|
||||
}
|
||||
}
|
||||
}},
|
||||
{"$group": {
|
||||
"_id": null,
|
||||
"mfma_i8": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_I8", "&denom" ] }
|
||||
},
|
||||
"mfma_f16": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F16", "&denom" ] }
|
||||
},
|
||||
"mfma_bf16": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_BF16", "&denom" ] }
|
||||
},
|
||||
"mfma_f32": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F32", "&denom" ] }
|
||||
},
|
||||
"mfma_f64": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F64", "&denom" ] }
|
||||
}
|
||||
}
|
||||
},
|
||||
{"$set": {
|
||||
"array": [
|
||||
{
|
||||
"type": "MFMA-I8",
|
||||
"count": "&mfma_i8"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F16",
|
||||
"count": "&mfma_f16"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-BF16",
|
||||
"count": "&mfma_bf16"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F32",
|
||||
"count": "&mfma_f32"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F64",
|
||||
"count": "&mfma_f64"
|
||||
}
|
||||
]
|
||||
}},
|
||||
{"$unwind": {
|
||||
"path": "&array"
|
||||
}},
|
||||
{"$replaceRoot": {
|
||||
"newRoot": "&array"
|
||||
}}
|
||||
]
|
||||
+4
-3
@@ -22,9 +22,10 @@
|
||||
]
|
||||
}
|
||||
},
|
||||
|
||||
"cacheBW_pct": {
|
||||
"$avg": { "$divide": [ {"$multiply":[100, "&TCP_TOTAL_CACHE_ACCESSES_sum"]},
|
||||
{"$multiply":["&GRBM_GUI_ACTIVE", $numCU, 4]}
|
||||
"$avg": { "$divide": [ {"$multiply":[64, "&TCP_TOTAL_CACHE_ACCESSES_sum"]},
|
||||
{"$subtract":["&EndNs", "&BeginNs"]}
|
||||
]
|
||||
}
|
||||
},
|
||||
@@ -51,7 +52,7 @@
|
||||
{
|
||||
"Buffer Coalescing": "&bufferCoalescing_pct",
|
||||
"Cache Util": "&cacheUtil_pct",
|
||||
"Cache BW": "&cacheBW_pct",
|
||||
"Cache BW": { "$divide": [{ "$multiply": [100, "&cacheBW_pct"] }, { "$multiply": [ { "$multiply": [{ "$divide": [$sclk, 1000] }, 64] }, $numCU]}] },
|
||||
"Cache Hit": "&cacheHit_pct"
|
||||
}
|
||||
]
|
||||
|
||||
+45
-24
@@ -44,6 +44,10 @@
|
||||
"atomicReq_min":{"$min": {"$divide": [ { "$add": ["&TCP_TOTAL_ATOMIC_WITH_RET_sum", "&TCP_TOTAL_ATOMIC_WITHOUT_RET_sum"] }, "&denom"]}},
|
||||
"atomicReq_max":{"$max": {"$divide": [ { "$add": ["&TCP_TOTAL_ATOMIC_WITH_RET_sum", "&TCP_TOTAL_ATOMIC_WITHOUT_RET_sum"] }, "&denom"]}},
|
||||
|
||||
"cacheBW_avg":{"$avg": { "$divide": [{ "$multiply": ["&TCP_TOTAL_CACHE_ACCESSES_sum", 64 ] }, { "$subtract": ["&EndNs", "&BeginNs"] } ] }},
|
||||
"cacheBW_min":{"$min": { "$divide": [{ "$multiply": ["&TCP_TOTAL_CACHE_ACCESSES_sum", 64 ] }, { "$subtract": ["&EndNs", "&BeginNs"] } ] }},
|
||||
"cacheBW_max":{"$max": { "$divide": [{ "$multiply": ["&TCP_TOTAL_CACHE_ACCESSES_sum", 64 ] }, { "$subtract": ["&EndNs", "&BeginNs"] } ] }},
|
||||
|
||||
"cacheAccess_avg":{"$avg": {"$divide": [ "&TCP_TOTAL_CACHE_ACCESSES_sum", "&denom"]}},
|
||||
"cacheAccess_min":{"$min": {"$divide": [ "&TCP_TOTAL_CACHE_ACCESSES_sum", "&denom"]}},
|
||||
"cacheAccess_max":{"$max": {"$divide": [ "&TCP_TOTAL_CACHE_ACCESSES_sum", "&denom"]}},
|
||||
@@ -115,20 +119,23 @@
|
||||
null
|
||||
]
|
||||
}},
|
||||
|
||||
"l2_l1_read_avg":{"$avg": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2_l1_read_min":{"$min": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2_l1_read_max":{"$max": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
|
||||
"l2_l1_write_avg":{"$avg": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
"l2_l1_write_min":{"$min": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
"l2_l1_write_max":{"$max": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
|
||||
|
||||
"l2TCRRead_avg":{"$avg": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2TCRRead_min":{"$min": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2TCRRead_max":{"$max": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2_l1_atomic_avg":{"$avg": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2_l1_atomic_min":{"$min": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2_l1_atomic_max":{"$max": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
|
||||
|
||||
"l2Write_avg":{"$avg": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
"l2Write_min":{"$min": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
"l2Write_max":{"$max": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
|
||||
"l2Atomic_avg":{"$avg": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2Atomic_min":{"$min": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2Atomic_max":{"$max": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2_l1_bw_avg":{"$avg": {"$divide": [{"$multiply": [64, {"$add": ["&TCP_TCC_READ_REQ_sum", "&TCP_TCC_WRITE_REQ_sum", "&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] } ]}, "&denom" ]}},
|
||||
"l2_l1_bw_min":{"$min": {"$divide": [{"$multiply": [64, {"$add": ["&TCP_TCC_READ_REQ_sum", "&TCP_TCC_WRITE_REQ_sum", "&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] } ]}, "&denom" ]}},
|
||||
"l2_l1_bw_max":{"$max": {"$divide": [{"$multiply": [64, {"$add": ["&TCP_TCC_READ_REQ_sum", "&TCP_TCC_WRITE_REQ_sum", "&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] } ]}, "&denom" ]}},
|
||||
|
||||
"invalidate_avg":{"$avg": {"$divide": [ "&TCP_TOTAL_WRITEBACK_INVALIDATES_sum", "&denom"] }},
|
||||
"invalidate_min":{"$min": {"$divide": [ "&TCP_TOTAL_WRITEBACK_INVALIDATES_sum", "&denom"] }},
|
||||
@@ -229,11 +236,18 @@
|
||||
},
|
||||
{
|
||||
"metric": "Atomic Req",
|
||||
"avg": "&atomicReq_avg",
|
||||
"min": "&atomicReq_min",
|
||||
"max": "&atomicReq_max",
|
||||
"avg": "&l2_l1_atomic_avg",
|
||||
"min": "&l2_l1_atomic_min",
|
||||
"max": "&l2_l1_atomic_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "Cache BW",
|
||||
"avg": "&cacheBW_avg",
|
||||
"min": "&cacheBW_min",
|
||||
"max": "&cacheBW_max",
|
||||
"Unit": "GB/s"
|
||||
},
|
||||
{
|
||||
"metric": "Cache Accesses",
|
||||
"avg": "&cacheAccess_avg",
|
||||
@@ -263,24 +277,31 @@
|
||||
"Unit": {"$concat": ["", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "L1-TCR Read",
|
||||
"avg": "&l2TCRRead_avg",
|
||||
"min": "&l2TCRRead_min",
|
||||
"max": "&l2TCRRead_max",
|
||||
"metric": "L1-L2 BW",
|
||||
"avg": "&l2_l1_bw_avg",
|
||||
"min": "&l2_l1_bw_avg",
|
||||
"max": "&l2_l1_bw_avg",
|
||||
"Unit": {"$concat": ["Bytes ", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "L1-L2 Read",
|
||||
"avg": "&l2_l1_read_avg",
|
||||
"min": "&l2_l1_read_min",
|
||||
"max": "&l2_l1_read_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "L1-L2 Write",
|
||||
"avg": "&l2Write_avg",
|
||||
"min": "&l2Write_min",
|
||||
"max": "&l2Write_max",
|
||||
"avg": "&l2_l1_write_avg",
|
||||
"min": "&l2_l1_write_min",
|
||||
"max": "&l2_l1_write_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "L1-L2 Atomic",
|
||||
"avg": "&l2Atomic_avg",
|
||||
"min": "&l2Atomic_min",
|
||||
"max": "&l2Atomic_max",
|
||||
"avg": "&l2_l1_atomic_avg",
|
||||
"min": "&l2_l1_atomic_min",
|
||||
"max": "&l2_l1_atomic_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
},
|
||||
{
|
||||
|
||||
+12
-12
@@ -145,7 +145,7 @@
|
||||
{
|
||||
"Xfer": "Read",
|
||||
"Coherency": "NC",
|
||||
"Mean": "&readNC_avg",
|
||||
"Avg": "&readNC_avg",
|
||||
"Min": "&readNC_min",
|
||||
"Max": "&readNC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -153,7 +153,7 @@
|
||||
{
|
||||
"Xfer": "Read",
|
||||
"Coherency": "UC",
|
||||
"Mean": "&readUC_avg",
|
||||
"Avg": "&readUC_avg",
|
||||
"Min": "&readUC_min",
|
||||
"Max": "&readUC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -161,7 +161,7 @@
|
||||
{
|
||||
"Xfer": "Read",
|
||||
"Coherency": "CC",
|
||||
"Mean": "&readCC_avg",
|
||||
"Avg": "&readCC_avg",
|
||||
"Min": "&readCC_min",
|
||||
"Max": "&readCC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -169,7 +169,7 @@
|
||||
{
|
||||
"Xfer": "Read",
|
||||
"Coherency": "RW",
|
||||
"Mean": "&readRW_avg",
|
||||
"Avg": "&readRW_avg",
|
||||
"Min": "&readRW_min",
|
||||
"Max": "&readRW_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -177,7 +177,7 @@
|
||||
{
|
||||
"Xfer": "Write",
|
||||
"Coherency": "RW",
|
||||
"Mean": "&writeRW_avg",
|
||||
"Avg": "&writeRW_avg",
|
||||
"Min": "&writeRW_min",
|
||||
"Max": "&writeRW_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -185,7 +185,7 @@
|
||||
{
|
||||
"Xfer": "Write",
|
||||
"Coherency": "NC",
|
||||
"Mean": "&writeNC_avg",
|
||||
"Avg": "&writeNC_avg",
|
||||
"Min": "&writeNC_min",
|
||||
"Max": "&writeNC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -193,7 +193,7 @@
|
||||
{
|
||||
"Xfer": "Write",
|
||||
"Coherency": "UC",
|
||||
"Mean": "&writeUC_avg",
|
||||
"Avg": "&writeUC_avg",
|
||||
"Min": "&writeUC_min",
|
||||
"Max": "&writeUC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -201,7 +201,7 @@
|
||||
{
|
||||
"Xfer": "Write",
|
||||
"Coherency": "CC",
|
||||
"Mean": "&writeCC_avg",
|
||||
"Avg": "&writeCC_avg",
|
||||
"Min": "&writeCC_min",
|
||||
"Max": "&writeCC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -210,7 +210,7 @@
|
||||
{
|
||||
"Xfer": "Atomic",
|
||||
"Coherency": "NC",
|
||||
"Mean": "&atomicNC_avg",
|
||||
"Avg": "&atomicNC_avg",
|
||||
"Min": "&atomicNC_min",
|
||||
"Max": "&atomicNC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -218,7 +218,7 @@
|
||||
{
|
||||
"Xfer": "Atomic",
|
||||
"Coherency": "UC",
|
||||
"Mean": "&atomicUC_avg",
|
||||
"Avg": "&atomicUC_avg",
|
||||
"Min": "&atomicUC_min",
|
||||
"Max": "&atomicUC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -226,7 +226,7 @@
|
||||
{
|
||||
"Xfer": "Atomic",
|
||||
"Coherency": "CC",
|
||||
"Mean": "&atomicCC_avg",
|
||||
"Avg": "&atomicCC_avg",
|
||||
"Min": "&atomicCC_min",
|
||||
"Max": "&atomicCC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -234,7 +234,7 @@
|
||||
{
|
||||
"Xfer": "Atomic",
|
||||
"Coherency": "RW",
|
||||
"Mean": "&atomicRW_avg",
|
||||
"Avg": "&atomicRW_avg",
|
||||
"Min": "&atomicRW_min",
|
||||
"Max": "&atomicRW_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
|
||||
+4793
File diff suppressed because it is too large
Load Diff
+32
-16
@@ -815,7 +815,8 @@
|
||||
"EA Write Stall - IO": "&b0_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b0_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b0_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b0_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b0_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
},
|
||||
{
|
||||
"Channel": "1",
|
||||
@@ -836,7 +837,8 @@
|
||||
"EA Write Stall - IO": "&b1_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b1_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b1_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b1_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b1_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
},
|
||||
{
|
||||
"Channel": "2",
|
||||
@@ -857,7 +859,8 @@
|
||||
"EA Write Stall - IO": "&b2_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b2_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b2_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b2_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b2_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -879,7 +882,8 @@
|
||||
"EA Write Stall - IO": "&b3_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b3_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b3_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b3_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b3_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -901,7 +905,8 @@
|
||||
"EA Write Stall - IO": "&b4_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b4_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b4_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b4_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b4_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -923,7 +928,8 @@
|
||||
"EA Write Stall - IO": "&b5_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b5_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b5_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b5_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b5_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -945,7 +951,8 @@
|
||||
"EA Write Stall - IO": "&b6_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b6_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b6_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b6_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b6_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -967,7 +974,8 @@
|
||||
"EA Write Stall - IO": "&b7_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b7_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b7_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b7_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b7_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -989,7 +997,8 @@
|
||||
"EA Write Stall - IO": "&b8_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b8_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b8_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b8_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b8_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1011,7 +1020,8 @@
|
||||
"EA Write Stall - IO": "&b9_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b9_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b9_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b9_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b9_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1033,7 +1043,8 @@
|
||||
"EA Write Stall - IO": "&b10_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b10_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b10_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b10_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b10_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1055,7 +1066,8 @@
|
||||
"EA Write Stall - IO": "&b11_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b11_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b11_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b11_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b11_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1077,7 +1089,8 @@
|
||||
"EA Write Stall - IO": "&b12_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b12_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b12_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b12_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b12_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1099,7 +1112,8 @@
|
||||
"EA Write Stall - IO": "&b13_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b13_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b13_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b13_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b13_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
|
||||
},
|
||||
@@ -1122,7 +1136,8 @@
|
||||
"EA Write Stall - IO": "&b14_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b14_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b14_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b14_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b14_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
|
||||
},
|
||||
@@ -1145,7 +1160,8 @@
|
||||
"EA Write Stall - IO": "&b15_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b15_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b15_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b15_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b15_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
}
|
||||
]
|
||||
}},
|
||||
+32
-16
@@ -791,7 +791,8 @@
|
||||
"EA Write Stall - IO": "&b16_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b16_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b16_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b16_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b16_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -813,7 +814,8 @@
|
||||
"EA Write Stall - IO": "&b17_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b17_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b17_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b17_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b17_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -835,7 +837,8 @@
|
||||
"EA Write Stall - IO": "&b18_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b18_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b18_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b18_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b18_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -857,7 +860,8 @@
|
||||
"EA Write Stall - IO": "&b19_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b19_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b19_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b19_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b19_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -879,7 +883,8 @@
|
||||
"EA Write Stall - IO": "&b20_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b20_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b20_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b20_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b20_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -901,7 +906,8 @@
|
||||
"EA Write Stall - IO": "&b21_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b21_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b21_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b21_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b21_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -923,7 +929,8 @@
|
||||
"EA Write Stall - IO": "&b22_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b22_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b22_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b22_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b22_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -945,7 +952,8 @@
|
||||
"EA Write Stall - IO": "&b23_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b23_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b23_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b23_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b23_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
|
||||
},
|
||||
@@ -968,7 +976,8 @@
|
||||
"EA Write Stall - IO": "&b24_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b24_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b24_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b24_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b24_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -990,7 +999,8 @@
|
||||
"EA Write Stall - IO": "&b25_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b25_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b25_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b25_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b25_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1012,7 +1022,8 @@
|
||||
"EA Write Stall - IO": "&b26_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b26_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b26_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b26_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b26_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
|
||||
},
|
||||
@@ -1035,7 +1046,8 @@
|
||||
"EA Write Stall - IO": "&b27_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b27_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b27_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b27_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b27_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1057,7 +1069,8 @@
|
||||
"EA Write Stall - IO": "&b28_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b28_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b28_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b28_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b28_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1079,7 +1092,8 @@
|
||||
"EA Write Stall - IO": "&b29_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b29_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b29_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b29_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b29_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1101,7 +1115,8 @@
|
||||
"EA Write Stall - IO": "&b30_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b30_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b30_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b30_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b30_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1123,7 +1138,8 @@
|
||||
"EA Write Stall - IO": "&b31_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b31_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b31_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b31_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b31_ea_write_stall_too_many",
|
||||
"Units": "$denom"
|
||||
|
||||
}
|
||||
]
|
||||
+5
@@ -2,6 +2,7 @@
|
||||
{"$project": {
|
||||
"_id": 0,
|
||||
"date":1,
|
||||
"command": 1,
|
||||
"host_name": 1,
|
||||
"host_cpu": 1,
|
||||
"host_distro": 1,
|
||||
@@ -31,6 +32,10 @@
|
||||
"Metric":"Date",
|
||||
"Value": "&date"
|
||||
},
|
||||
{
|
||||
"Metric":"App Command",
|
||||
"Value": "&command"
|
||||
},
|
||||
{
|
||||
"Metric":"Host Name",
|
||||
"Value": "&host_name"
|
||||
|
||||
-56
@@ -1,56 +0,0 @@
|
||||
[
|
||||
{"$match": {
|
||||
"Index": { "$in": [${DispatchIDFilter:raw}] },
|
||||
"gpu-id": { "$in": [${gpuFilter:raw}] },
|
||||
"KernelName": { "$in": ${KernelNameFilter:json}}
|
||||
}},
|
||||
{"$group": {
|
||||
"_id": null,
|
||||
"mmfa_i8": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_I8", "&SQ_WAVES" ] }
|
||||
},
|
||||
"mmfa_f16": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F16", "&SQ_WAVES" ] }
|
||||
},
|
||||
"mmfa_bf16": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_BF16", "&SQ_WAVES" ] }
|
||||
},
|
||||
"mfma_f32": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F32", "&SQ_WAVES" ] }
|
||||
},
|
||||
"mfma_f64": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F64", "&SQ_WAVES" ] }
|
||||
}
|
||||
}
|
||||
},
|
||||
{"$set": {
|
||||
"array": [
|
||||
{
|
||||
"type": "MFMA-I8",
|
||||
"count": "&mmfa_i8"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F16",
|
||||
"count": "&mmfa_f16"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-BF16",
|
||||
"count": "&mmfa_bf16"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F32",
|
||||
"count": "&mfma_f32"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F64",
|
||||
"count": "&mfma_f64"
|
||||
}
|
||||
]
|
||||
}},
|
||||
{"$unwind": {
|
||||
"path": "&array"
|
||||
}},
|
||||
{"$replaceRoot": {
|
||||
"newRoot": "&array"
|
||||
}}
|
||||
]
|
||||
+77
@@ -0,0 +1,77 @@
|
||||
[
|
||||
{"$match": {
|
||||
"Index": { "$in": [${DispatchIDFilter:raw}] },
|
||||
"gpu-id": { "$in": [${gpuFilter:raw}] },
|
||||
"KernelName": { "$in": ${KernelNameFilter:json}}
|
||||
}},
|
||||
{"$addFields": {
|
||||
"denom": {
|
||||
"$switch" : {
|
||||
"branches": [
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Wave"]} ,
|
||||
"then": "&SQ_WAVES"
|
||||
},
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Cycle"]} ,
|
||||
"then": "&GRBM_GUI_ACTIVE"
|
||||
},
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Sec"]} ,
|
||||
"then": {"$divide":[{"$subtract": ["&EndNs", "&BeginNs" ]}, 1000000000]}
|
||||
}
|
||||
],
|
||||
"default": 1
|
||||
}
|
||||
}
|
||||
}},
|
||||
{"$group": {
|
||||
"_id": null,
|
||||
"mfma_i8": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_I8", "&denom" ] }
|
||||
},
|
||||
"mfma_f16": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F16", "&denom" ] }
|
||||
},
|
||||
"mfma_bf16": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_BF16", "&denom" ] }
|
||||
},
|
||||
"mfma_f32": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F32", "&denom" ] }
|
||||
},
|
||||
"mfma_f64": {
|
||||
"$avg": { "$divide": [ "&SQ_INSTS_VALU_MFMA_F64", "&denom" ] }
|
||||
}
|
||||
}
|
||||
},
|
||||
{"$set": {
|
||||
"array": [
|
||||
{
|
||||
"type": "MFMA-I8",
|
||||
"count": "&mfma_i8"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F16",
|
||||
"count": "&mfma_f16"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-BF16",
|
||||
"count": "&mfma_bf16"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F32",
|
||||
"count": "&mfma_f32"
|
||||
},
|
||||
{
|
||||
"type": "MFMA-F64",
|
||||
"count": "&mfma_f64"
|
||||
}
|
||||
]
|
||||
}},
|
||||
{"$unwind": {
|
||||
"path": "&array"
|
||||
}},
|
||||
{"$replaceRoot": {
|
||||
"newRoot": "&array"
|
||||
}}
|
||||
]
|
||||
+4
-3
@@ -22,9 +22,10 @@
|
||||
]
|
||||
}
|
||||
},
|
||||
|
||||
"cacheBW_pct": {
|
||||
"$avg": { "$divide": [ {"$multiply":[100, "&TCP_TOTAL_CACHE_ACCESSES_sum"]},
|
||||
{"$multiply":["&GRBM_GUI_ACTIVE", $numCU, 4]}
|
||||
"$avg": { "$divide": [ {"$multiply":[64, "&TCP_TOTAL_CACHE_ACCESSES_sum"]},
|
||||
{"$subtract":["&EndNs", "&BeginNs"]}
|
||||
]
|
||||
}
|
||||
},
|
||||
@@ -51,7 +52,7 @@
|
||||
{
|
||||
"Buffer Coalescing": "&bufferCoalescing_pct",
|
||||
"Cache Util": "&cacheUtil_pct",
|
||||
"Cache BW": "&cacheBW_pct",
|
||||
"Cache BW": { "$divide": [{ "$multiply": [100, "&cacheBW_pct"] }, { "$multiply": [ { "$multiply": [{ "$divide": [$sclk, 1000] }, 64] }, $numCU]}] },
|
||||
"Cache Hit": "&cacheHit_pct"
|
||||
}
|
||||
]
|
||||
|
||||
+45
-24
@@ -44,6 +44,10 @@
|
||||
"atomicReq_min":{"$min": {"$divide": [ { "$add": ["&TCP_TOTAL_ATOMIC_WITH_RET_sum", "&TCP_TOTAL_ATOMIC_WITHOUT_RET_sum"] }, "&denom"]}},
|
||||
"atomicReq_max":{"$max": {"$divide": [ { "$add": ["&TCP_TOTAL_ATOMIC_WITH_RET_sum", "&TCP_TOTAL_ATOMIC_WITHOUT_RET_sum"] }, "&denom"]}},
|
||||
|
||||
"cacheBW_avg":{"$avg": { "$divide": [{ "$multiply": ["&TCP_TOTAL_CACHE_ACCESSES_sum", 64 ] }, { "$subtract": ["&EndNs", "&BeginNs"] } ] }},
|
||||
"cacheBW_min":{"$min": { "$divide": [{ "$multiply": ["&TCP_TOTAL_CACHE_ACCESSES_sum", 64 ] }, { "$subtract": ["&EndNs", "&BeginNs"] } ] }},
|
||||
"cacheBW_max":{"$max": { "$divide": [{ "$multiply": ["&TCP_TOTAL_CACHE_ACCESSES_sum", 64 ] }, { "$subtract": ["&EndNs", "&BeginNs"] } ] }},
|
||||
|
||||
"cacheAccess_avg":{"$avg": {"$divide": [ "&TCP_TOTAL_CACHE_ACCESSES_sum", "&denom"]}},
|
||||
"cacheAccess_min":{"$min": {"$divide": [ "&TCP_TOTAL_CACHE_ACCESSES_sum", "&denom"]}},
|
||||
"cacheAccess_max":{"$max": {"$divide": [ "&TCP_TOTAL_CACHE_ACCESSES_sum", "&denom"]}},
|
||||
@@ -115,20 +119,23 @@
|
||||
null
|
||||
]
|
||||
}},
|
||||
|
||||
"l2_l1_read_avg":{"$avg": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2_l1_read_min":{"$min": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2_l1_read_max":{"$max": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
|
||||
"l2_l1_write_avg":{"$avg": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
"l2_l1_write_min":{"$min": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
"l2_l1_write_max":{"$max": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
|
||||
|
||||
"l2TCRRead_avg":{"$avg": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2TCRRead_min":{"$min": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2TCRRead_max":{"$max": {"$divide": [ "&TCP_TCC_READ_REQ_sum", "&denom"]}},
|
||||
"l2_l1_atomic_avg":{"$avg": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2_l1_atomic_min":{"$min": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2_l1_atomic_max":{"$max": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
|
||||
|
||||
"l2Write_avg":{"$avg": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
"l2Write_min":{"$min": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
"l2Write_max":{"$max": {"$divide": [ "&TCP_TCC_WRITE_REQ_sum", "&denom"] }},
|
||||
|
||||
"l2Atomic_avg":{"$avg": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2Atomic_min":{"$min": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2Atomic_max":{"$max": {"$divide": [ { "$add": ["&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] }, "&denom"] }},
|
||||
"l2_l1_bw_avg":{"$avg": {"$divide": [{"$multiply": [64, {"$add": ["&TCP_TCC_READ_REQ_sum", "&TCP_TCC_WRITE_REQ_sum", "&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] } ]}, "&denom" ]}},
|
||||
"l2_l1_bw_min":{"$min": {"$divide": [{"$multiply": [64, {"$add": ["&TCP_TCC_READ_REQ_sum", "&TCP_TCC_WRITE_REQ_sum", "&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] } ]}, "&denom" ]}},
|
||||
"l2_l1_bw_max":{"$max": {"$divide": [{"$multiply": [64, {"$add": ["&TCP_TCC_READ_REQ_sum", "&TCP_TCC_WRITE_REQ_sum", "&TCP_TCC_ATOMIC_WITH_RET_REQ_sum", "&TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"] } ]}, "&denom" ]}},
|
||||
|
||||
"invalidate_avg":{"$avg": {"$divide": [ "&TCP_TOTAL_WRITEBACK_INVALIDATES_sum", "&denom"] }},
|
||||
"invalidate_min":{"$min": {"$divide": [ "&TCP_TOTAL_WRITEBACK_INVALIDATES_sum", "&denom"] }},
|
||||
@@ -229,11 +236,18 @@
|
||||
},
|
||||
{
|
||||
"metric": "Atomic Req",
|
||||
"avg": "&atomicReq_avg",
|
||||
"min": "&atomicReq_min",
|
||||
"max": "&atomicReq_max",
|
||||
"avg": "&l2_l1_atomic_avg",
|
||||
"min": "&l2_l1_atomic_min",
|
||||
"max": "&l2_l1_atomic_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "Cache BW",
|
||||
"avg": "&cacheBW_avg",
|
||||
"min": "&cacheBW_min",
|
||||
"max": "&cacheBW_max",
|
||||
"Unit": "GB/s"
|
||||
},
|
||||
{
|
||||
"metric": "Cache Accesses",
|
||||
"avg": "&cacheAccess_avg",
|
||||
@@ -263,24 +277,31 @@
|
||||
"Unit": {"$concat": ["", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "L1-TCR Read",
|
||||
"avg": "&l2TCRRead_avg",
|
||||
"min": "&l2TCRRead_min",
|
||||
"max": "&l2TCRRead_max",
|
||||
"metric": "L1-L2 BW",
|
||||
"avg": "&l2_l1_bw_avg",
|
||||
"min": "&l2_l1_bw_avg",
|
||||
"max": "&l2_l1_bw_avg",
|
||||
"Unit": {"$concat": ["Bytes ", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "L1-L2 Read",
|
||||
"avg": "&l2_l1_read_avg",
|
||||
"min": "&l2_l1_read_min",
|
||||
"max": "&l2_l1_read_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "L1-L2 Write",
|
||||
"avg": "&l2Write_avg",
|
||||
"min": "&l2Write_min",
|
||||
"max": "&l2Write_max",
|
||||
"avg": "&l2_l1_write_avg",
|
||||
"min": "&l2_l1_write_min",
|
||||
"max": "&l2_l1_write_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
},
|
||||
{
|
||||
"metric": "L1-L2 Atomic",
|
||||
"avg": "&l2Atomic_avg",
|
||||
"min": "&l2Atomic_min",
|
||||
"max": "&l2Atomic_max",
|
||||
"avg": "&l2_l1_atomic_avg",
|
||||
"min": "&l2_l1_atomic_min",
|
||||
"max": "&l2_l1_atomic_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
},
|
||||
{
|
||||
|
||||
+12
-12
@@ -145,7 +145,7 @@
|
||||
{
|
||||
"Xfer": "Read",
|
||||
"Coherency": "NC",
|
||||
"Mean": "&readNC_avg",
|
||||
"Avg": "&readNC_avg",
|
||||
"Min": "&readNC_min",
|
||||
"Max": "&readNC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -153,7 +153,7 @@
|
||||
{
|
||||
"Xfer": "Read",
|
||||
"Coherency": "UC",
|
||||
"Mean": "&readUC_avg",
|
||||
"Avg": "&readUC_avg",
|
||||
"Min": "&readUC_min",
|
||||
"Max": "&readUC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -161,7 +161,7 @@
|
||||
{
|
||||
"Xfer": "Read",
|
||||
"Coherency": "CC",
|
||||
"Mean": "&readCC_avg",
|
||||
"Avg": "&readCC_avg",
|
||||
"Min": "&readCC_min",
|
||||
"Max": "&readCC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -169,7 +169,7 @@
|
||||
{
|
||||
"Xfer": "Read",
|
||||
"Coherency": "RW",
|
||||
"Mean": "&readRW_avg",
|
||||
"Avg": "&readRW_avg",
|
||||
"Min": "&readRW_min",
|
||||
"Max": "&readRW_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -177,7 +177,7 @@
|
||||
{
|
||||
"Xfer": "Write",
|
||||
"Coherency": "RW",
|
||||
"Mean": "&writeRW_avg",
|
||||
"Avg": "&writeRW_avg",
|
||||
"Min": "&writeRW_min",
|
||||
"Max": "&writeRW_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -185,7 +185,7 @@
|
||||
{
|
||||
"Xfer": "Write",
|
||||
"Coherency": "NC",
|
||||
"Mean": "&writeNC_avg",
|
||||
"Avg": "&writeNC_avg",
|
||||
"Min": "&writeNC_min",
|
||||
"Max": "&writeNC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -193,7 +193,7 @@
|
||||
{
|
||||
"Xfer": "Write",
|
||||
"Coherency": "UC",
|
||||
"Mean": "&writeUC_avg",
|
||||
"Avg": "&writeUC_avg",
|
||||
"Min": "&writeUC_min",
|
||||
"Max": "&writeUC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -201,7 +201,7 @@
|
||||
{
|
||||
"Xfer": "Write",
|
||||
"Coherency": "CC",
|
||||
"Mean": "&writeCC_avg",
|
||||
"Avg": "&writeCC_avg",
|
||||
"Min": "&writeCC_min",
|
||||
"Max": "&writeCC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -210,7 +210,7 @@
|
||||
{
|
||||
"Xfer": "Atomic",
|
||||
"Coherency": "NC",
|
||||
"Mean": "&atomicNC_avg",
|
||||
"Avg": "&atomicNC_avg",
|
||||
"Min": "&atomicNC_min",
|
||||
"Max": "&atomicNC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -218,7 +218,7 @@
|
||||
{
|
||||
"Xfer": "Atomic",
|
||||
"Coherency": "UC",
|
||||
"Mean": "&atomicUC_avg",
|
||||
"Avg": "&atomicUC_avg",
|
||||
"Min": "&atomicUC_min",
|
||||
"Max": "&atomicUC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -226,7 +226,7 @@
|
||||
{
|
||||
"Xfer": "Atomic",
|
||||
"Coherency": "CC",
|
||||
"Mean": "&atomicCC_avg",
|
||||
"Avg": "&atomicCC_avg",
|
||||
"Min": "&atomicCC_min",
|
||||
"Max": "&atomicCC_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
@@ -234,7 +234,7 @@
|
||||
{
|
||||
"Xfer": "Atomic",
|
||||
"Coherency": "RW",
|
||||
"Mean": "&atomicRW_avg",
|
||||
"Avg": "&atomicRW_avg",
|
||||
"Min": "&atomicRW_min",
|
||||
"Max": "&atomicRW_max",
|
||||
"Unit": {"$concat": ["Req ", $normUnit]}
|
||||
|
||||
+4793
File diff suppressed because it is too large
Load Diff
+32
-16
@@ -815,7 +815,8 @@
|
||||
"EA Write Stall - IO": "&b0_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b0_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b0_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b0_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b0_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
},
|
||||
{
|
||||
"Channel": "1",
|
||||
@@ -836,7 +837,8 @@
|
||||
"EA Write Stall - IO": "&b1_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b1_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b1_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b1_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b1_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
},
|
||||
{
|
||||
"Channel": "2",
|
||||
@@ -857,7 +859,8 @@
|
||||
"EA Write Stall - IO": "&b2_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b2_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b2_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b2_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b2_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -879,7 +882,8 @@
|
||||
"EA Write Stall - IO": "&b3_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b3_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b3_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b3_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b3_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -901,7 +905,8 @@
|
||||
"EA Write Stall - IO": "&b4_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b4_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b4_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b4_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b4_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -923,7 +928,8 @@
|
||||
"EA Write Stall - IO": "&b5_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b5_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b5_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b5_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b5_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -945,7 +951,8 @@
|
||||
"EA Write Stall - IO": "&b6_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b6_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b6_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b6_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b6_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -967,7 +974,8 @@
|
||||
"EA Write Stall - IO": "&b7_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b7_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b7_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b7_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b7_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -989,7 +997,8 @@
|
||||
"EA Write Stall - IO": "&b8_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b8_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b8_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b8_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b8_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1011,7 +1020,8 @@
|
||||
"EA Write Stall - IO": "&b9_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b9_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b9_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b9_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b9_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1033,7 +1043,8 @@
|
||||
"EA Write Stall - IO": "&b10_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b10_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b10_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b10_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b10_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1055,7 +1066,8 @@
|
||||
"EA Write Stall - IO": "&b11_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b11_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b11_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b11_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b11_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1077,7 +1089,8 @@
|
||||
"EA Write Stall - IO": "&b12_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b12_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b12_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b12_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b12_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1099,7 +1112,8 @@
|
||||
"EA Write Stall - IO": "&b13_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b13_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b13_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b13_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b13_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
|
||||
},
|
||||
@@ -1122,7 +1136,8 @@
|
||||
"EA Write Stall - IO": "&b14_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b14_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b14_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b14_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b14_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
|
||||
},
|
||||
@@ -1145,7 +1160,8 @@
|
||||
"EA Write Stall - IO": "&b15_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b15_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b15_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b15_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b15_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
}
|
||||
]
|
||||
}},
|
||||
+53
-39
@@ -4,29 +4,27 @@
|
||||
"gpu-id": { "$in": [${gpuFilter:raw}] },
|
||||
"KernelName": { "$in": ${KernelNameFilter:json}}
|
||||
}},
|
||||
|
||||
{"$addFields": {
|
||||
"denom": {
|
||||
"$switch" : {
|
||||
"branches": [
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Wave"]} ,
|
||||
"then": "&SQ_WAVES"
|
||||
},
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Cycle"]} ,
|
||||
"then": "&GRBM_GUI_ACTIVE"
|
||||
},
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Sec"]} ,
|
||||
"then": {"$divide":[{"$subtract": ["&EndNs", "&BeginNs" ]}, 1000000000]}
|
||||
}
|
||||
],
|
||||
"default": 1
|
||||
}
|
||||
}
|
||||
}},
|
||||
|
||||
{"$addFields": {
|
||||
"denom": {
|
||||
"$switch" : {
|
||||
"branches": [
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Wave"]} ,
|
||||
"then": "&SQ_WAVES"
|
||||
},
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Cycle"]} ,
|
||||
"then": "&GRBM_GUI_ACTIVE"
|
||||
},
|
||||
{
|
||||
"case": { "$eq": [ $normUnit, "per Sec"]} ,
|
||||
"then": {"$divide":[{"$subtract": ["&EndNs", "&BeginNs" ]}, 1000000000]}
|
||||
}
|
||||
],
|
||||
"default": 1
|
||||
}
|
||||
}
|
||||
}},
|
||||
{"$group": {
|
||||
"_id": null,
|
||||
"b16_hitRate": {
|
||||
@@ -791,7 +789,8 @@
|
||||
"EA Write Stall - IO": "&b16_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b16_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b16_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b16_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b16_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -813,7 +812,8 @@
|
||||
"EA Write Stall - IO": "&b17_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b17_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b17_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b17_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b17_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -835,7 +835,8 @@
|
||||
"EA Write Stall - IO": "&b18_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b18_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b18_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b18_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b18_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -857,7 +858,8 @@
|
||||
"EA Write Stall - IO": "&b19_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b19_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b19_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b19_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b19_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -879,7 +881,8 @@
|
||||
"EA Write Stall - IO": "&b20_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b20_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b20_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b20_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b20_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -901,7 +904,8 @@
|
||||
"EA Write Stall - IO": "&b21_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b21_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b21_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b21_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b21_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -923,7 +927,8 @@
|
||||
"EA Write Stall - IO": "&b22_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b22_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b22_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b22_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b22_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -945,7 +950,8 @@
|
||||
"EA Write Stall - IO": "&b23_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b23_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b23_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b23_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b23_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
|
||||
},
|
||||
@@ -968,7 +974,8 @@
|
||||
"EA Write Stall - IO": "&b24_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b24_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b24_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b24_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b24_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -990,7 +997,8 @@
|
||||
"EA Write Stall - IO": "&b25_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b25_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b25_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b25_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b25_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1012,7 +1020,8 @@
|
||||
"EA Write Stall - IO": "&b26_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b26_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b26_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b26_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b26_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
|
||||
},
|
||||
@@ -1035,7 +1044,8 @@
|
||||
"EA Write Stall - IO": "&b27_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b27_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b27_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b27_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b27_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1057,7 +1067,8 @@
|
||||
"EA Write Stall - IO": "&b28_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b28_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b28_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b28_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b28_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1079,7 +1090,8 @@
|
||||
"EA Write Stall - IO": "&b29_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b29_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b29_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b29_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b29_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1101,7 +1113,8 @@
|
||||
"EA Write Stall - IO": "&b30_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b30_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b30_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b30_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b30_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
},
|
||||
{
|
||||
@@ -1123,7 +1136,8 @@
|
||||
"EA Write Stall - IO": "&b31_ea_write_stall_io_credit",
|
||||
"EA Write Stall - GMI": "&b31_ea_write_stall_gmi_credit",
|
||||
"EA Write Stall - DRAM": "&b31_ea_write_stall_dram_credit",
|
||||
"EA Write Stall - Starve": "&b31_ea_write_stall_too_many"
|
||||
"EA Write Stall - Starve": "&b31_ea_write_stall_too_many",
|
||||
"Units": "&denom"
|
||||
|
||||
}
|
||||
]
|
||||
@@ -172,7 +172,7 @@ def run_gui(args, runs):
|
||||
)
|
||||
app.run_server(debug=False, host="0.0.0.0", port=args.gui)
|
||||
else:
|
||||
print("Multiple runs not supported yet")
|
||||
print("Multiple runs not yet supported in GUI. Retry without --gui flag.")
|
||||
|
||||
|
||||
def run_cli(args, runs):
|
||||
|
||||
@@ -53,13 +53,16 @@ HIDDEN_SECTIONS = ["Memory Chart Analysis", "Kernels"]
|
||||
HIDDEN_COLUMNS = ["Tips", "coll_level"]
|
||||
IS_DARK = True # default dark theme
|
||||
|
||||
# Define any elements which will have full width
|
||||
full_width_elmt = {1801}
|
||||
|
||||
# Define different types of bar charts
|
||||
barchart_elements = {
|
||||
# Group table ids by chart type
|
||||
"instr_mix": [1001, 1002],
|
||||
"multi_bar": [1604, 1704],
|
||||
"sol": [1101, 1201, 1301, 1401, 1601, 1701],
|
||||
"l2_cache_per_chan": [1801, 1802],
|
||||
"l2_cache_per_chan": [1802, 1803],
|
||||
}
|
||||
|
||||
|
||||
@@ -580,11 +583,20 @@ def build_layout(
|
||||
style={"color": "white" if IS_DARK else ""},
|
||||
),
|
||||
)
|
||||
|
||||
# Update content for this section
|
||||
html_section.append(
|
||||
html.Div(className="float-child", children=content)
|
||||
)
|
||||
if table_config["id"] in full_width_elmt:
|
||||
# Optionally override default (50%) width
|
||||
html_section.append(
|
||||
html.Div(
|
||||
className="float-child",
|
||||
children=content,
|
||||
style={"width": "100%"},
|
||||
)
|
||||
)
|
||||
else:
|
||||
html_section.append(
|
||||
html.Div(className="float-child", children=content)
|
||||
)
|
||||
|
||||
# Append the new section with all of it's contents
|
||||
div_children.append(
|
||||
|
||||
@@ -88,6 +88,7 @@ supported_call = {
|
||||
# simple aggr
|
||||
"AVG": "to_avg",
|
||||
"MEDIAN": "to_median",
|
||||
"STD": "to_std",
|
||||
# functions apply to whole column of df or a single value
|
||||
"TO_INT": "to_int",
|
||||
# Support the below with 2 inputs
|
||||
@@ -136,6 +137,13 @@ def to_median(a):
|
||||
raise Exception("to_median: unsupported type.")
|
||||
|
||||
|
||||
def to_std(a):
|
||||
if isinstance(a, pd.core.series.Series):
|
||||
return a.std()
|
||||
else:
|
||||
raise Exception("to_std: unsupported type.")
|
||||
|
||||
|
||||
def to_int(a):
|
||||
if str(type(a)) == "<class 'NoneType'>":
|
||||
return np.nan
|
||||
@@ -731,7 +739,7 @@ def build_comparable_columns(time_unit):
|
||||
Build comparable columns/headers for display
|
||||
"""
|
||||
comparable_columns = schema.supported_field
|
||||
top_stat_base = ["Count", "Sum", "Mean", "Median"]
|
||||
top_stat_base = ["Count", "Sum", "Mean", "Median", "Standard Deviation"]
|
||||
|
||||
for h in top_stat_base:
|
||||
comparable_columns.append(h + "(" + time_unit + ")")
|
||||
|
||||
@@ -81,6 +81,7 @@ supported_field = [
|
||||
"Count",
|
||||
"Mean",
|
||||
"Pct",
|
||||
"Std Dev",
|
||||
# Special keywords for Memory chart
|
||||
"Alias",
|
||||
# Special keywords for L2 channel
|
||||
|
||||
Reference in New Issue
Block a user