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SWDEV-377991 - Remove liquidflash support

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Remove amdgpu-pro interface for persistent memory,
used in Liquidflash

Change-Id: I7d1720ad0875a62ebb2d7f96cba39601d560a5df


[ROCm/clr commit: 6dad2fc306]
Этот коммит содержится в:
German
2023-01-20 10:26:53 -05:00
коммит произвёл German Andryeyev
родитель b4ffe0e810
Коммит 6eec7a361e
9 изменённых файлов: 0 добавлений и 545 удалений
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projects/clr/rocclr/device/device.hpp
-4
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@@ -153,7 +153,6 @@ enum OclExtensions {
ClKhrD3d9Sharing,
#endif
ClKhrImage2dFromBuffer,
ClAmdSemaphore,
ClAMDBusAddressableMemory,
ClAMDC11Atomics,
ClKhrSpir,
@@ -162,7 +161,6 @@ enum OclExtensions {
ClKhrDepthImages,
ClKhrMipMapImage,
ClKhrMipMapImageWrites,
ClKhrIlProgram,
ClAmdCopyBufferP2P,
ClAmdAssemblyProgram,
#if defined(_WIN32)
@@ -198,7 +196,6 @@ static constexpr const char* OclExtensionsString[] = {"cl_khr_fp64 ",
"cl_khr_dx9_media_sharing ",
#endif
"cl_khr_image2d_from_buffer ",
"",
"cl_amd_bus_addressable_memory ",
"cl_amd_c11_atomics ",
"cl_khr_spir ",
@@ -207,7 +204,6 @@ static constexpr const char* OclExtensionsString[] = {"cl_khr_fp64 ",
"cl_khr_depth_images ",
"cl_khr_mipmap_image ",
"cl_khr_mipmap_image_writes ",
"",
"cl_amd_copy_buffer_p2p ",
"cl_amd_assembly_program ",
#if defined(_WIN32)
projects/clr/rocclr/device/rocm/pro/lnxheaders.h
-46
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@@ -1,46 +0,0 @@
/* Copyright (c) 2017 - 2021 Advanced Micro Devices, Inc.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE. */
#pragma once
// NOTE: Some of the Linux driver stack's headers don't wrap their C-style interface names in 'extern "C" { ... }'
// blocks when building with a C++ compiler, so we need to add that ourselves.
#if __cplusplus
extern "C"
{
#endif
#include <amdgpu.h>
#include <amdgpu_drm.h>
#include <xf86drm.h>
#include <xf86drmMode.h>
#include <errno.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>
#include <dlfcn.h>
constexpr int32_t InvalidFd = -1; // value representing a invalid file descriptor for Linux
#if __cplusplus
} // extern "C"
#endif
projects/clr/rocclr/device/rocm/pro/prodevice.cpp
-241
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@@ -1,241 +0,0 @@
/* Copyright (c) 2017 - 2021 Advanced Micro Devices, Inc.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE. */
#ifndef WITHOUT_HSA_BACKEND
#include "hsa/hsa_ext_amd.h"
#include "lnxheaders.h"
#include "prodevice.hpp"
#include "amdgpu_drm.h"
namespace roc {
constexpr uint32_t kMaxDevices = 32;
constexpr uint32_t kAtiVendorId = 0x1002;
void* ProDevice::lib_drm_handle_ = nullptr;
bool ProDevice::initialized_ = false;
drm::Funcs ProDevice::funcs_;
IProDevice* IProDevice::Init(uint32_t bus, uint32_t device, uint32_t func)
{
// Make sure DRM lib is initialized
if (!ProDevice::DrmInit()) {
return nullptr;
}
ProDevice* pro_device = new ProDevice();
if (pro_device == nullptr || !pro_device->Create(bus, dev, func)) {
delete pro_device;
return nullptr;
}
return pro_device;
}
ProDevice::~ProDevice() {
delete alloc_ops_;
if (dev_handle_ != nullptr) {
Funcs().AmdgpuDeviceDeinitialize(dev_handle_);
}
if (file_desc_ > 0) {
close(file_desc_);
}
}
bool ProDevice::DrmInit()
{
if (initialized_ == false) {
// Find symbols in libdrm_amdgpu.so.1
lib_drm_handle_ = dlopen("libdrm_amdgpu.so.1", RTLD_NOW);
if (lib_drm_handle_ == nullptr) {
return false;
} else {
funcs_.DrmGetDevices = reinterpret_cast<drm::DrmGetDevices>(dlsym(
lib_drm_handle_,
"drmGetDevices"));
if (funcs_.DrmGetDevices == nullptr) return false;
funcs_.AmdgpuDeviceInitialize = reinterpret_cast<drm::AmdgpuDeviceInitialize>(dlsym(
lib_drm_handle_,
"amdgpu_device_initialize"));
if (funcs_.AmdgpuDeviceInitialize == nullptr) return false;
funcs_.AmdgpuDeviceDeinitialize = reinterpret_cast<drm::AmdgpuDeviceDeinitialize>(dlsym(
lib_drm_handle_,
"amdgpu_device_deinitialize"));
if (funcs_.AmdgpuDeviceDeinitialize == nullptr) return false;
funcs_.AmdgpuQueryGpuInfo = reinterpret_cast<drm::AmdgpuQueryGpuInfo>(dlsym(
lib_drm_handle_,
"amdgpu_query_gpu_info"));
if (funcs_.AmdgpuQueryGpuInfo == nullptr) return false;
funcs_.AmdgpuQueryInfo = reinterpret_cast<drm::AmdgpuQueryInfo>(dlsym(
lib_drm_handle_,
"amdgpu_query_info"));
if (funcs_.AmdgpuQueryInfo == nullptr) return false;
funcs_.AmdgpuBoAlloc = reinterpret_cast<drm::AmdgpuBoAlloc>(dlsym(
lib_drm_handle_,
"amdgpu_bo_alloc"));
if (funcs_.AmdgpuBoAlloc == nullptr) return false;
funcs_.AmdgpuBoExport = reinterpret_cast<drm::AmdgpuBoExport>(dlsym(
lib_drm_handle_,
"amdgpu_bo_export"));
if (funcs_.AmdgpuBoExport == nullptr) return false;
funcs_.AmdgpuBoFree = reinterpret_cast<drm::AmdgpuBoFree>(dlsym(
lib_drm_handle_,
"amdgpu_bo_free"));
if (funcs_.AmdgpuBoFree == nullptr) return false;
funcs_.AmdgpuBoCpuMap = reinterpret_cast<drm::AmdgpuBoCpuMap>(dlsym(
lib_drm_handle_,
"amdgpu_bo_cpu_map"));
if (funcs_.AmdgpuBoCpuMap == nullptr) return false;
funcs_.AmdgpuBoCpuUnmap = reinterpret_cast<drm::AmdgpuBoCpuUnmap>(dlsym(
lib_drm_handle_,
"amdgpu_bo_cpu_unmap"));
if (funcs_.AmdgpuBoCpuUnmap == nullptr) return false;
}
}
initialized_ = true;
return true;
}
#ifndef AMDGPU_CAPABILITY_SSG_FLAG
#define AMDGPU_CAPABILITY_SSG_FLAG 4
#endif
// ================================================================================================
// Open drm device and initialize it. And also get the drm information.
bool ProDevice::Create(uint32_t bus, uint32_t device, uint32_t func) {
drmDevicePtr devices[kMaxDevices] = { };
int32_t device_count = Funcs().DrmGetDevices(devices, kMaxDevices);
bool result = false;
for (int32_t i = 0; i < device_count; i++) {
// Check if the device vendor is AMD
if (devices[i]->deviceinfo.pci->vendor_id != kAtiVendorId) {
continue;
}
if ((devices[i]->businfo.pci->bus == bus) &&
(devices[i]->businfo.pci->dev == device) &&
(devices[i]->businfo.pci->func == func)) {
// pDevices[i]->nodes[DRM_NODE_PRIMARY];
// Using render node here so that we can do the off-screen rendering without authentication
file_desc_ = open(devices[i]->nodes[DRM_NODE_RENDER], O_RDWR, 0);
if (file_desc_ > 0) {
void* data, *file, *cap;
// Initialize the admgpu device.
if (Funcs().AmdgpuDeviceInitialize(file_desc_, &major_ver_,
&minor_ver_, &dev_handle_) == 0) {
uint32_t version = 0;
// amdgpu_query_gpu_info will never fail only if it is initialized
Funcs().AmdgpuQueryGpuInfo(dev_handle_, &gpu_info_);
drm_amdgpu_capability cap = {};
Funcs().AmdgpuQueryInfo(dev_handle_, AMDGPU_INFO_CAPABILITY, sizeof(drm_amdgpu_capability), &cap);
// Check if DGMA and SSG are available
if ((cap.flag & (AMDGPU_CAPABILITY_DIRECT_GMA_FLAG | AMDGPU_CAPABILITY_SSG_FLAG)) ==
(AMDGPU_CAPABILITY_DIRECT_GMA_FLAG | AMDGPU_CAPABILITY_SSG_FLAG)) {
result = true;
break;
}
}
}
}
}
if (result) {
alloc_ops_ = new amd::Monitor("DGMA mem alloc lock", true);
if (nullptr == alloc_ops_) {
return true;
}
}
return result;
}
void* ProDevice::AllocDmaBuffer(hsa_agent_t agent, size_t size, void** host_ptr) const
{
amd::ScopedLock l(alloc_ops_);
void* ptr = nullptr;
amdgpu_bo_handle buf_handle = 0;
amdgpu_bo_alloc_request req = {0};
*host_ptr = nullptr;
req.alloc_size = size;
req.phys_alignment = 64 * Ki;
req.preferred_heap = AMDGPU_GEM_DOMAIN_DGMA;
// Allocate buffer in DGMA heap
if (0 == Funcs().AmdgpuBoAlloc(dev_handle_, &req, &buf_handle)) {
amdgpu_bo_handle_type type = amdgpu_bo_handle_type_dma_buf_fd;
uint32_t shared_handle = 0;
// Find the base driver handle
if (0 == Funcs().AmdgpuBoExport(buf_handle, type, &shared_handle)) {
uint32_t flags = 0;
size_t buf_size = 0;
// Map memory object to HSA device
if (0 == hsa_amd_interop_map_buffer(1, &agent, shared_handle,
flags, &buf_size, &ptr, nullptr, nullptr)) {
// Ask GPUPro driver to provide CPU access to allocation
if (0 == Funcs().AmdgpuBoCpuMap(buf_handle, host_ptr)) {
allocs_.insert({ptr, {buf_handle, shared_handle}});
}
else {
hsa_amd_interop_unmap_buffer(ptr);
close(shared_handle);
Funcs().AmdgpuBoFree(buf_handle);
}
}
else {
close(shared_handle);
Funcs().AmdgpuBoFree(buf_handle);
}
}
else {
Funcs().AmdgpuBoFree(buf_handle);
}
}
return ptr;
}
void ProDevice::FreeDmaBuffer(void* ptr) const
{
amd::ScopedLock l(alloc_ops_);
auto it = allocs_.find(ptr);
if (it != allocs_.end()) {
Funcs().AmdgpuBoCpuUnmap(it->second.first);
// Unmap memory from HSA device
hsa_amd_interop_unmap_buffer(ptr);
// Close shared handle
close(it->second.second);
int error = Funcs().AmdgpuBoFree(it->second.first);
allocs_.erase(it);
}
}
}
#endif // WITHOUT_HSA_BACKEND
projects/clr/rocclr/device/rocm/pro/prodevice.hpp
-81
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@@ -1,81 +0,0 @@
/* Copyright (c) 2017 - 2021 Advanced Micro Devices, Inc.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE. */
#pragma once
#ifndef WITHOUT_HSA_BACKEND
#include "profuncs.hpp"
#include "prodriver.hpp"
#include "thread/monitor.hpp"
#include <unordered_map>
/*! \addtogroup HSA
* @{
*/
//! HSA Device Implementation
namespace roc {
class ProDevice : public IProDevice {
public:
static bool DrmInit();
ProDevice()
: file_desc_(0)
, major_ver_(0)
, minor_ver_(0)
, dev_handle_(nullptr)
, alloc_ops_(nullptr) {}
virtual ~ProDevice() override;
bool Create(uint32_t bus, uint32_t device, uint32_t func);
virtual void* AllocDmaBuffer(
hsa_agent_t agent, size_t size, void** host_ptr) const override;
virtual void FreeDmaBuffer(void* ptr) const override;
virtual void GetAsicIdAndRevisionId(uint32_t* asic_id, uint32_t* rev_id) const override
{
*asic_id = gpu_info_.asic_id;
*rev_id = gpu_info_.pci_rev_id;
}
private:
static void* lib_drm_handle_;
static bool initialized_;
static drm::Funcs funcs_;
const drm::Funcs& Funcs() const { return funcs_; }
int32_t file_desc_; //!< File descriptor for the device
uint32_t major_ver_; //!< Major driver version
uint32_t minor_ver_; //!< Minor driver version
amdgpu_device_handle dev_handle_; //!< AMD gpu device handle
amdgpu_gpu_info gpu_info_; //!< GPU info structure
amdgpu_heap_info heap_info_; //!< Information about memory
mutable std::unordered_map<void*, std::pair<amdgpu_bo_handle, uint32_t>> allocs_; //!< Alloced memory mapping
amd::Monitor* alloc_ops_; //!< Serializes memory allocations/destructions
};
} // namespace roc
/**
* @}
*/
#endif /*WITHOUT_HSA_BACKEND*/
projects/clr/rocclr/device/rocm/pro/prodriver.hpp
-52
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@@ -1,52 +0,0 @@
/* Copyright (c) 2017 - 2021 Advanced Micro Devices, Inc.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE. */
#pragma once
#ifndef WITHOUT_HSA_BACKEND
#include "top.hpp"
#include "hsa/hsa.h"
/*! \addtogroup HSA
* @{
*/
namespace roc {
//! Pro Device Interface
class IProDevice : public amd::HeapObject {
public:
static IProDevice* Init(uint32_t bus, uint32_t device, uint32_t func);
virtual void* AllocDmaBuffer(hsa_agent_t agent, size_t size, void** host_ptr) const = 0;
virtual void FreeDmaBuffer(void* ptr) const = 0;
virtual void GetAsicIdAndRevisionId(uint32_t* asic_id, uint32_t* rev_id) const = 0;
IProDevice() {}
virtual ~IProDevice() {}
};
} // namespace roc
/**
* @}
*/
#endif /*WITHOUT_HSA_BACKEND*/
projects/clr/rocclr/device/rocm/pro/profuncs.hpp
-85
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@@ -1,85 +0,0 @@
/* Copyright (c) 2017 - 2021 Advanced Micro Devices, Inc.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE. */
#pragma once
namespace roc
{
namespace drm
{
typedef int (*DrmGetDevices)(
drmDevicePtr* pDevices,
int maxDevices);
typedef int (*AmdgpuDeviceInitialize)(
int fd,
uint32_t* pMajorVersion,
uint32_t* pMinorVersion,
amdgpu_device_handle* pDeviceHandle);
typedef int (*AmdgpuDeviceDeinitialize)(
amdgpu_device_handle hDevice);
typedef int (*AmdgpuQueryGpuInfo)(
amdgpu_device_handle hDevice,
struct amdgpu_gpu_info* pInfo);
typedef int (*AmdgpuQueryInfo)(
amdgpu_device_handle hDevice,
unsigned infoId,
unsigned size,
void* pValue);
typedef int (*AmdgpuBoAlloc)(
amdgpu_device_handle hDevice,
struct amdgpu_bo_alloc_request* pAllocBuffer,
amdgpu_bo_handle* pBufferHandle);
typedef int (*AmdgpuBoExport)(
amdgpu_bo_handle hBuffer,
enum amdgpu_bo_handle_type type,
uint32_t* pFd);
typedef int (*AmdgpuBoFree)(
amdgpu_bo_handle hBuffer);
typedef int (*AmdgpuBoCpuMap)(
amdgpu_bo_handle hBuffer,
void** ppCpuAddress);
typedef int (*AmdgpuBoCpuUnmap)(
amdgpu_bo_handle hBuffer);
struct Funcs
{
DrmGetDevices DrmGetDevices;
AmdgpuDeviceInitialize AmdgpuDeviceInitialize;
AmdgpuDeviceDeinitialize AmdgpuDeviceDeinitialize;
AmdgpuQueryGpuInfo AmdgpuQueryGpuInfo;
AmdgpuQueryInfo AmdgpuQueryInfo;
AmdgpuBoAlloc AmdgpuBoAlloc;
AmdgpuBoExport AmdgpuBoExport;
AmdgpuBoFree AmdgpuBoFree;
AmdgpuBoCpuMap AmdgpuBoCpuMap;
AmdgpuBoCpuUnmap AmdgpuBoCpuUnmap;
};
} //namespace drm
} //namespace roc
projects/clr/rocclr/device/rocm/rocdevice.cpp
-20
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@@ -40,9 +40,6 @@
#include "device/rocm/rocmemory.hpp"
#include "device/rocm/rocglinterop.hpp"
#include "device/rocm/rocsignal.hpp"
#ifdef WITH_AMDGPU_PRO
#include "pro/prodriver.hpp"
#endif
#include "platform/sampler.hpp"
#if defined(__clang__)
@@ -163,8 +160,6 @@ Device::Device(hsa_agent_t bkendDevice)
, xferQueue_(nullptr)
, xferRead_(nullptr)
, xferWrite_(nullptr)
, pro_device_(nullptr)
, pro_ena_(false)
, freeMem_(0)
, vgpusAccess_("Virtual GPU List Ops Lock", true)
, hsa_exclusive_gpu_access_(false)
@@ -218,9 +213,6 @@ void Device::checkAtomicSupport() {
}
Device::~Device() {
#ifdef WITH_AMDGPU_PRO
delete pro_device_;
#endif
// Release cached map targets
for (uint i = 0; mapCache_ != nullptr && i < mapCache_->size(); ++i) {
if ((*mapCache_)[i] != nullptr) {
@@ -687,18 +679,6 @@ bool Device::create() {
}
info_.pciDomainID = pci_domain_id;
#ifdef WITH_AMDGPU_PRO
// Create amdgpu-pro device interface for SSG support
pro_device_ = IProDevice::Init(
info_.deviceTopology_.pcie.bus,
info_.deviceTopology_.pcie.device,
info_.deviceTopology_.pcie.function);
if (pro_device_ != nullptr) {
pro_ena_ = true;
pro_device_->GetAsicIdAndRevisionId(&info_.pcieDeviceId_, &info_.pcieRevisionId_);
}
#endif
// Get Agent HDP Flush Register Memory
hsa_amd_hdp_flush_t hdpInfo;
if (HSA_STATUS_SUCCESS !=
projects/clr/rocclr/device/rocm/rocdevice.hpp
-7
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@@ -75,7 +75,6 @@ class Memory;
class Resource;
class VirtualDevice;
class PrintfDbg;
class IProDevice;
class ProfilingSignal : public amd::ReferenceCountedObject {
public:
@@ -478,10 +477,6 @@ class Device : public NullDevice {
//! Create internal blit program
bool createBlitProgram();
// Returns AMD GPU Pro interfacs
const IProDevice& iPro() const { return *pro_device_; }
bool ProEna() const { return pro_ena_; }
// P2P agents avaialble for this device
const std::vector<hsa_agent_t>& p2pAgents() const { return p2p_agents_; }
@@ -598,8 +593,6 @@ class Device : public NullDevice {
XferBuffers* xferRead_; //!< Transfer buffers read
XferBuffers* xferWrite_; //!< Transfer buffers write
const IProDevice* pro_device_; //!< AMDGPUPro device
bool pro_ena_; //!< Extra functionality with AMDGPUPro device, beyond ROCr
std::atomic<size_t> freeMem_; //!< Total of free memory available
mutable amd::Monitor vgpusAccess_; //!< Lock to serialise virtual gpu list access
bool hsa_exclusive_gpu_access_; //!< TRUE if current device was moved into exclusive GPU access mode
projects/clr/rocclr/device/rocm/rocmemory.cpp
-9
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@@ -37,9 +37,6 @@
#include "platform/sampler.hpp"
#include "amdocl/cl_gl_amd.hpp"
#include "amdocl/cl_vk_amd.hpp"
#ifdef WITH_AMDGPU_PRO
#include "pro/prodriver.hpp"
#endif
namespace roc {
@@ -673,12 +670,6 @@ void Buffer::destroy() {
return;
}
#ifdef WITH_AMDGPU_PRO
if ((memFlags & CL_MEM_USE_PERSISTENT_MEM_AMD) && dev().ProEna()) {
dev().iPro().FreeDmaBuffer(deviceMemory_);
return;
}
#endif
if (deviceMemory_ != nullptr) {
if (deviceMemory_ != owner()->getHostMem()) {
// if they are identical, the host pointer will be