Merge debugger trap handler into ROCr trap handler
Debugger path is taken for (trap_id >= 3) and single step exceptions. Other traps/exceptions behave as before. Change-Id: I276c0eb69953709968353a57717ee017d22348a2
This commit is contained in:
Jay Cornwall
کامیت شده توسط
Jay Cornwall
Jay Cornwall
والد
851ee799c4
کامیت
78e754935c
@@ -110,6 +110,7 @@ static const unsigned int kCodeTrapHandler8[] = {
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static const unsigned int kCodeTrapHandler9[] = {
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/*
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.set SQ_WAVE_PC_HI_ADDRESS_MASK , 0xFFFF
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.set SQ_WAVE_PC_HI_TRAP_ID_SHIFT , 16
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.set SQ_WAVE_PC_HI_TRAP_ID_SIZE , 8
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.set SQ_WAVE_PC_HI_TRAP_ID_BFE , (SQ_WAVE_PC_HI_TRAP_ID_SHIFT | (SQ_WAVE_PC_HI_TRAP_ID_SIZE << 16))
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@@ -122,6 +123,11 @@ static const unsigned int kCodeTrapHandler9[] = {
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.set SIGNAL_CODE_ILLEGAL_INST , (1 << 30)
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.set SIGNAL_CODE_LLVM_TRAP , (1 << 31)
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.set MAX_NUM_DOORBELLS_MASK , ((1 << 10) - 1)
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.set SENDMSG_M0_DOORBELL_ID_BITS , 12
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.set SENDMSG_M0_DOORBELL_ID_MASK , ((1 << SENDMSG_M0_DOORBELL_ID_BITS) - 1)
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.set TTMP11_DEBUG_TRAP_BIT , 7
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.set DEBUG_INTERRUPT_CONTEXT_ID_BIT , 23
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.set INSN_S_ENDPGM_OPCODE , 0xBF81000
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.if .amdgcn.gfx_generation_number == 9
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.set TTMP11_SAVE_RCNT_FIRST_REPLAY_SHIFT , 26
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@@ -138,86 +144,27 @@ static const unsigned int kCodeTrapHandler9[] = {
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.error "unsupported target"
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.endif
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trap_entry:
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// If memory violation without XNACK error then signal queue error.
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// XNACK error will be handled by VM interrupt, since it has more information.
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s_getreg_b32 ttmp2, hwreg(HW_REG_TRAPSTS)
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s_and_b32 ttmp4, ttmp2, (SQ_WAVE_TRAPSTS_MEM_VIOL_MASK | SQ_WAVE_TRAPSTS_XNACK_ERROR_MASK)
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s_cmp_eq_u32 ttmp4, SQ_WAVE_TRAPSTS_MEM_VIOL_MASK
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s_mov_b32 ttmp4, SIGNAL_CODE_MEM_VIOL
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s_cbranch_scc1 .signal_error
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// ABI between first and second level trap handler:
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// ttmp0 = PC[31:0]
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// ttmp1 = 0[2:0], PCRewind[3:0], HostTrap[0], TrapId[7:0], PC[47:32]
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// ttmp12 = SQ_WAVE_STATUS
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// ttmp14 = TMA[31:0]
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// ttmp15 = TMA[63:32]
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// gfx9:
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// ttmp11 = SQ_WAVE_IB_STS[20:15], 0[17:0], DebugTrap[0], NoScratch[0], WaveIdInWG[5:0]
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// gfx10:
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// ttmp11 = SQ_WAVE_IB_STS[25], SQ_WAVE_IB_STS[21:15], 0[15:0], DebugTrap[0], NoScratch[0], WaveIdInWG[5:0]
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// If illegal instruction then signal queue error.
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s_and_b32 ttmp4, ttmp2, SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK
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s_mov_b32 ttmp4, SIGNAL_CODE_ILLEGAL_INST
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s_cbranch_scc1 .signal_error
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// If any other exception then return to shader.
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s_bfe_u32 ttmp2, ttmp1, SQ_WAVE_PC_HI_TRAP_ID_BFE
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s_cbranch_scc0 .exit_trap
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// If llvm.trap then signal queue error.
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s_cmp_eq_u32 ttmp2, 0x2
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s_mov_b32 ttmp4, SIGNAL_CODE_LLVM_TRAP
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s_cbranch_scc1 .signal_error
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// For other traps advance PC and return to shader.
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s_add_u32 ttmp0, ttmp0, 0x4
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s_addc_u32 ttmp1, ttmp1, 0x0
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s_branch .exit_trap
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.signal_error:
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// Fetch doorbell index for our queue.
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.macro mGetDoorbellId
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s_mov_b32 exec_lo, 0x80000000
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s_sendmsg sendmsg(MSG_GET_DOORBELL)
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.wait_sendmsg:
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.wait_sendmsg_\@:
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s_nop 7
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s_bitcmp0_b32 exec_lo, 0x1F
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s_cbranch_scc0 .wait_sendmsg
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s_cbranch_scc0 .wait_sendmsg_\@
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.endm
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// Map doorbell index to amd_queue_t* through TMA (doorbell_queue_map).
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s_and_b32 ttmp2, exec_lo, MAX_NUM_DOORBELLS_MASK
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s_lshl_b32 ttmp2, ttmp2, 0x3
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s_load_dwordx2 [ttmp2, ttmp3], [ttmp14, ttmp15], ttmp2 glc
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s_waitcnt lgkmcnt(0)
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// Retrieve queue_inactive_signal from amd_queue_t*.
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s_load_dwordx2 [ttmp2, ttmp3], [ttmp2, ttmp3], 0xC0 glc
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s_waitcnt lgkmcnt(0)
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// Set queue signal value to error code.
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s_mov_b32 ttmp5, 0x0
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s_atomic_swap_x2 [ttmp4, ttmp5], [ttmp2, ttmp3], 0x8 glc
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s_waitcnt lgkmcnt(0)
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// Skip event trigger if the signal value was already non-zero.
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s_or_b32 ttmp4, ttmp4, ttmp5
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s_cbranch_scc1 .signal_done
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// Check for a non-NULL signal event mailbox.
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s_load_dwordx2 [ttmp4, ttmp5], [ttmp2, ttmp3], 0x10 glc
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s_waitcnt lgkmcnt(0)
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s_and_b64 [ttmp4, ttmp5], [ttmp4, ttmp5], [ttmp4, ttmp5]
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s_cbranch_scc0 .signal_done
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// Load the signal event value.
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s_load_dword ttmp2, [ttmp2, ttmp3], 0x18 glc
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s_waitcnt lgkmcnt(0)
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// Write the signal event value to the mailbox.
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s_store_dword ttmp2, [ttmp4, ttmp5], 0x0 glc
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s_waitcnt lgkmcnt(0)
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// Send an interrupt to trigger event notification.
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s_mov_b32 m0, 0x0
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s_nop 0
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s_sendmsg sendmsg(MSG_INTERRUPT)
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.signal_done:
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// Halt the wavefront.
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s_or_b32 ttmp12, ttmp12, SQ_WAVE_STATUS_HALT_MASK
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.exit_trap:
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.macro mExitTrap
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// Restore SQ_WAVE_IB_STS.
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.if .amdgcn.gfx_generation_number == 9
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s_lshr_b32 ttmp2, ttmp11, (TTMP11_SAVE_RCNT_FIRST_REPLAY_SHIFT - SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT)
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@@ -240,19 +187,160 @@ static const unsigned int kCodeTrapHandler9[] = {
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// Return to shader at unmodified PC.
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s_rfe_b64 [ttmp0, ttmp1]
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.endm
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trap_entry:
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// If trap raised (non-zero trap id) then branch.
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s_bfe_u32 ttmp2, ttmp1, SQ_WAVE_PC_HI_TRAP_ID_BFE
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s_cbranch_scc1 .trap_raised
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// If non-masked exception raised then branch.
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s_getreg_b32 ttmp2, hwreg(HW_REG_TRAPSTS)
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s_and_b32 ttmp3, ttmp2, (SQ_WAVE_TRAPSTS_MEM_VIOL_MASK | SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK)
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s_cbranch_scc1 .excp_raised
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// Otherwise trap entered due to single step exception.
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.signal_debugger:
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s_bitset1_b32 ttmp11, TTMP11_DEBUG_TRAP_BIT
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// Fetch doorbell index for our queue.
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s_mov_b32 ttmp2, exec_lo
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s_mov_b32 ttmp3, exec_hi
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mGetDoorbellId
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s_mov_b32 exec_hi, ttmp3
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// Restore exec_lo, move the doorbell_id into ttmp3
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s_and_b32 exec_lo, exec_lo, SENDMSG_M0_DOORBELL_ID_MASK
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s_mov_b32 ttmp3, exec_lo
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s_mov_b32 exec_lo, ttmp2
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// Set the debug interrupt context id.
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// FIXME: Make conditional on TTMP11_DEBUG_TRAP_BIT when exceptions are handled.
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s_bitset1_b32 ttmp3, DEBUG_INTERRUPT_CONTEXT_ID_BIT
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// Send an interrupt to trigger event notification.
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s_mov_b32 ttmp2, m0
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s_mov_b32 m0, ttmp3
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s_nop 0x0 // Manually inserted wait states
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s_sendmsg sendmsg(MSG_INTERRUPT)
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// Restore m0
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s_mov_b32 m0, ttmp2
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// If PC is at an s_endpgm instruction then don't halt the wavefront.
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s_and_b32 ttmp1, ttmp1, SQ_WAVE_PC_HI_ADDRESS_MASK
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s_load_dword ttmp2, [ttmp0, ttmp1]
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s_waitcnt lgkmcnt(0)
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s_cmp_eq_u32 ttmp2, INSN_S_ENDPGM_OPCODE
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s_cbranch_scc1 .skip_halt
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s_or_b32 ttmp12, ttmp12, SQ_WAVE_STATUS_HALT_MASK
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.skip_halt:
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mExitTrap
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.excp_raised:
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// If memory violation without XNACK error then signal queue error.
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// XNACK error will be handled by VM interrupt, since it has more information.
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s_and_b32 ttmp3, ttmp2, (SQ_WAVE_TRAPSTS_MEM_VIOL_MASK | SQ_WAVE_TRAPSTS_XNACK_ERROR_MASK)
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s_cmp_eq_u32 ttmp3, SQ_WAVE_TRAPSTS_MEM_VIOL_MASK
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s_mov_b32 ttmp3, SIGNAL_CODE_MEM_VIOL
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s_cbranch_scc1 .signal_error
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// If illegal instruction then signal queue error.
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s_and_b32 ttmp3, ttmp2, SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK
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s_mov_b32 ttmp3, SIGNAL_CODE_ILLEGAL_INST
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s_cbranch_scc1 .signal_error
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// Otherwise (memory violation with XNACK error) return to shader.
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s_branch .exit_trap
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.trap_raised:
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// If debugger trap (s_trap >= 3) then signal debugger.
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s_cmp_ge_u32 ttmp2, 0x3;
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s_cbranch_scc1 .signal_debugger
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// If llvm.trap (s_trap 2) then signal queue error.
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s_cmp_eq_u32 ttmp2, 0x2
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s_mov_b32 ttmp3, SIGNAL_CODE_LLVM_TRAP
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s_cbranch_scc1 .signal_error
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// For other traps advance PC and return to shader.
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s_add_u32 ttmp0, ttmp0, 0x4
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s_addc_u32 ttmp1, ttmp1, 0x0
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s_branch .exit_trap
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.signal_error:
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// FIXME: don't trash ttmp4/ttmp5 when exception handling is unified.
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s_mov_b32 ttmp4, ttmp3
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// Fetch doorbell index for our queue.
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mGetDoorbellId
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// Map doorbell index to amd_queue_t* through TMA (doorbell_queue_map).
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s_and_b32 ttmp2, exec_lo, MAX_NUM_DOORBELLS_MASK
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s_lshl_b32 ttmp2, ttmp2, 0x3
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s_load_dwordx2 [ttmp2, ttmp3], [ttmp14, ttmp15], ttmp2 glc
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s_waitcnt lgkmcnt(0)
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// Retrieve queue_inactive_signal from amd_queue_t*.
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s_load_dwordx2 [ttmp2, ttmp3], [ttmp2, ttmp3], 0xC0 glc
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s_waitcnt lgkmcnt(0)
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// Set queue signal value to error code.
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s_mov_b32 ttmp5, 0x0
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s_atomic_swap_x2 [ttmp4, ttmp5], [ttmp2, ttmp3], 0x8 glc
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s_waitcnt lgkmcnt(0)
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// Skip event trigger if the signal value was already non-zero.
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s_or_b32 ttmp4, ttmp4, ttmp5
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s_cbranch_scc1 .halt_wave
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// Check for a non-NULL signal event mailbox.
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s_load_dwordx2 [ttmp4, ttmp5], [ttmp2, ttmp3], 0x10 glc
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s_waitcnt lgkmcnt(0)
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s_and_b64 [ttmp4, ttmp5], [ttmp4, ttmp5], [ttmp4, ttmp5]
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s_cbranch_scc0 .halt_wave
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// Load the signal event value.
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s_load_dword ttmp2, [ttmp2, ttmp3], 0x18 glc
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s_waitcnt lgkmcnt(0)
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// Write the signal event value to the mailbox.
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s_store_dword ttmp2, [ttmp4, ttmp5], 0x0 glc
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s_waitcnt lgkmcnt(0)
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// Send an interrupt to trigger event notification.
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s_mov_b32 m0, 0x0
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s_nop 0
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s_sendmsg sendmsg(MSG_INTERRUPT)
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.halt_wave:
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// Halt the wavefront.
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s_or_b32 ttmp12, ttmp12, SQ_WAVE_STATUS_HALT_MASK
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.exit_trap:
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mExitTrap
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*/
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0xb8eef803, 0x8670ff6e, 0x10000100, 0xbf06ff70, 0x00000100, 0xbef000ff,
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0x20000000, 0xbf85000e, 0x8670ff6e, 0x00000800, 0xbef000f4, 0xbf85000a,
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0x92eeff6d, 0x00080010, 0xbf84002c, 0xbf06826e, 0xbef000ff, 0x80000000,
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0xbf850003, 0x806c846c, 0x826d806d, 0xbf820025, 0xbefe00ff, 0x80000000,
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0xbf90000a, 0xbf800007, 0xbf0c9f7e, 0xbf84fffd, 0x866eff7e, 0x000003ff,
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0x8e6e836e, 0xc0051bbd, 0x0000006e, 0xbf8cc07f, 0xc0071bb7, 0x000000c0,
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0xbf8cc07f, 0xbef10080, 0xc2831c37, 0x00000008, 0xbf8cc07f, 0x87707170,
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0xbf85000e, 0xc0071c37, 0x00000010, 0xbf8cc07f, 0x86f07070, 0xbf840009,
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0xc0031bb7, 0x00000018, 0xbf8cc07f, 0xc0431bb8, 0x00000000, 0xbf8cc07f,
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0xbefc0080, 0xbf800000, 0xbf900001, 0x8778ff78, 0x00002000, 0x8f6e8b77,
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0x866eff6e, 0x001f8000, 0xb96ef807, 0x86fe7e7e, 0x86ea6a6a, 0xb978f802,
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0xbe801f6c,
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0x92eeff6d, 0x00080010, 0xbf850036, 0xb8eef803, 0x866fff6e, 0x00000900,
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0xbf850026, 0xbef71a87, 0xbeee007e, 0xbeef007f, 0xbefe00ff, 0x80000000,
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0xbf90000a, 0xbf800007, 0xbf0c9f7e, 0xbf84fffd, 0xbeff006f, 0x867eff7e,
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0x00000fff, 0xbeef007e, 0xbefe006e, 0xbeef1a97, 0xbeee007c, 0xbefc006f,
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0xbf800000, 0xbf900001, 0xbefc006e, 0x866dff6d, 0x0000ffff, 0xc0021bb6,
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0x00000000, 0xbf8cc07f, 0xbf06ff6e, 0x0bf81000, 0xbf850002, 0x8778ff78,
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0x00002000, 0x8f6e8b77, 0x866eff6e, 0x001f8000, 0xb96ef807, 0x86fe7e7e,
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0x86ea6a6a, 0xb978f802, 0xbe801f6c, 0x866fff6e, 0x10000100, 0xbf06ff6f,
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0x00000100, 0xbeef00ff, 0x20000000, 0xbf85000e, 0x866fff6e, 0x00000800,
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0xbeef00f4, 0xbf85000a, 0xbf82002f, 0xbf09836e, 0xbf85ffcc, 0xbf06826e,
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0xbeef00ff, 0x80000000, 0xbf850003, 0x806c846c, 0x826d806d, 0xbf820026,
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0xbef0006f, 0xbefe00ff, 0x80000000, 0xbf90000a, 0xbf800007, 0xbf0c9f7e,
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0xbf84fffd, 0x866eff7e, 0x000003ff, 0x8e6e836e, 0xc0051bbd, 0x0000006e,
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0xbf8cc07f, 0xc0071bb7, 0x000000c0, 0xbf8cc07f, 0xbef10080, 0xc2831c37,
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0x00000008, 0xbf8cc07f, 0x87707170, 0xbf85000e, 0xc0071c37, 0x00000010,
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0xbf8cc07f, 0x86f07070, 0xbf840009, 0xc0031bb7, 0x00000018, 0xbf8cc07f,
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0xc0431bb8, 0x00000000, 0xbf8cc07f, 0xbefc0080, 0xbf800000, 0xbf900001,
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0x8778ff78, 0x00002000, 0x8f6e8b77, 0x866eff6e, 0x001f8000, 0xb96ef807,
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0x86fe7e7e, 0x86ea6a6a, 0xb978f802, 0xbe801f6c,
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};
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static const unsigned int kCodeCopyAligned8[] = {
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@@ -368,18 +456,26 @@ static const unsigned int kCodeFill10[] = {
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};
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static const unsigned int kCodeTrapHandler10[] = {
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0xB96EF803, 0x8770FF6E, 0x10000100, 0xBF06FF70, 0x00000100, 0xBEF003FF,
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0x20000000, 0xBF85000E, 0x8770FF6E, 0x00000800, 0xBEF003F4, 0xBF85000A,
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0x93EEFF6D, 0x00080010, 0xBF84002C, 0xBF06826E, 0xBEF003FF, 0x80000000,
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0xBF850003, 0x806C846C, 0x826D806D, 0xBF820025, 0xBEFE03FF, 0x80000000,
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0xBF90000A, 0xBF800007, 0xBF0C9F7E, 0xBF84FFFD, 0x876EFF7E, 0x000003FF,
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0x8F6E836E, 0xF4051BBD, 0xDC000000, 0xBF8CC07F, 0xF4051BB7, 0xFA0000C0,
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0xBF8CC07F, 0xBEF10380, 0xF6811C37, 0xFA000008, 0xBF8CC07F, 0x88707170,
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0xBF85000E, 0xF4051C37, 0xFA000010, 0xBF8CC07F, 0x87F07070, 0xBF840009,
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0xF4011BB7, 0xFA000018, 0xBF8CC07F, 0xF4411BB8, 0xFA000000, 0xBF8CC07F,
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0xBEFC0380, 0xBF800000, 0xBF900001, 0x8878FF78, 0x00002000, 0x906E8977,
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0x876FFF6E, 0x003F8000, 0x906E8677, 0x876EFF6E, 0x02000000, 0x886E6F6E,
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0xB9EEF807, 0x87FE7E7E, 0x87EA6A6A, 0xB9F8F802, 0xBE80226C,
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0x93eeff6d, 0x00080010, 0xbf85003a, 0xb96ef803, 0x876fff6e, 0x00000900,
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0xbf85002a, 0xbef71d87, 0xbeee037e, 0xbeef037f, 0xbefe03ff, 0x80000000,
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0xbf90000a, 0xbf800007, 0xbf0c9f7e, 0xbf84fffd, 0xbeff036f, 0x877eff7e,
|
||||
0x00000fff, 0xbeef037e, 0xbefe036e, 0xbeef1d97, 0xbeee037c, 0xbefc036f,
|
||||
0xbf800000, 0xbf900001, 0xbefc036e, 0x876dff6d, 0x0000ffff, 0xf4001bb6,
|
||||
0xfa000000, 0xbf8cc07f, 0xbf06ff6e, 0x0bf81000, 0xbf850002, 0x8878ff78,
|
||||
0x00002000, 0x906e8977, 0x876fff6e, 0x003f8000, 0x906e8677, 0x876eff6e,
|
||||
0x02000000, 0x886e6f6e, 0xb9eef807, 0x87fe7e7e, 0x87ea6a6a, 0xb9f8f802,
|
||||
0xbe80226c, 0x876fff6e, 0x10000100, 0xbf06ff6f, 0x00000100, 0xbeef03ff,
|
||||
0x20000000, 0xbf85000e, 0x876fff6e, 0x00000800, 0xbeef03f4, 0xbf85000a,
|
||||
0xbf82002f, 0xbf09836e, 0xbf85ffc8, 0xbf06826e, 0xbeef03ff, 0x80000000,
|
||||
0xbf850003, 0x806c846c, 0x826d806d, 0xbf820026, 0xbef0036f, 0xbefe03ff,
|
||||
0x80000000, 0xbf90000a, 0xbf800007, 0xbf0c9f7e, 0xbf84fffd, 0x876eff7e,
|
||||
0x000003ff, 0x8f6e836e, 0xf4051bbd, 0xdc000000, 0xbf8cc07f, 0xf4051bb7,
|
||||
0xfa0000c0, 0xbf8cc07f, 0xbef10380, 0xf6811c37, 0xfa000008, 0xbf8cc07f,
|
||||
0x88707170, 0xbf85000e, 0xf4051c37, 0xfa000010, 0xbf8cc07f, 0x87f07070,
|
||||
0xbf840009, 0xf4011bb7, 0xfa000018, 0xbf8cc07f, 0xf4411bb8, 0xfa000000,
|
||||
0xbf8cc07f, 0xbefc0380, 0xbf800000, 0xbf900001, 0x8878ff78, 0x00002000,
|
||||
0x906e8977, 0x876fff6e, 0x003f8000, 0x906e8677, 0x876eff6e, 0x02000000,
|
||||
0x886e6f6e, 0xb9eef807, 0x87fe7e7e, 0x87ea6a6a, 0xb9f8f802, 0xbe80226c,
|
||||
};
|
||||
|
||||
} // namespace amd
|
||||
|
||||
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