trap_handler_gfx12.s: Fix access to EXCP_FLAG_PRIV

There is an issue in the gfx12 trap handler where the EXCP_FLAG_PRIV
is only fetched under certain conditions (trap_id != 0) while it should
have been fetched unconditionally.  As a consequence, the interrupt
payload might contain invalid data, leading to incorrect exceptions
being reported by the runtime.  Debugger is mostly un-affected as it
will inspect the wave's state to figure out what exception(s) have been
reported for each wave.

Also, it is not necessary to check for the host trap bit if trap_id is
!= 0 in gfx12, there is on trap ID anymore for host trap.

This patch implements those fixes.

Co-Authored-By: Laurent Morichetti <laurent.morichetti@amd.com>
Change-Id: Ib72cd8cc5d935ca643e241da7fccd3f96201b09d
Signed-off-by: Chris Freehill <cfreehil@amd.com>

runtime/hsa-runtime/core/runtime/trap_handler/trap_handler_gfx12.s

@@ -88,11 +88,7 @@ trap_entry:
   s_bfe_u32            ttmp2, ttmp1, SQ_WAVE_PC_HI_TRAP_ID_BFE
   s_cbranch_scc0       .no_skip_debugtrap
 
-  s_getreg_b32         ttmp3, hwreg(HW_REG_EXCP_FLAG_PRIV)
-  s_bitcmp1_b32        ttmp3, SQ_WAVE_EXCP_FLAG_PRIV_HT_SHIFT
-
   // If caused by s_trap then advance PC.
-  s_cbranch_scc1       .not_s_trap
   s_add_u32            ttmp0, ttmp0, 0x4
   s_addc_u32           ttmp1, ttmp1, 0x0
 
@@ -117,14 +113,13 @@ trap_entry:
   s_lshl_b32           ttmp2, ttmp2, TTMP6_SAVED_STATUS_HALT_SHIFT
   s_or_b32             ttmp6, ttmp6, ttmp2
 
-  // Save trap status.
-  s_mov_b32            ttmp2, ttmp3
-
   // Fetch doorbell id for our queue.
   s_sendmsg_rtn_b32    ttmp3, sendmsg(MSG_RTN_GET_DOORBELL)
   s_wait_kmcnt         0
   s_and_b32            ttmp3, ttmp3, DOORBELL_ID_MASK
 
+  s_getreg_b32	       ttmp2, hwreg(HW_REG_EXCP_FLAG_PRIV)
+
   s_bitcmp1_b32        ttmp2, SQ_WAVE_EXCP_FLAG_PRIV_XNACK_ERROR_SHIFT
   s_cbranch_scc0       .not_memory_violation
   s_or_b32             ttmp3, ttmp3, EC_QUEUE_WAVE_MEMORY_VIOLATION_M0