Initial support for POWER platforms
Tested on Talos II with Vega 64
POWER systems allocate NUMA nodes on multiples of 8 to allow CPU
onlining / offlining
Set the correct NUMA mask bits when requesting node-bound memory
allocations
This is a cleanup/squash/rebase of:
https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/pull/47
Change-Id: Id4af6dff7e66e9d464d6b17a1e99087eb3ac8e51
Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
[ROCm/ROCR-Runtime commit: 5fd3c868b2]
Este cometimento está contido em:
Timothy Pearson
cometido por
Jeremy Newton
Jeremy Newton
ascendente
3672168b7d
cometimento
7a601bb339
@@ -1514,7 +1514,11 @@ static int bind_mem_to_numa(uint32_t node_id, void *mem,
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if (!node_mask)
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return -ENOMEM;
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#ifdef __PPC64__
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numa_bitmask_setbit(node_mask, node_id * 8);
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#else
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numa_bitmask_setbit(node_mask, node_id);
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#endif
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mode |= mflags.ui32.NoSubstitute ? MPOL_BIND : MPOL_PREFERRED;
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r = mbind(mem, SizeInBytes, mode, node_mask->maskp, num_node + 1, 0);
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numa_bitmask_free(node_mask);
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@@ -1,5 +1,6 @@
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/*
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* Copyright © 2014 Advanced Micro Devices, Inc.
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* Copyright 2016-2018 Raptor Engineering, LLC. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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@@ -76,12 +77,14 @@ static int processor_vendor = -1;
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/* Supported System Vendors */
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enum SUPPORTED_PROCESSOR_VENDORS {
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GENUINE_INTEL = 0,
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AUTHENTIC_AMD
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AUTHENTIC_AMD,
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IBM_POWER
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};
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/* Adding newline to make the search easier */
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static const char *supported_processor_vendor_name[] = {
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"GenuineIntel\n",
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"AuthenticAMD\n"
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"AuthenticAMD\n",
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"\n" // POWER requires a different search method
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};
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static HSAKMT_STATUS topology_take_snapshot(void);
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@@ -497,6 +500,13 @@ static int get_cpu_cache_info(const char *prefix, struct proc_cpuinfo *cpuinfo,
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int idx, num_idx, n;
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HsaCacheProperties *this_cache;
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char path[256], str[256];
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bool is_power9 = false;
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if (processor_vendor == IBM_POWER) {
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if (strcmp(cpuinfo[0].model_name, "POWER9") == 0) {
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is_power9 = true;
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}
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}
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this_cache = cpu_ci->cache_prop;
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num_idx = cpu_ci->num_caches;
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@@ -504,19 +514,27 @@ static int get_cpu_cache_info(const char *prefix, struct proc_cpuinfo *cpuinfo,
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/* If this cache is shared by multiple CPUs, we only need
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* to list it in the first CPU.
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*/
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snprintf(path, 256, "%s/index%d/shared_cpu_list", prefix, idx);
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/* shared_cpu_list is shown as n1,n2... or n1-n2,n3-n4...
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* For both cases, this cache is listed to proc n1 only.
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*/
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fscanf_dec(path, (uint32_t *)&n);
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if (cpu_ci->proc_num != n) {
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/* proc is not n1. Skip and reduce the cache count. */
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--cpu_ci->num_caches;
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continue;
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if (is_power9) {
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// POWER9 has SMT4
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if (cpu_ci->proc_num & 0x3) {
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/* proc is not 0,4,8,etc. Skip and reduce the cache count. */
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--cpu_ci->num_caches;
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continue;
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}
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} else {
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snprintf(path, 256, "%s/index%d/shared_cpu_list", prefix, idx);
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/* shared_cpu_list is shown as n1,n2... or n1-n2,n3-n4...
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* For both cases, this cache is listed to proc n1 only.
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*/
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fscanf_dec(path, (uint32_t *)&n);
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if (cpu_ci->proc_num != n) {
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/* proc is not n1. Skip and reduce the cache count. */
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--cpu_ci->num_caches;
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continue;
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}
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this_cache->ProcessorIdLow = cpuinfo[cpu_ci->proc_num].apicid;
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}
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this_cache->ProcessorIdLow = cpuinfo[cpu_ci->proc_num].apicid;
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/* CacheLevel */
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snprintf(path, 256, "%s/index%d/level", prefix, idx);
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fscanf_dec(path, &this_cache->CacheLevel);
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@@ -845,6 +863,8 @@ static int topology_search_processor_vendor(const char *processor_name)
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for (i = 0; i < ARRAY_LEN(supported_processor_vendor_name); i++) {
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if (!strcmp(processor_name, supported_processor_vendor_name[i]))
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return i;
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if (!strcmp(processor_name, "POWER9, altivec supported\n"))
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return IBM_POWER;
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}
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return -1;
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}
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@@ -877,6 +897,52 @@ static HSAKMT_STATUS topology_parse_cpuinfo(struct proc_cpuinfo *cpuinfo,
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return HSAKMT_STATUS_ERROR;
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}
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#ifdef __PPC64__
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char *p2;
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/* Each line in /proc/cpuinfo that read_buf is constructed, the format
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* is like this:
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* "token : value\n"
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* where token is our target like vendor_id, model name, apicid ...
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* and value is the answer
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*/
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while (fgets(read_buf, sizeof(read_buf), fd)) {
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/* processor number */
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if (!strncmp("processor ", read_buf, sizeof("processor ") - 1)) {
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p = strchr(read_buf, ':');
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p += 2; /* remove ": " */
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proc = atoi(p);
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if (proc >= num_procs) {
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pr_warn("cpuinfo contains processor %d larger than %u\n",
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proc, num_procs);
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ret = HSAKMT_STATUS_NO_MEMORY;
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goto exit;
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}
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continue;
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}
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/* vendor name / model name */
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if (!strncmp("cpu ", read_buf, sizeof("cpu ") - 1) &&
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(processor_vendor == -1)) {
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p = strchr(read_buf, ':');
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p += 2; /* remove ": " */
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processor_vendor = topology_search_processor_vendor(p);
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p2 = strchr(p, ',');
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if (p2 != NULL) {
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p2++;
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*p2 = 0;
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}
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if (strlen(p) < HSA_PUBLIC_NAME_SIZE) {
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/* -1 to remove \n from p */
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strncpy(cpuinfo[proc].model_name, p, strlen(p) - 1);
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cpuinfo[proc].model_name[strlen(p) - 1] = '\0';
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} else
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strncpy(cpuinfo[proc].model_name, p, HSA_PUBLIC_NAME_SIZE);
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continue;
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}
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}
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#else
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/* Each line in /proc/cpuinfo that read_buf is constructed, the format
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* is like this:
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* "token : value\n"
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@@ -926,6 +992,7 @@ static HSAKMT_STATUS topology_parse_cpuinfo(struct proc_cpuinfo *cpuinfo,
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cpuinfo[proc].apicid = atoi(p);
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}
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}
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#endif
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if (processor_vendor < 0) {
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pr_err("Failed to get Processor Vendor. Setting to %s",
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@@ -1289,7 +1356,13 @@ static int topology_create_temp_cpu_cache_list(int node,
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*temp_cpu_ci_list = NULL;
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/* Get info from /sys/devices/system/node/nodeX/cpuY/cache */
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snprintf(node_dir, MAXPATHSIZE, "/sys/devices/system/node/node%d", node);
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int node_real = node;
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if (processor_vendor == IBM_POWER) {
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if (!strcmp(cpuinfo[0].model_name, "POWER9")) {
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node_real = node * 8;
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}
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}
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snprintf(node_dir, MAXPATHSIZE, "/sys/devices/system/node/node%d", node_real);
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/* Other than cpuY folders, this dir also has cpulist and cpumap */
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max_cpus = num_subdirs(node_dir, "cpu");
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if (max_cpus <= 0) {
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