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Initial support for POWER platforms

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Tested on Talos II with Vega 64

POWER systems allocate NUMA nodes on multiples of 8 to allow CPU
onlining / offlining
Set the correct NUMA mask bits when requesting node-bound memory
allocations

This is a cleanup/squash/rebase of:
https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/pull/47

Change-Id: Id4af6dff7e66e9d464d6b17a1e99087eb3ac8e51
Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>


[ROCm/ROCR-Runtime commit: 5fd3c868b2]
This commit is contained in:
Timothy Pearson
2019-11-23 20:09:55 -05:00
committed by Jeremy Newton
parent 3672168b7d
commit 7a601bb339
2 changed files with 91 additions and 14 deletions
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projects/rocr-runtime/src/fmm.c
+4
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@@ -1514,7 +1514,11 @@ static int bind_mem_to_numa(uint32_t node_id, void *mem,
if (!node_mask)
return -ENOMEM;
#ifdef __PPC64__
numa_bitmask_setbit(node_mask, node_id * 8);
#else
numa_bitmask_setbit(node_mask, node_id);
#endif
mode |= mflags.ui32.NoSubstitute ? MPOL_BIND : MPOL_PREFERRED;
r = mbind(mem, SizeInBytes, mode, node_mask->maskp, num_node + 1, 0);
numa_bitmask_free(node_mask);