Enable timing profile option (#558)
This commit is contained in:
@@ -37,8 +37,10 @@ namespace {
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minChunkSize = nthreads*(Proto::calcBytePerGrain()/sizeof(T))/2;
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}
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INIT_COUNTER;
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Primitives<T, RedOp, FanSymmetric<1>, 0, Proto, 0> prims
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(tid, nthreads, &ring->prev, &ring->next, args->sendbuff, args->recvbuff, args->redOpArg, args->connIndex << 16);
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ACCUMULATE_PRIM_COUNTER(prim);
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for (ssize_t gridOffset = 0; gridOffset < size; gridOffset += loopSize) {
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ssize_t realChunkSize;
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@@ -163,9 +163,13 @@ struct PrimitivesWithoutDirect {
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if (tid == 0) { struct ncclProfElem *elem = devProf.elems+args->opCount%PROFILE_NUM_ITEMS; elem->elem[blockIdx.x].prim##_cycle += (__builtin_amdgcn_s_memrealtime() - t0 \
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+ ws - elem->elem[blockIdx.x].wait_cycle); \
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elem->elem[blockIdx.x].prim##_byte += nelem * sizeof(T); elem->elem[blockIdx.x].opCount = args->opCount;}
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#define ACCUMULATE_PRIM_COUNTER(prim) \
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if (tid == 0) { struct ncclProfElem *elem = devProf.elems+args->opCount%PROFILE_NUM_ITEMS; elem->elem[blockIdx.x].prim##_cycle += (__builtin_amdgcn_s_memrealtime() - t0 \
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+ ws - elem->elem[blockIdx.x].wait_cycle); elem->elem[blockIdx.x].opCount = args->opCount;}
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#else
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#define INIT_COUNTER
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#define ACCUMULATE_COUNTER(prim)
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#define ACCUMULATE_PRIM_COUNTER(prim)
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#endif
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#endif
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@@ -327,6 +327,7 @@ struct ncclProfElem {
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uint64_t total_cycle;
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uint64_t wait_cycle; // total wait cycle
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// primtive cycles
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uint64_t prim_cycle;
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uint64_t send_cycle;
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uint64_t directSend_cycle;
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uint64_t recv_cycle;
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+20
-1
@@ -229,6 +229,7 @@ void *ncclCommThreadMain(void *arg) {
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#endif
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#undef NCCL_NO_OPTIMIZE
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#define PROFILE_USE_TIME
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static ncclResult_t commFree(ncclComm_t comm) {
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if (comm == NULL)
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@@ -255,8 +256,12 @@ static ncclResult_t commFree(ncclComm_t comm) {
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CUDACHECK(hipMemcpy(prof.elems, comm->hostDevComm.devProf.elems, sizeof(struct ncclProfElem)*PROFILE_NUM_ITEMS, hipMemcpyDeviceToHost));
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#define VEGA_GPU_RTC_FREQUENCY 2.5E7
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if (comm->rank == 0) {
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INFO(NCCL_INIT, "# %7s %4s %6s %6s %6s %6s %7s %6s %6s %6s %6s %6s", "Rank:Ch", "opCt", "total", " wait", "send", "rcRdS", "dRcRdCS", "dRcCS", "dRc", "cS", "rc", "rcCS");
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INFO(NCCL_INIT, "# %7s %4s %6s %6s %6s %6s %6s %7s %6s %6s %6s %6s %6s", "Rank:Ch", "opCt", "total", " prim", " wait", "send", "rcRdS", "dRcRdCS", "dRcCS", "dRc", "cS", "rc", "rcCS");
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#ifdef PROFILE_USE_TIME
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INFO(NCCL_INIT, "# %7s %4s %6s %6s %6s %6s %6s %7s %6s %6s %6s %6s %6s", "", "", " (us)", " (us)", " (us)", " (us)", " (us)", " (us)", " (us)", " (us)", " (us)", " (us)", " (us)");
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#else
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INFO(NCCL_INIT, "# %7s %4s %6s %6s %6s %6s %7s %6s %6s %6s %6s %6s", "", "", " (s)", " (s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)");
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#endif
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}
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for (int i = 1; i < PROFILE_NUM_ITEMS; i++) {
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int valid = 0;
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@@ -265,6 +270,19 @@ static ncclResult_t commFree(ncclComm_t comm) {
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if (elem->elem[chan].opCount == 0)
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continue;
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valid++;
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#ifdef PROFILE_USE_TIME
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INFO(NCCL_INIT, "# [%02d:%02d] %04d %6.2f %6.2f %6.2f %6.2f %6.2f %7.2f %6.2f %6.2f %6.2f %6.2f %6.2f",
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comm->rank, chan, (uint32_t)elem->elem[chan].opCount, (double)elem->elem[chan].total_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6,
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(double)elem->elem[chan].prim_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6, (double)elem->elem[chan].wait_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6,
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(elem->elem[chan].send_cycle) ? ((double)elem->elem[chan].send_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6) : 0,
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(elem->elem[chan].recvReduceSend_cycle) ? ((double)elem->elem[chan].recvReduceSend_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6) : 0,
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(elem->elem[chan].directRecvReduceCopySend_cycle) ? ((double)elem->elem[chan].directRecvReduceCopySend_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6) : 0,
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(elem->elem[chan].directRecvCopySend_cycle) ? ((double)elem->elem[chan].directRecvCopySend_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6) : 0,
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(elem->elem[chan].directRecv_cycle) ? ((double)elem->elem[chan].directRecv_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6) : 0,
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(elem->elem[chan].copySend_cycle) ? ((double)elem->elem[chan].copySend_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6) : 0,
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(elem->elem[chan].recv_cycle) ? ((double)elem->elem[chan].recv_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6) : 0,
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(elem->elem[chan].recvCopySend_cycle) ? ((double)elem->elem[chan].recvCopySend_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E6) : 0);
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#else
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INFO(NCCL_INIT, "# [%02d:%02d] %04d %6.4f %6.4f %6.2f %6.2f %7.2f %6.2f %6.2f %6.2f %6.2f %6.2f",
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comm->rank, chan, (uint32_t)elem->elem[chan].opCount, (double)elem->elem[chan].total_cycle/VEGA_GPU_RTC_FREQUENCY,
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(double)elem->elem[chan].wait_cycle/VEGA_GPU_RTC_FREQUENCY,
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@@ -276,6 +294,7 @@ static ncclResult_t commFree(ncclComm_t comm) {
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(elem->elem[chan].copySend_cycle) ? (double)elem->elem[chan].copySend_byte/((double)elem->elem[chan].copySend_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E9) : 0,
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(elem->elem[chan].recv_cycle) ? (double)elem->elem[chan].recv_byte/((double)elem->elem[chan].recv_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E9) : 0,
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(elem->elem[chan].recvCopySend_cycle) ? (double)elem->elem[chan].recvCopySend_byte/((double)elem->elem[chan].recvCopySend_cycle/VEGA_GPU_RTC_FREQUENCY*1.0E9) : 0);
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#endif
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}
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if (valid == 0)
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break;
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