SWDEV-457337 - Fix header alignment
Change-Id: I9f25f6c4f0d00c76b66d13162f30be11368f5b59 Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>
This commit is contained in:
@@ -158,11 +158,11 @@ void TestFrequenciesRead::Run(void) {
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PrintDeviceHeader(processor_handles_[i]);
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freq_output(CLK_TYPE_MEM, "Supported GPU Memory");
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freq_output(CLK_TYPE_SYS, "Supported GPU");
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freq_output(CLK_TYPE_DF, "Data Fabric Clock");
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freq_output(CLK_TYPE_DCEF, "Display Controller Engine Clock");
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freq_output(CLK_TYPE_SOC, "SOC Clock");
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freq_output(AMDSMI_CLK_TYPE_MEM, "Supported GPU Memory");
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freq_output(AMDSMI_CLK_TYPE_SYS, "Supported GPU");
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freq_output(AMDSMI_CLK_TYPE_DF, "Data Fabric Clock");
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freq_output(AMDSMI_CLK_TYPE_DCEF, "Display Controller Engine Clock");
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freq_output(AMDSMI_CLK_TYPE_SOC, "SOC Clock");
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err = amdsmi_get_gpu_pci_bandwidth(processor_handles_[i], &b);
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if (err == AMDSMI_STATUS_NOT_SUPPORTED) {
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@@ -104,13 +104,13 @@ void TestFrequenciesReadWrite::Run(void) {
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for (uint32_t dv_ind = 0; dv_ind < num_monitor_devs(); ++dv_ind) {
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PrintDeviceHeader(processor_handles_[dv_ind]);
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for (uint32_t clk = CLK_TYPE_FIRST; clk <= CLK_TYPE__MAX; ++clk) {
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for (uint32_t clk = AMDSMI_CLK_TYPE_FIRST; clk <= AMDSMI_CLK_TYPE__MAX; ++clk) {
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amdsmi_clk = (amdsmi_clk_type_t)clk;
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auto freq_read = [&]() -> bool {
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// Skip CLK_TYPE_PCIE, which does not supported in rocm-smi.
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// Skip AMDSMI_CLK_TYPE_PCIE, which does not supported in rocm-smi.
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std::cout << amdsmi_clk << std::endl;
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if (amdsmi_clk == CLK_TYPE_PCIE)
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if (amdsmi_clk == AMDSMI_CLK_TYPE_PCIE)
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return false;
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ret = amdsmi_get_clk_freq(processor_handles_[dv_ind], amdsmi_clk, &f);
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std::cout << ret << std::endl;
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@@ -139,8 +139,8 @@ void TestFrequenciesReadWrite::Run(void) {
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auto freq_write = [&]() {
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// Set clocks to something other than the usual default of the lowest
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// frequency.
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// Skip CLK_TYPE_PCIE, which does not supported in rocm-smi.
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if (amdsmi_clk == CLK_TYPE_PCIE)
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// Skip AMDSMI_CLK_TYPE_PCIE, which does not supported in rocm-smi.
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if (amdsmi_clk == AMDSMI_CLK_TYPE_PCIE)
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return;
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freq_bitmask = 0b01100; // Try the 3rd and 4th clocks
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@@ -155,7 +155,7 @@ void TestIdInfoRead::Run(void) {
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std::cout << "\t**Device Vram vendor id: "
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<< vram_info.vram_vendor << std::endl;
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std::cout << "\t**Device Vram size: "
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<< vram_info.vram_size_mb << std::endl;
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<< vram_info.vram_size << std::endl;
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}
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err = amdsmi_get_gpu_vendor_name(processor_handles_[i], buffer, kBufferLen);
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@@ -229,7 +229,7 @@ void TestMutualExclusion::Run(void) {
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_get_gpu_fan_speed_max(processor_handles_[0], 0, &dmy_ui64);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_get_temp_metric(processor_handles_[0], TEMPERATURE_TYPE_EDGE, AMDSMI_TEMP_CURRENT, &dmy_i64);
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ret = amdsmi_get_temp_metric(processor_handles_[0], AMDSMI_TEMPERATURE_TYPE_EDGE, AMDSMI_TEMP_CURRENT, &dmy_i64);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_reset_gpu_fan(processor_handles_[0], 0);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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@@ -239,13 +239,13 @@ void TestMutualExclusion::Run(void) {
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_get_gpu_overdrive_level(processor_handles_[0], &dmy_ui32);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_get_clk_freq(processor_handles_[0], CLK_TYPE_SYS, &dmy_freqs);
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ret = amdsmi_get_clk_freq(processor_handles_[0], AMDSMI_CLK_TYPE_SYS, &dmy_freqs);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_get_gpu_od_volt_info(processor_handles_[0], &dmy_od_volt);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_get_gpu_od_volt_curve_regions(processor_handles_[0], &dmy_ui32, &dmy_vlt_reg);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_set_clk_freq(processor_handles_[0], CLK_TYPE_SYS, 0);
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ret = amdsmi_set_clk_freq(processor_handles_[0], AMDSMI_CLK_TYPE_SYS, 0);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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ret = amdsmi_get_gpu_ecc_count(processor_handles_[0], AMDSMI_GPU_BLOCK_UMC, &dmy_err_cnt);
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CHECK_RET(ret, AMDSMI_STATUS_BUSY);
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@@ -57,15 +57,15 @@
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static const std::map<uint32_t, std::string> kTempSensorNameMap = {
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{TEMPERATURE_TYPE_VRAM, "Memory"},
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{TEMPERATURE_TYPE_HOTSPOT, "Hotspot"},
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{TEMPERATURE_TYPE_JUNCTION, "Junction"},
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{TEMPERATURE_TYPE_EDGE, "Edge"},
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{TEMPERATURE_TYPE_HBM_0, "HBM_0"},
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{TEMPERATURE_TYPE_HBM_1, "HBM_1"},
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{TEMPERATURE_TYPE_HBM_2, "HBM_2"},
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{TEMPERATURE_TYPE_HBM_3, "HBM_3"},
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{TEMPERATURE_TYPE_PLX, "PLX"}
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{AMDSMI_TEMPERATURE_TYPE_VRAM, "Memory"},
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{AMDSMI_TEMPERATURE_TYPE_HOTSPOT, "Hotspot"},
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{AMDSMI_TEMPERATURE_TYPE_JUNCTION, "Junction"},
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{AMDSMI_TEMPERATURE_TYPE_EDGE, "Edge"},
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{AMDSMI_TEMPERATURE_TYPE_HBM_0, "HBM_0"},
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{AMDSMI_TEMPERATURE_TYPE_HBM_1, "HBM_1"},
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{AMDSMI_TEMPERATURE_TYPE_HBM_2, "HBM_2"},
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{AMDSMI_TEMPERATURE_TYPE_HBM_3, "HBM_3"},
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{AMDSMI_TEMPERATURE_TYPE_PLX, "PLX"}
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};
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TestTempRead::TestTempRead() : TestBase() {
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set_title("AMDSMI Temp Read Test");
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@@ -141,7 +141,7 @@ void TestTempRead::Run(void) {
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"C" << std::endl;
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}
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};
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for (type = TEMPERATURE_TYPE_FIRST; type <= TEMPERATURE_TYPE__MAX; ++type) {
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for (type = AMDSMI_TEMPERATURE_TYPE_FIRST; type <= AMDSMI_TEMPERATURE_TYPE__MAX; ++type) {
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IF_VERB(STANDARD) {
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std::cout << "\t** **********" << kTempSensorNameMap.at(type) <<
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" Temperatures **********" << std::endl;
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@@ -220,19 +220,19 @@ const std::string GetVoltSensorNameStr(amdsmi_voltage_type_t st) {
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return kVoltSensorNameMap.at(st);
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}
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const char *FreqEnumToStr(amdsmi_clk_type_t amdsmi_clk) {
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static_assert(CLK_TYPE__MAX == CLK_TYPE_DCLK1,
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static_assert(AMDSMI_CLK_TYPE__MAX == AMDSMI_CLK_TYPE_DCLK1,
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"FreqEnumToStr() needs to be updated");
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switch (amdsmi_clk) {
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case CLK_TYPE_SYS: return "System clock";
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case CLK_TYPE_DF: return "Data Fabric clock";
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case CLK_TYPE_DCEF: return "Display Controller Engine clock";
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case CLK_TYPE_SOC: return "SOC clock";
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case CLK_TYPE_MEM: return "Memory clock";
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case CLK_TYPE_PCIE: return "PCIE clock";
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case CLK_TYPE_VCLK0: return "VCLK0 clock";
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case CLK_TYPE_VCLK1: return "VCLK1 clock";
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case CLK_TYPE_DCLK0: return "DCLK0 clock";
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case CLK_TYPE_DCLK1: return "DCLK1 clock";
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case AMDSMI_CLK_TYPE_SYS: return "System clock";
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case AMDSMI_CLK_TYPE_DF: return "Data Fabric clock";
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case AMDSMI_CLK_TYPE_DCEF: return "Display Controller Engine clock";
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case AMDSMI_CLK_TYPE_SOC: return "SOC clock";
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case AMDSMI_CLK_TYPE_MEM: return "Memory clock";
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case AMDSMI_CLK_TYPE_PCIE: return "PCIE clock";
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case AMDSMI_CLK_TYPE_VCLK0: return "VCLK0 clock";
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case AMDSMI_CLK_TYPE_VCLK1: return "VCLK1 clock";
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case AMDSMI_CLK_TYPE_DCLK0: return "DCLK0 clock";
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case AMDSMI_CLK_TYPE_DCLK1: return "DCLK1 clock";
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default: return "Invalid Clock ID";
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}
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}
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@@ -49,28 +49,28 @@
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#include "test_utils.h"
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static const std::map<amdsmi_fw_block_t, const char *> kDevFWNameMap = {
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{FW_ID_ASD, "asd"},
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{FW_ID_CP_CE, "ce"},
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{FW_ID_DMCU_ERAM, "dmcu"}, // TODO(bliu): double check
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{FW_ID_MC, "mc"},
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{FW_ID_CP_ME, "me"},
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{FW_ID_CP_MEC1, "mec1"},
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{FW_ID_CP_MEC2, "mec2"},
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{FW_ID_CP_MES, "mes"},
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{FW_ID_MES_KIQ, "mes_kiq"}, // TODO: double check
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{FW_ID_CP_PFP, "pfp"},
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{FW_ID_RLC, "rlc"},
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{FW_ID_RLC_SRLG, "rlc_srlg"},
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{FW_ID_RLC_SRLS, "rlc_srls"},
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{FW_ID_SDMA1, "sdma1"},
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{FW_ID_SDMA2, "sdma2"},
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{FW_ID_PM, "pm"},
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{FW_ID_PSP_SOSDRV, "sos"},
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{FW_ID_TA_RAS, "ta_ras"},
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{FW_ID_TA_XGMI, "ta_xgmi"},
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{FW_ID_UVD, "uvd"},
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{FW_ID_VCE, "vce"},
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{FW_ID_VCN, "vcn"},
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{AMDSMI_FW_ID_ASD, "asd"},
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{AMDSMI_FW_ID_CP_CE, "ce"},
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{AMDSMI_FW_ID_DMCU_ERAM, "dmcu"}, // TODO(bliu): double check
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{AMDSMI_FW_ID_MC, "mc"},
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{AMDSMI_FW_ID_CP_ME, "me"},
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{AMDSMI_FW_ID_CP_MEC1, "mec1"},
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{AMDSMI_FW_ID_CP_MEC2, "mec2"},
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{AMDSMI_FW_ID_CP_MES, "mes"},
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{AMDSMI_FW_ID_MES_KIQ, "mes_kiq"}, // TODO: double check
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{AMDSMI_FW_ID_CP_PFP, "pfp"},
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{AMDSMI_FW_ID_RLC, "rlc"},
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{AMDSMI_FW_ID_RLC_SRLG, "rlc_srlg"},
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{AMDSMI_FW_ID_RLC_SRLS, "rlc_srls"},
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{AMDSMI_FW_ID_SDMA1, "sdma1"},
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{AMDSMI_FW_ID_SDMA2, "sdma2"},
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{AMDSMI_FW_ID_PM, "pm"},
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{AMDSMI_FW_ID_PSP_SOSDRV, "sos"},
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{AMDSMI_FW_ID_TA_RAS, "ta_ras"},
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{AMDSMI_FW_ID_TA_XGMI, "ta_xgmi"},
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{AMDSMI_FW_ID_UVD, "uvd"},
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{AMDSMI_FW_ID_VCE, "vce"},
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{AMDSMI_FW_ID_VCN, "vcn"},
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};
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const char *
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