SWDEV-371123 - Use barrier value packet for event records

Change-Id: I5e5e5e89e0d96a2430b4682d168b76848fa5b94e


[ROCm/clr commit: 4f64d89026]

projects/clr/rocclr/device/rocm/rocsettings.cpp

@@ -102,12 +102,14 @@ Settings::Settings() {
   fgs_kernel_arg_ = false;
   // by default for asics < gfx940 old single grid sync path is followed
   coop_sync_ = false;
+  barrier_value_packet_ = false;
 }
 
 // ================================================================================================
 bool Settings::create(bool fullProfile, uint32_t gfxipMajor, uint32_t gfxipMinor,
                       uint32_t gfxStepping, bool enableXNACK, bool coop_groups) {
   customHostAllocator_ = false;
+  uint32_t gcnArch = gfxipMajor * 100 + gfxipMinor * 10 + gfxStepping;
 
   if (fullProfile) {
     pinnedXferSize_ = 0;
@@ -162,6 +164,11 @@ bool Settings::create(bool fullProfile, uint32_t gfxipMajor, uint32_t gfxipMinor
     enableExtension(ClAmdFp64);
   }
 
+  if (gcnArch == 910) {
+    // Barrier Value packet is only supported on MI200 for now
+    barrier_value_packet_ = true;
+  }
+
   if (gfxipMajor >= 10) {
      enableWave32Mode_ = true;
      enableWgpMode_ = GPU_ENABLE_WGP_MODE;
@@ -175,7 +182,7 @@ bool Settings::create(bool fullProfile, uint32_t gfxipMajor, uint32_t gfxipMinor
     enableWave32Mode_ = GPU_ENABLE_WAVE32_MODE;
   }
 
-  if (gfxipMajor >= 9 && gfxipMinor >= 4 && gfxStepping >= 0) {
+  if (gcnArch >= 940) {
     coop_sync_ = true;
   }
 

projects/clr/rocclr/device/rocm/rocsettings.hpp

@@ -54,7 +54,8 @@ class Settings : public device::Settings {
       uint skip_copy_sync_ : 1;         //!< Ignore explicit HSA signal waits for copy functionality
       uint fgs_kernel_arg_ : 1;         //!< Use fine grain kernel arg segment
       uint coop_sync_ : 1;              //!< grid and multi-grid sync for gfx940+
-      uint reserved_ : 19;
+      uint barrier_value_packet_ : 1;   //!< Barrier value packet functionality
+      uint reserved_ : 18;
     };
     uint value_;
   };

projects/clr/rocclr/device/rocm/rocvirtual.cpp

@@ -3214,12 +3214,21 @@ void VirtualGPU::submitMarker(amd::Marker& vcmd) {
     } else {
       profilingBegin(vcmd);
       if (timestamp_ != nullptr) {
+        const Settings& settings = dev().settings();
         int32_t releaseFlags = vcmd.getEventScope();
         if (releaseFlags == Device::CacheState::kCacheStateAgent) {
-          dispatchBarrierPacket(kBarrierPacketAgentScopeHeader, false);
+          if (settings.barrier_value_packet_ && vcmd.profilingInfo().marker_ts_) {
+            dispatchBarrierValuePacket(kBarrierPacketAgentScopeHeader);
+          } else {
+            dispatchBarrierPacket(kBarrierPacketAgentScopeHeader, false);
+          }
         } else {
           // Submit a barrier with a cache flushes.
-          dispatchBarrierPacket(kBarrierPacketHeader, false);
+          if (settings.barrier_value_packet_ && vcmd.profilingInfo().marker_ts_) {
+            dispatchBarrierValuePacket(kBarrierPacketHeader);
+          } else {
+            dispatchBarrierPacket(kBarrierPacketHeader, false);
+          }
           hasPendingDispatch_ = false;
         }
       }