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SWDEV-451964 - Limit gpu single allocation percentage for gfx940 only

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Change-Id: Iadcdadd734e7aeeb23742e426353defa972d3ad5


[ROCm/clr commit: dbac2976e4]
This commit is contained in:
Sourabh Betigeri
2024-03-18 17:30:30 -07:00
committed by Chiranjeevi Pattigidi
parent 78008c05c5
commit 7cc5dd56ab
2 changed files with 18 additions and 17 deletions
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projects/clr/rocclr/device/pal/paldevice.cpp
+1 -1
View File
@@ -510,7 +510,7 @@ void NullDevice::fillDeviceInfo(const Pal::DeviceProperties& palProp,
info_.errorCorrectionSupport_ = false;
if (settings().apuSystem_) {
info_.hostUnifiedMemory_ = true;
info_.hostUnifiedMemory_ = 1;
}
info_.iommuv2_ = palProp.gpuMemoryProperties.flags.iommuv2Support;
projects/clr/rocclr/device/rocm/rocdevice.cpp
+17 -16
View File
@@ -1332,6 +1332,19 @@ bool Device::populateOCLDeviceConstants() {
info_.maxWorkItemDimensions_ = 3;
uint8_t memory_properties[8];
// Get the memory property from ROCr.
if (HSA_STATUS_SUCCESS != hsa_agent_get_info(bkendDevice_,
(hsa_agent_info_t) HSA_AMD_AGENT_INFO_MEMORY_PROPERTIES,
memory_properties)) {
LogError("HSA_AGENT_INFO_AMD_MEMORY_PROPERTIES query failed");
}
// Check if the device is APU
if (hsa_flag_isset64(memory_properties, HSA_AMD_MEMORY_PROPERTY_AGENT_IS_APU)) {
info_.hostUnifiedMemory_ = 1;
}
if (settings().enableLocalMemory_ && gpuvm_segment_.handle != 0) {
size_t global_segment_size = 0;
if (HSA_STATUS_SUCCESS != hsa_amd_memory_pool_get_info(gpuvm_segment_,
@@ -1350,8 +1363,9 @@ bool Device::populateOCLDeviceConstants() {
GPU_SINGLE_ALLOC_PERCENT = 75;
}
}
// Limit gpu single allocation percentage on MI300
if ((isa().versionMajor() == 9) && (isa().versionMinor() == 4)) {
// Limit gpu single allocation percentage for gfx940
if ((isa().versionMajor() == 9) && (isa().versionMinor() == 4) &&
(isa().versionStepping() == 0) && (info_.hostUnifiedMemory_ == 1)) {
if (gpu_agents_.size() == 1 || p2p_agents_.size() == 0) {
if (flagIsDefault(GPU_SINGLE_ALLOC_PERCENT)) {
GPU_SINGLE_ALLOC_PERCENT = 60;
@@ -1433,7 +1447,7 @@ bool Device::populateOCLDeviceConstants() {
if (agent_profile_ == HSA_PROFILE_FULL) { // full-profile = participating in coherent memory,
// base-profile = NUMA based non-coherent memory
info_.hostUnifiedMemory_ = true;
info_.hostUnifiedMemory_ = 1;
info_.iommuv2_ = true;
}
info_.memBaseAddrAlign_ =
@@ -1847,19 +1861,6 @@ bool Device::populateOCLDeviceConstants() {
std::numeric_limits<uint32_t>::max(); // gfx10+ does not share SGPRs between waves
}
uint8_t memory_properties[8];
// Get the memory property from ROCr.
if (HSA_STATUS_SUCCESS != hsa_agent_get_info(bkendDevice_,
(hsa_agent_info_t) HSA_AMD_AGENT_INFO_MEMORY_PROPERTIES,
memory_properties)) {
LogError("HSA_AGENT_INFO_AMD_MEMORY_PROPERTIES query failed");
}
// Check if the device is APU
if (hsa_flag_isset64(memory_properties, HSA_AMD_MEMORY_PROPERTY_AGENT_IS_APU)) {
info_.hostUnifiedMemory_ = 1;
}
return true;
}