SWDEV-515512 - Enable memcpy synchronization_behaviour tests (#593)

* SWDEV-515512 - Enable memcpy synchronization_behaviour tests

* SWDEV-515512 - Remove invalid parts of the tests

* SWDEV-515512 - Format the code

---------

Co-authored-by: Marko Arandjelovic <Marko.Arandjelovic@amd.com>
This commit is contained in:
systems-assistant[bot]
2025-09-02 17:32:08 +02:00
zatwierdzone przez GitHub
rodzic 12ca3c9043
commit 7e3ddf3de8
8 zmienionych plików z 2 dodań i 51 usunięć
@@ -23,8 +23,6 @@
"Unit_hipMemRangeGetAttribute_Positive_AccessedBy_Partial_Range",
"Disabling test tracked SWDEV-395683",
"Unit_hipStreamPerThread_MultiThread",
"Disabling tests tracked with SWDEV-389647..",
"Unit_hipMemcpy2DToArrayAsync_Positive_Synchronization_Behavior",
"SWDEV-398981 fails in stress test",
"Unit_hipStreamCreateWithPriority_MulthreadDefaultflag",
"Unit_hipEventIpc",
@@ -104,9 +102,6 @@
"Unit_hipLaunchCooperativeKernelMultiDevice_Negative_MultiKernelSameDevice",
"Unit_hipExtLaunchMultiKernelMultiDevice_Negative_MultiKernelSameDevice",
"=== Below tests are failing PSDB ===",
"Unit_hipMemcpy3D_Positive_Synchronization_Behavior",
"Unit_hipMemcpyParam2D_Positive_Synchronization_Behavior",
"Unit_hipDrvMemcpy3D_Positive_Synchronization_Behavior",
"Unit_hipLaunchCooperativeKernel_Negative_Parameters",
"Unit_hipLaunchKernel_Negative_Parameters",
"Unit_hipModuleLaunchCooperativeKernel_Negative_Parameters",
@@ -346,9 +346,6 @@
"Unit_hipGetMipmappedArrayLevel_Negative",
"Unit_hipFreeMipmappedArray_Negative_DoubleFree",
"Unit_hipFreeMipmappedArrayMultiTArray - int",
"Unit_hipMemcpy3D_Positive_Synchronization_Behavior",
"Unit_hipMemcpyParam2D_Positive_Synchronization_Behavior",
"Unit_hipDrvMemcpy3D_Positive_Synchronization_Behavior",
"Unit_Thread_Block_Tile_Dynamic_Getters_Positive_Basic",
"Performance_hipMemcpy2D_HostToHost",
"Performance_hipMemcpy2DAsync_HostToHost",
@@ -66,9 +66,7 @@
"Unit_hipFreeMipmappedArray_Negative_Parameters",
"Unit_hipCreateSurfaceObject_Negative_Parameters",
"Unit_hipDestroySurfaceObject_Negative_Parameters",
"Unit_hipMemcpy3D_Positive_Synchronization_Behavior",
"Unit_hipMemcpy2D_Positive_Synchronization_Behavior",
"Unit_hipDrvMemcpy3D_Positive_Synchronization_Behavior",
"Unit_hipFreeMipmappedArray_Negative_DoubleFree",
"Unit_hipModuleLoad_Positive_Basic",
"Unit_hipModuleLoad_Negative_Load_From_A_File_That_Is_Not_A_Module",
@@ -80,8 +78,6 @@
"Performance_hipMemsetD16Async",
"Performance_hipMemsetD32",
"Performance_hipMemsetD32Async",
"Unit_hipMemcpyParam2D_Positive_Synchronization_Behavior",
"Unit_hipMemcpy_Positive_Synchronization_Behavior",
"Unit_tex1Dfetch_Positive_ReadModeElementType - char",
"Unit_tex1Dfetch_Positive_ReadModeElementType - unsigned char",
"Unit_tex1Dfetch_Positive_ReadModeElementType - short",
@@ -64,21 +64,11 @@ TEST_CASE("Unit_hipDrvMemcpy3D_Positive_Synchronization_Behavior") {
Memcpy3DDtoHPageableSyncBehavior(DrvMemcpy3DWrapper<>, true);
}
#if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-236
SECTION("Device to Pinned Host") { Memcpy3DDtoHPinnedSyncBehavior(DrvMemcpy3DWrapper<>, true); }
#endif
SECTION("Device to Device") {
#if HT_NVIDIA
Memcpy3DDtoDSyncBehavior(DrvMemcpy3DWrapper<>, false);
#else
Memcpy3DDtoDSyncBehavior(DrvMemcpy3DWrapper<>, true);
#endif
}
SECTION("Device to Device") { Memcpy3DDtoDSyncBehavior(DrvMemcpy3DWrapper<>, false); }
#if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-232
SECTION("Host to Host") { Memcpy3DHtoHSyncBehavior(DrvMemcpy3DWrapper<>, true); }
#endif
}
TEST_CASE("Unit_hipDrvMemcpy3D_Positive_Parameters") {
@@ -254,4 +244,4 @@ TEST_CASE("Unit_hipDrvMemcpy3D_Capture") {
BEGIN_CAPTURE_SYNC(memcpy_err, false);
HIP_CHECK_ERROR(hipDrvMemcpy3D(&params), memcpy_err);
END_CAPTURE_SYNC(memcpy_err);
}
}
@@ -60,9 +60,7 @@ TEST_CASE("Unit_hipMemcpy3D_Positive_Synchronization_Behavior") {
SECTION("Device to Pinned Host") { Memcpy3DDtoHPinnedSyncBehavior(Memcpy3DWrapper<>, true); }
#if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-232
SECTION("Host to Host") { Memcpy3DHtoHSyncBehavior(Memcpy3DWrapper<>, true); }
#endif
}
TEST_CASE("Unit_hipMemcpy3D_Positive_DeviceToDevice_Synchronization_Behavior") {
@@ -64,11 +64,9 @@ TEST_CASE("Unit_hipMemcpy3DAsync_Positive_Synchronization_Behavior") {
SECTION("Host to Device") { Memcpy3DHtoDSyncBehavior(Memcpy3DWrapper<async>, false); }
#if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-233
SECTION("Device to Pageable Host") {
Memcpy3DDtoHPageableSyncBehavior(Memcpy3DWrapper<async>, true);
}
#endif
SECTION("Device to Pinned Host") {
Memcpy3DDtoHPinnedSyncBehavior(Memcpy3DWrapper<async>, false);
@@ -76,9 +74,7 @@ TEST_CASE("Unit_hipMemcpy3DAsync_Positive_Synchronization_Behavior") {
SECTION("Device to Device") { Memcpy3DDtoDSyncBehavior(Memcpy3DWrapper<async>, false); }
#if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-233
SECTION("Host to Host") { Memcpy3DHtoHSyncBehavior(Memcpy3DWrapper<async>, true); }
#endif
}
TEST_CASE("Unit_hipMemcpy3DAsync_Positive_Parameters") {
@@ -57,17 +57,13 @@ TEST_CASE("Unit_hipMemcpyParam2D_Positive_Synchronization_Behavior") {
Memcpy2DDtoHPageableSyncBehavior(MemcpyParam2DAdapter<>(), true);
}
#if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-236
SECTION("Device to Pinned Host") {
Memcpy2DDtoHPinnedSyncBehavior(MemcpyParam2DAdapter<>(), true);
}
#endif
SECTION("Device to Device") { Memcpy2DDtoDSyncBehavior(MemcpyParam2DAdapter<>(), false); }
#if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-232
SECTION("Host to Host") { Memcpy2DHtoHSyncBehavior(MemcpyParam2DAdapter<>(), true); }
#endif
}
TEST_CASE("Unit_hipMemcpyParam2D_Positive_Parameters") {
@@ -31,16 +31,6 @@ TEST_CASE("Unit_hipMemcpy_Positive_Synchronization_Behavior") {
using namespace std::placeholders;
HIP_CHECK(hipDeviceSynchronize());
// For transfers from pageable host memory to device memory, a stream sync is performed before
// the copy is initiated. The function will return once the pageable buffer has been copied to
// the staging memory for DMA transfer to device memory, but the DMA to final destination may
// not have completed.
// For transfers from pinned host memory to device memory, the function is synchronous with
// respect to the host
SECTION("Host memory to device memory") {
MemcpyHPageabletoDSyncBehavior(std::bind(hipMemcpy, _1, _2, _3, hipMemcpyHostToDevice), true);
}
// For transfers from device to either pageable or pinned host memory, the function returns only
// once the copy has completed
SECTION("Device memory to host memory") {
@@ -51,13 +41,6 @@ TEST_CASE("Unit_hipMemcpy_Positive_Synchronization_Behavior") {
// For transfers from device memory to device memory, no host-side synchronization is performed.
SECTION("Device memory to device memory") {
// This behavior differs on NVIDIA and AMD, on AMD the hipMemcpy calls is synchronous with
// respect to the host
#if HT_AMD
HipTest::HIP_SKIP_TEST(
"EXSWCPHIPT-127 - Memcpy from device to device memory behavior differs on AMD and Nvidia");
return;
#endif
MemcpyDtoDSyncBehavior(std::bind(hipMemcpy, _1, _2, _3, hipMemcpyDeviceToDevice), false);
}