Add MMIO_REMAP heap type

Add a MMIO_REMAP heap type and expose mmio virtual address
through HsaKmtGetNodeMemoryProperties



Change-Id: I1e585e6dfbec8fa7c85f1dda7b89b763a8e2c439
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>

include/hsakmttypes.h

@@ -316,6 +316,7 @@ typedef enum _HSA_HEAPTYPE
     HSA_HEAPTYPE_GPU_LDS               = 4, // GPU internal memory (LDS)
     HSA_HEAPTYPE_GPU_SCRATCH           = 5, // GPU special memory (scratch)
     HSA_HEAPTYPE_DEVICE_SVM            = 6, // sys-memory mapped by device page tables
+    HSA_HEAPTYPE_MMIO_REMAP            = 7, // remapped mmio, such as hdp flush registers
 
     HSA_HEAPTYPE_NUMHEAPTYPES,
     HSA_HEAPTYPE_SIZE                  = 0xFFFFFFFF

src/fmm.c

@@ -2379,6 +2379,15 @@ HSAKMT_STATUS fmm_get_aperture_base_and_limit(aperture_type_e aperture_type, HSA
 		}
 		break;
 
+	case FMM_MMIO:
+		if (aperture_is_valid(gpu_mem[slot].mmio_aperture.base,
+			gpu_mem[slot].mmio_aperture.limit)) {
+			*aperture_base = PORT_VPTR_TO_UINT64(gpu_mem[slot].mmio_aperture.base);
+			*aperture_limit = PORT_VPTR_TO_UINT64(gpu_mem[slot].mmio_aperture.limit);
+			err = HSAKMT_STATUS_SUCCESS;
+		}
+		break;
+
 	default:
 		break;
 	}

src/fmm.h

@@ -35,6 +35,7 @@ typedef enum {
 	FMM_LDS,
 	FMM_SCRATCH,
 	FMM_SVM,
+	FMM_MMIO,
 	FMM_LAST_APERTURE_TYPE
 } aperture_type_e;
 

src/topology.c

@@ -39,7 +39,12 @@
 #include "libhsakmt.h"
 #include "fmm.h"
 
-/* Number of memory banks added by thunk on top of topology */
+/* Number of memory banks added by thunk on top of topology
+ * This only includes static heaps like LDS, scratch and SVM,
+ * not for MMIO_REMAP heap. MMIO_REMAP memory bank is reported
+ * dynamically based on whether mmio aperture was mapped
+ * successfully on this node.
+ */
 #define NUM_OF_IGPU_HEAPS 3
 #define NUM_OF_DGPU_HEAPS 3
 /* SYSFS related */
@@ -2057,10 +2062,14 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtGetNodeProperties(HSAuint32 NodeId,
 	*NodeProperties = g_props[NodeId].node;
 	/* For CPU only node don't add any additional GPU memory banks. */
 	if (gpu_id) {
+		uint64_t base, limit;
 		if (topology_is_dgpu(get_device_id_by_gpu_id(gpu_id)))
 			NodeProperties->NumMemoryBanks += NUM_OF_DGPU_HEAPS;
 		else
 			NodeProperties->NumMemoryBanks += NUM_OF_IGPU_HEAPS;
+		if (fmm_get_aperture_base_and_limit(FMM_MMIO, gpu_id, &base,
+				&limit) == HSAKMT_STATUS_SUCCESS)
+			NodeProperties->NumMemoryBanks += 1;
 	}
 	err = HSAKMT_STATUS_SUCCESS;
 
@@ -2151,6 +2160,15 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtGetNodeMemoryProperties(HSAuint32 NodeId,
 		i++;
 	}
 
+	/* Add mmio aperture */
+	if (i < NumBanks &&
+		fmm_get_aperture_base_and_limit(FMM_MMIO, gpu_id,
+				&MemoryProperties[i].VirtualBaseAddress, &aperture_limit) == HSAKMT_STATUS_SUCCESS) {
+		MemoryProperties[i].HeapType = HSA_HEAPTYPE_MMIO_REMAP;
+		MemoryProperties[i].SizeInBytes = (aperture_limit - MemoryProperties[i].VirtualBaseAddress) + 1;
+		i++;
+	}
+
 out:
 	pthread_mutex_unlock(&hsakmt_mutex);
 	return err;