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SWDEV-488290 - Remove Stream to Engine logic and rely on engine query status HSA API.

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Change-Id: I469ab6679360c8ee8d4ee515678a8aa8d4578ebf


[ROCm/clr commit: cc62a82347]
This commit is contained in:
kjayapra-amd
2025-01-31 07:00:02 -05:00
committed by Karthik Jayaprakash
parent cb281e23cd
commit 892d7bb064
3 changed files with 21 additions and 75 deletions
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projects/clr/rocclr/device/rocm/rocblit.cpp
+21 -32
View File
@@ -494,27 +494,20 @@ inline bool DmaBlitManager::rocrCopyBuffer(address dst, hsa_agent_t& dstAgent,
if ((srcAgent.handle == dev().getCpuAgent().handle) &&
(dstAgent.handle != dev().getCpuAgent().handle)) {
engine = HwQueueEngine::SdmaWrite;
copyMask = kUseRegularCopyApi ? 0 : dev().fetchSDMAMask(this, false);
if (copyMask == 0) {
// Track the HtoD copies and increment the count. The last used SDMA engine might be busy
// and using it everytime can cause contention. When the count exceeds the threshold,
// reset it so as to check the engine status and fetch the new mask.
sdmaEngineRetainCount_ = (sdmaEngineRetainCount_ > kRetainCountThreshold)
? 0 : sdmaEngineRetainCount_++;
}
// Track the HtoD copies and increment the count. The last used SDMA engine might be busy
// and using it everytime can cause contention. When the count exceeds the threshold,
// reset it so as to check the engine status and fetch the new mask.
sdmaEngineRetainCount_ = (sdmaEngineRetainCount_ > kRetainCountThreshold)
? 0 : sdmaEngineRetainCount_++;
} else if ((srcAgent.handle != dev().getCpuAgent().handle) &&
(dstAgent.handle == dev().getCpuAgent().handle)) {
engine = HwQueueEngine::SdmaRead;
copyMask = kUseRegularCopyApi ? 0 : dev().fetchSDMAMask(this, true);
if (copyMask == 0 && sdmaEngineRetainCount_ > 0) {
// Track the DtoH copies and decrement the count.
sdmaEngineRetainCount_--;
}
// Track the DtoH copies and decrement the count.
sdmaEngineRetainCount_--;
}
if (engine == HwQueueEngine::Unknown && forceSDMA) {
engine = HwQueueEngine::SdmaRead;
copyMask = kUseRegularCopyApi ? 0 : dev().fetchSDMAMask(this, true);
}
gpu().Barriers().SetActiveEngine(engine);
@@ -522,23 +515,21 @@ inline bool DmaBlitManager::rocrCopyBuffer(address dst, hsa_agent_t& dstAgent,
hsa_signal_t active = gpu().Barriers().ActiveSignal(kInitSignalValueOne, gpu().timestamp());
if (!kUseRegularCopyApi && engine != HwQueueEngine::Unknown) {
if (sdmaEngineRetainCount_) {
// Check if there a recently used SDMA engine for the stream
copyMask = gpu().getLastUsedSdmaEngine();
ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Last copy mask 0x%x", copyMask);
copyMask &= (engine == HwQueueEngine::SdmaRead ?
sdmaEngineReadMask_ : sdmaEngineWriteMask_);
}
if (copyMask == 0) {
if (sdmaEngineRetainCount_) {
// Check if there a recently used SDMA engine for the stream
copyMask = gpu().getLastUsedSdmaEngine();
ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Last copy mask 0x%x", copyMask);
copyMask &= (engine == HwQueueEngine::SdmaRead ?
sdmaEngineReadMask_ : sdmaEngineWriteMask_);
}
if (copyMask == 0) {
// Check SDMA engine status
status = hsa_amd_memory_copy_engine_status(dstAgent, srcAgent, &freeEngineMask);
ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Query copy engine status %x, "
"free_engine mask 0x%x", status, freeEngineMask);
// Return a mask with the rightmost bit set
copyMask = freeEngineMask - (freeEngineMask & (freeEngineMask - 1));
gpu().setLastUsedSdmaEngine(copyMask);
}
// Check SDMA engine status
status = hsa_amd_memory_copy_engine_status(dstAgent, srcAgent, &freeEngineMask);
ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Query copy engine status %x, "
"free_engine mask 0x%x", status, freeEngineMask);
// Return a mask with the rightmost bit set
copyMask = freeEngineMask - (freeEngineMask & (freeEngineMask - 1));
gpu().setLastUsedSdmaEngine(copyMask);
}
if (copyMask != 0 && status == HSA_STATUS_SUCCESS) {
@@ -706,8 +697,6 @@ KernelBlitManager::~KernelBlitManager() {
}
}
dev().resetSDMAMask(this);
if (nullptr != program_) {
program_->release();
}
projects/clr/rocclr/device/rocm/rocdevice.cpp
-39
View File
@@ -1240,11 +1240,6 @@ bool Device::populateOCLDeviceConstants() {
return false;
}
for (uint32_t i = 0; i < info_.numSDMAengines_; i++) {
engineAssignMap_[1 << i] = 0;
}
checkAtomicSupport();
assert(system_segment_.handle != 0);
@@ -3515,46 +3510,12 @@ void Device::HiddenHeapInit(const VirtualGPU& gpu) {
std::call_once(heap_initialized_, HeapZeroOut);
}
// ================================================================================================
uint32_t Device::fetchSDMAMask(const device::BlitManager* handle, bool readEngine) const {
uint32_t engine = 0;
{
amd::ScopedLock lock(vgpusAccess());
for (auto it = engineAssignMap_.rbegin(); it != engineAssignMap_.rend(); ++it) {
// If blitManager handle is in the map return the engine ID else
// add to the map
if (it->second == handle) {
engine = it->first;
break;
} else if (it->second == 0) {
it->second = handle;
engine = it->first;
break;
}
}
}
return (readEngine ? maxSdmaReadMask_ : maxSdmaWriteMask_) & engine;
}
// ================================================================================================
void Device::getSdmaRWMasks(uint32_t* readMask, uint32_t* writeMask) const {
*readMask = maxSdmaReadMask_;
*writeMask = maxSdmaWriteMask_;
}
// ================================================================================================
void Device::resetSDMAMask(const device::BlitManager* handle) const {
amd::ScopedLock lock(vgpusAccess());
for (auto& it : engineAssignMap_) {
if (it.second == handle) {
it.second = 0;
break;
}
}
}
// ================================================================================================
void Device::AddKernel(Kernel& gpuKernel) const {
amd::ScopedLock lock(vgpusAccess());
projects/clr/rocclr/device/rocm/rocdevice.hpp
-4
View File
@@ -595,8 +595,6 @@ class Device : public NullDevice {
void HiddenHeapAlloc(const VirtualGPU& gpu);
//! Init hidden heap for device memory allocations
void HiddenHeapInit(const VirtualGPU& gpu);
uint32_t fetchSDMAMask(const device::BlitManager* handle, bool readEngine = true) const;
void resetSDMAMask(const device::BlitManager* handle) const;
void getSdmaRWMasks(uint32_t* readMask, uint32_t* writeMask) const;
bool isXgmi() const { return isXgmi_; }
@@ -678,8 +676,6 @@ class Device : public NullDevice {
//! Read and Write mask for device<->host
uint32_t maxSdmaReadMask_;
uint32_t maxSdmaWriteMask_;
//! Map of SDMA engineId<->stream
mutable std::map<uint32_t, const device::BlitManager*> engineAssignMap_;
bool isXgmi_; //!< Flag to indicate if there is XGMI between CPU<->GPU
//! Code object to kernel info map (used in the crash dump analysis)