Update csv headers, and SystemExit codes
Signed-off-by: JoseSantosAMD <Jose.Santos@amd.com>
[ROCm/rocprofiler-compute commit: 717a21cf84]
This commit is contained in:
committed by
Karl W. Schulz
parent
595ca9141a
commit
8ecc6dff7f
+1
-1
@@ -1,4 +1,4 @@
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Index,KernelName,gpu-id
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Dispatch_ID,Kernel_Name,GPU_ID
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0,__amd_rocclr_fillBufferAligned.kd,0
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1,"void benchmark_func<short, 256, 8u, 0u>(short, short*) [clone .kd]",0
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2,"void benchmark_func<float, 256, 8u, 0u>(float, float*) [clone .kd]",0
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@@ -1,4 +1,4 @@
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Index,KernelName,gpu-id,queue-id,queue-index,pid,tid,grd,wgr,lds,scr,vgpr,sgpr,fbar,sig,obj,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,TCP_TCC_READ_REQ_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TCC_WRITE_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCC_EA_RDREQ_32B_sum,TCC_EA_RDREQ_sum,TCC_EA_WRREQ_64B_sum,TCC_EA_WRREQ_sum,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,SQ_LDS_IDX_ACTIVE,SQ_LDS_BANK_CONFLICT,DispatchNs,BeginNs,EndNs,CompleteNs
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Dispatch_ID,Kernel_Name,GPU_ID,queue-id,queue-index,pid,tid,grd,Workgroup_Size,LDS_Per_Workgroup,scr,vgpr,SGPR,fbar,sig,obj,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,TCP_TCC_READ_REQ_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TCC_WRITE_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCC_EA_RDREQ_32B_sum,TCC_EA_RDREQ_sum,TCC_EA_WRREQ_64B_sum,TCC_EA_WRREQ_sum,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,SQ_LDS_IDX_ACTIVE,SQ_LDS_BANK_CONFLICT,DispatchNs,Start_Timestamp,End_Timestamp,CompleteNs
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0,"__amd_rocclr_fillBufferAligned.kd",0,0,0,241894,241894,33554432,256,0,0,4,32,4160,0x0,0x7f6e9cc04280,0,0,0,0,0,0,0,0,0.0000000000,8388608.0000000000,4194304.0000000000,0.0000000000,0.0000000000,310.0000000000,4128768.0000000000,4128768.0000000000,0,0,0,0,0,0,0,0,0.0000000000,0,0,17931286038190,17901582538237,17931431845031,17931431958331
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1,"void benchmark_func<short, 256, 8u, 0u>(short, short*) [clone .kd]",0,0,2,241894,241894,32768,256,0,0,12,24,13888,0x0,0x7f6e9cc23f80,0,0,0,0,0,0,0,0,8192.0000000000,16384.0000000000,0.0000000000,0.0000000000,0.0000000000,8262.0000000000,0.0000000000,0.0000000000,0,0,0,0,0,0,0,0,0.0000000000,0,0,17931437652391,17931431845031,17931438008283,17931438016542
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2,"void benchmark_func<float, 256, 8u, 0u>(float, float*) [clone .kd]",0,0,5,241894,241894,4194304,256,0,0,12,24,14336,0x7f6e9fb92380,0x7f6e9cc23fc0,0,0,0,0,0,0,262144,0,2097152.0000000000,2097152.0000000000,0.0000000000,0.0000000000,0.0000000000,2097343.0000000000,0.0000000000,0.0000000000,0,0,0,0,0,0,0,0,0.0000000000,0,0,17931438610067,17931438008283,17931439296934,17931439297600
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+1
-1
@@ -1,4 +1,4 @@
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KernelName,Count,Sum(ns),Mean(ns),Median(ns),Pct
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Kernel_Name,Count,Sum(ns),Mean(ns),Median(ns),Pct
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__amd_rocclr_fillBufferAligned.kd,1,29849306794.0,29849306794.0,29849306794.0,99.23161614424411
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"void benchmark_func<short, 256, 8u, 0u>(short, short*) [clone .kd]",1,6163252.0,6163252.0,6163252.0,0.0204892348383507
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"void benchmark_func<int, 256, 8u, 512u>(int, int*) [clone .kd]",1,4454736.0,4454736.0,4454736.0,0.0148094110133506
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+1
-1
@@ -1,7 +1,7 @@
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Metric,Count,Unit
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VALU - Vector,,Instr per wave
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VMEM,,Instr per wave
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LDS,,Instr per wave
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LDS_Per_Workgroup,,Instr per wave
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VALU - MFMA,,Instr per wave
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SALU,,Instr per wave
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SMEM,,Instr per wave
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+3
-3
@@ -1,12 +1,12 @@
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Metric,Avg,Min,Max,Unit
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Wave Cycles,,,,Cycles/wave
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LDS Instrs,,,,Instr per wave
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LDS_Per_Workgroup Instrs,,,,Instr per wave
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Bandwidth,,,,Bytes per wave
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Bank Conficts/Access,,,,Conflicts/access
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Index Accesses,,,,Cycles per wave
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Dispatch_ID Accesses,,,,Cycles per wave
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Atomic Cycles,,,,Cycles per wave
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Bank Conflict,,,,Cycles per wave
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Addr Conflict,,,,Cycles per wave
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Unaligned Stall,,,,Cycles per wave
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Mem Violations,,,, per wave
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LDS Latency,,,,Cycles
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LDS_Per_Workgroup Latency,,,,Cycles
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+5
-5
@@ -6,16 +6,16 @@ SMEM,,smem_
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VALU,,valu_
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MFMA,,mfma_
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VMEM,,vmem_
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LDS,,lds_
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LDS_Per_Workgroup,,lds_
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GWS,,gws_
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BR,,br_
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VGPR,12.0,vgpr_
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SGPR,24.0,sgpr_
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LDS Allocation,0.0,lds_alloc_
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LDS_Per_Workgroup Allocation,0.0,lds_alloc_
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Scratch Allocation,0.0,scratch_alloc_
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Wavefronts,,wavefronts_
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Workgroups,,workgroups_
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LDS Req,,lds_req_
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LDS_Per_Workgroup Req,,lds_req_
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IL1 Fetch,,il1_fetch_
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IL1 Hit,,il1_hit_
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IL1_L2 Rd,,il1_l2_req_
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@@ -46,10 +46,10 @@ Fabric_L2 Wr,,l2_fabric_wr_
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Fabric_l2 Atomic,,l2_fabric_atom_
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HBM Rd,,hbm_rd_
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HBM Wr,,hbm_wr_
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LDS Util,,lds_util_
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LDS_Per_Workgroup Util,,lds_util_
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VL1 Coalesce,,vl1_coales_
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VL1 Stall,,vl1_stall_
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LDS Lat,,lds_lat_
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LDS_Per_Workgroup Lat,,lds_lat_
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vL1D Lat,,sl1_lat_
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IL1 Lat,,il1_lat_
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Wave Occupancy,,wave_occ_
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+1
-1
@@ -1,4 +1,4 @@
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Index,KernelName,gpu-id
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Dispatch_ID,Kernel_Name,GPU_ID
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0,__amd_rocclr_fillBufferAligned.kd,0
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1,"void benchmark_func<short, 256, 8u, 0u>(short, short*) [clone .kd]",0
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2,"void benchmark_func<float, 256, 8u, 0u>(float, float*) [clone .kd]",0
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+2
-2
@@ -12,8 +12,8 @@ VALU Util,,Pct,100,
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MFMA Util,,Pct,100,
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VALU Active Threads/Wave,,Threads,64,
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IPC - Issue,,Instr/cycle,5,
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LDS BW,0.0,Gb/sec,22630.4,0.0
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LDS Bank Conflict,,Conflicts/access,32,
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LDS_Per_Workgroup BW,0.0,Gb/sec,22630.4,0.0
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LDS_Per_Workgroup Bank Conflict,,Conflicts/access,32,
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Instr Cache Hit Rate,,Pct,100,
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Instr Cache BW,,Gb/s,6092.8,
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Scalar L1D Cache Hit Rate,,Pct,100,
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+1
-1
@@ -6,7 +6,7 @@ Scratch Stall,,,,Cycles
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Insufficient SIMD Waveslots,,,,Simd
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Insufficient SIMD VGPRs,,,,Simd
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Insufficient SIMD SGPRs,,,,Simd
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Insufficient CU LDS,,,,Cu
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Insufficient CU LDS_Per_Workgroup,,,,Cu
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Insufficient CU Barries,,,,Cu
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Insufficient Bulky Resource,,,,Cu
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Reach CU Threadgroups Limit,,,,Cycles
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+1
-1
@@ -6,5 +6,5 @@ Saved Wavefronts,,,,Wavefronts
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Restored Wavefronts,,,,Wavefronts
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VGPRs,11.784431137724551,4,16,Registers
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SGPRs,24.047904191616766,24,32,Registers
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LDS Allocation,0.0,0,0,Bytes
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LDS_Per_Workgroup Allocation,0.0,0,0,Bytes
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Scratch Allocation,0.0,0,0,Bytes
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