libhsakmt: add RAS support v2

RAS feature enabling bit and errors return are implemented in
existed topology and event mechanism.

v2: change library interface.

Change-Id: I75807c080b5b26e8115240b05b3d7016cb05a31a
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>

include/hsakmttypes.h

@@ -203,7 +203,10 @@ typedef union
         unsigned int WaveLaunchTrapOverrideSupported: 1; // Indicates if Wave Launch Trap Override is supported on the node.
         unsigned int WaveLaunchModeSupported: 1; // Indicates if Wave Launch Mode is supported on the node.
         unsigned int PreciseMemoryOperationsSupported: 1; // Indicates if Precise Memory Operations are supported on the node.
-        unsigned int Reserved            : 13;
+        unsigned int SRAM_EDCSupport: 1;         // Indicates if GFX internal SRAM EDC/ECC functionality is active
+        unsigned int Mem_EDCSupoort: 1;          // Indicates if GFX internal DRAM/HBM EDC/ECC functionality is active
+        unsigned int RASEventNotify: 1;          // Indicates if GFX extended RASFeatures and RAS EventNotify status is available
+        unsigned int Reserved            : 10;
     } ui32;
 } HSA_CAPABILITY;
 
@@ -902,9 +905,11 @@ typedef struct _HsaAccessAttributeFailure
     unsigned int ReadOnly    : 1;  // Write access to a read-only page
     unsigned int NoExecute   : 1;  // Execute access to a page marked NX
     unsigned int GpuAccess   : 1;  // Host access only
-    unsigned int ECC         : 1;  // ECC failure (if supported by HW)
+    unsigned int ECC         : 1;  // RAS ECC failure (notification of DRAM ECC - non-recoverable - error, if supported by HW)
     unsigned int Imprecise   : 1;  // Can't determine the exact fault address
-    unsigned int Reserved    : 26; // must be 0
+    unsigned int ErrorType   : 3;  // Indicates RAS errors or other errors causing the access to GPU to fail
+                                      // 0 = no RAS error, 1 = ECC_SRAM, 2 = Link_SYNFLOOD (poison), 3 = GPU hang (not attributable to a specific cause), other values reserved
+    unsigned int Reserved    : 23; // must be 0
 } HsaAccessAttributeFailure;
 
 // data associated with HSA_EVENTID_MEMORY

include/linux/kfd_ioctl.h

@@ -285,7 +285,11 @@ struct kfd_hsa_memory_exception_data {
 	struct kfd_memory_exception_failure failure;
 	__u64 va;
 	__u32 gpu_id;
-	__u32 pad;
+	__u32 ErrorType; /* 0 = no RAS error,
+				1 = ECC_SRAM,
+				2 = Link_SYNFLOOD (poison),
+				3 = GPU hang (not attributable to a specific cause),
+				other values reserved */
 };
 
 /* hw exception data */

src/events.c

@@ -323,6 +323,9 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtWaitOnMultipleEvents(HsaEvent *Events[],
 				Events[i]->EventData.EventData.MemoryAccessFault.Failure.ReadOnly = event_data[i].memory_exception_data.failure.ReadOnly;
 				Events[i]->EventData.EventData.MemoryAccessFault.Failure.NoExecute = event_data[i].memory_exception_data.failure.NoExecute;
 				Events[i]->EventData.EventData.MemoryAccessFault.Failure.Imprecise = event_data[i].memory_exception_data.failure.imprecise;
+				Events[i]->EventData.EventData.MemoryAccessFault.Failure.ErrorType = event_data[i].memory_exception_data.ErrorType;
+				Events[i]->EventData.EventData.MemoryAccessFault.Failure.ECC =
+						((event_data[i].memory_exception_data.ErrorType == 1) || (event_data[i].memory_exception_data.ErrorType == 2)) ? 1 : 0;
 				Events[i]->EventData.EventData.MemoryAccessFault.Flags = HSA_EVENTID_MEMORY_FATAL_PROCESS;
 				analysis_memory_exception(&event_data[i].memory_exception_data);
 			}