P4 to Git Change 1495187 by gandryey@gera-w8 on 2017/12/15 14:50:07

SWDEV-79445 - OCL generic changes and code clean-up
	- Add a workaround for incorrect profiling results, when release_mem can occur later in the pipeline and breaking the timeline sequence with dispatches. Ucode can't process RM packets and cs_partial_flush at the same time, thus RM packets are delayed up to 2 cs_patial_flush calls. A workaround adds CS partial flush after dispatch and switches to write_reg_mem for TS updates

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paltimestamp.cpp#4 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.cpp#66 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.hpp#37 edit

rocclr/runtime/device/pal/paltimestamp.cpp

@@ -19,7 +19,7 @@ TimeStamp::~TimeStamp() {}
 
 void TimeStamp::begin(bool sdma) {
   if (!flags_.beginIssued_) {
-    gpu().iCmd()->CmdWriteTimestamp(Pal::HwPipePoint::HwPipeBottom, *iMem_,
+    gpu().iCmd()->CmdWriteTimestamp(Pal::HwPipePoint::HwPipeTop, *iMem_,
                                     memOffset_ + CommandStartTime * sizeof(uint64_t));
     flags_.beginIssued_ = true;
   }
@@ -27,7 +27,7 @@ void TimeStamp::begin(bool sdma) {
 
 void TimeStamp::end(bool sdma) {
   CondLog(!flags_.beginIssued_, "We didn't issue a begin operation!");
-  gpu().iCmd()->CmdWriteTimestamp(Pal::HwPipePoint::HwPipeBottom, *iMem_,
+  gpu().iCmd()->CmdWriteTimestamp(Pal::HwPipePoint::HwPipeTop, *iMem_,
                                   memOffset_ + CommandEndTime * sizeof(uint64_t));
   flags_.endIssued_ = true;
   flags_.sdma_ = sdma;