SWDEV-350289 - Fix build warnings due to file re-org

Change-Id: I0066fa163b9f25fdde4c5b3baed1ef0654390c06


[ROCm/clr commit: 289062682a]

projects/clr/rocclr/device/comgrctx.hpp

@@ -23,7 +23,7 @@
 #include <mutex>
 #if defined(USE_COMGR_LIBRARY)
 #include "top.hpp"
-#include "amd_comgr.h"
+#include "amd_comgr/amd_comgr.h"
 
 namespace amd {
 typedef void (*t_amd_comgr_get_version)(size_t *major, size_t *minor);

projects/clr/rocclr/device/devkernel.hpp

@@ -105,7 +105,7 @@ struct RuntimeHandle {
   uint32_t group_segment_size;        //!< From GROUP_SEGMENT_FIXED_SIZE
 };
 
-#include "amd_comgr.h"
+#include "amd_comgr/amd_comgr.h"
 
 //  for Code Object V3
 enum class ArgField : uint8_t {

projects/clr/rocclr/device/devprogram.hpp

@@ -29,7 +29,7 @@
 #include "devwavelimiter.hpp"
 
 #if defined(USE_COMGR_LIBRARY)
-#include "amd_comgr.h"
+#include "amd_comgr/amd_comgr.h"
 #endif  // defined(USE_COMGR_LIBRARY)
 
 namespace amd {

projects/clr/rocclr/device/rocm/pro/prodevice.cpp

@@ -20,7 +20,7 @@
 
 #ifndef WITHOUT_HSA_BACKEND
 
-#include "hsa_ext_amd.h"
+#include "hsa/hsa_ext_amd.h"
 #include "lnxheaders.h"
 #include "prodevice.hpp"
 #include "amdgpu_drm.h"

projects/clr/rocclr/device/rocm/pro/prodriver.hpp

@@ -23,7 +23,7 @@
 #ifndef WITHOUT_HSA_BACKEND
 
 #include "top.hpp"
-#include "hsa.h"
+#include "hsa/hsa.h"
 
 /*! \addtogroup HSA
  *  @{

projects/clr/rocclr/device/rocm/roccounters.hpp

@@ -24,7 +24,7 @@
 #include "top.hpp"
 #include "device/device.hpp"
 #include "device/rocm/rocdevice.hpp"
-#include "hsa_ven_amd_aqlprofile.h"
+#include "hsa/hsa_ven_amd_aqlprofile.h"
 
 namespace roc {
 

projects/clr/rocclr/device/rocm/rocdevice.hpp

@@ -40,10 +40,10 @@
 #include "device/rocm/rocprintf.hpp"
 #include "device/rocm/rocglinterop.hpp"
 
-#include "hsa.h"
-#include "hsa_ext_image.h"
-#include "hsa_ext_amd.h"
-#include "hsa_ven_amd_loader.h"
+#include "hsa/hsa.h"
+#include "hsa/hsa_ext_image.h"
+#include "hsa/hsa_ext_amd.h"
+#include "hsa/hsa_ven_amd_loader.h"
 
 #include <atomic>
 #include <iostream>

projects/clr/rocclr/device/rocm/rocglinterop.hpp

@@ -34,7 +34,7 @@ typedef __GLXcontextRec* GLXContext;
 
 #include "device/rocm/mesa_glinterop.h"
 #include "device/rocm/rocregisters.hpp"
-#include "hsa_ext_amd.h"
+#include "hsa/hsa_ext_amd.h"
 
 namespace roc {
 

projects/clr/rocclr/device/rocm/rockernel.cpp

@@ -19,7 +19,7 @@
  THE SOFTWARE. */
 
 #include "rockernel.hpp"
-#include "amd_hsa_kernel_code.h"
+#include "hsa/amd_hsa_kernel_code.h"
 
 #include <algorithm>
 

projects/clr/rocclr/device/rocm/rocprogram.cpp

@@ -25,7 +25,7 @@
 #include "utils/options.hpp"
 #include "rockernel.hpp"
 
-#include "amd_hsa_kernel_code.h"
+#include "hsa/amd_hsa_kernel_code.h"
 
 #include <string>
 #include <vector>

projects/clr/rocclr/device/rocm/rocsignal.hpp

@@ -22,7 +22,7 @@
 
 #include "device/devsignal.hpp"
 
-#include <hsa.h>
+#include "hsa/hsa.h"
 
 namespace roc {
 
@@ -44,4 +44,4 @@ public:
   }
 };
 
-};
+};

projects/clr/rocclr/device/rocm/rocvirtual.cpp

@@ -33,8 +33,8 @@
 #include "platform/sampler.hpp"
 #include "utils/debug.hpp"
 #include "os/os.hpp"
-#include "amd_hsa_kernel_code.h"
-#include "amd_hsa_queue.h"
+#include "hsa/amd_hsa_kernel_code.h"
+#include "hsa/amd_hsa_queue.h"
 
 #include <fstream>
 #include <limits>

projects/clr/rocclr/device/rocm/rocvirtual.hpp

@@ -24,11 +24,11 @@
 #include "rocdefs.hpp"
 #include "rocdevice.hpp"
 #include "utils/util.hpp"
-#include "hsa.h"
-#include "hsa_ext_image.h"
-#include "hsa_ext_amd.h"
+#include "hsa/hsa.h"
+#include "hsa/hsa_ext_image.h"
+#include "hsa/hsa_ext_amd.h"
 #include "rocprintf.hpp"
-#include "hsa_ven_amd_aqlprofile.h"
+#include "hsa/hsa_ven_amd_aqlprofile.h"
 #include "rocsched.hpp"
 
 namespace roc {