Initial GFX1201 changes.

Add target gfx1201 to several files.

Change-Id: I5cae7dba00ed58f8fbfa6e7147275bd7d5feaed0
Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>


[ROCm/ROCR-Runtime commit: 24463635f9]

projects/rocr-runtime/rocrtst/suites/test_common/CMakeLists.txt

@@ -85,7 +85,7 @@ set (CPACK_RPM_PACKAGE_REQUIRES "rocm-core,hsa-rocr")
 set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810"
                     "gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942"
                     "gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
-                    "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1200")
+                    "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1200;gfx1201")
 
 #
 # Currently support for Windows platform is not present

projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp

@@ -350,6 +350,7 @@ constexpr size_t hsa_name_size = 63;
   ISAREG_ENTRY_GEN("gfx1150",                11, 5, 0, unsupported, unsupported, 32)
   ISAREG_ENTRY_GEN("gfx1151",                11, 5, 1, unsupported, unsupported, 32)
   ISAREG_ENTRY_GEN("gfx1200",                12, 0, 0, unsupported, unsupported, 32)
+  ISAREG_ENTRY_GEN("gfx1201",                12, 0, 1, unsupported, unsupported, 32)
 #undef ISAREG_ENTRY_GEN
   return supported_isas;
 }

projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp

@@ -106,6 +106,7 @@ extern uint8_t ocl_blit_object_gfx1103[];
 extern uint8_t ocl_blit_object_gfx1150[];
 extern uint8_t ocl_blit_object_gfx1151[];
 extern uint8_t ocl_blit_object_gfx1200[];
+extern uint8_t ocl_blit_object_gfx1201[];
 
 // Arguments inserted by OCL compiler, all zero here.
 struct OCLHiddenArgs {
@@ -1055,6 +1056,8 @@ hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name,
     *blit_code_object = ocl_blit_object_gfx1151;
   } else if (sname == "gfx1200") {
     *blit_code_object = ocl_blit_object_gfx1200;
+  } else if (sname == "gfx1201") {
+    *blit_code_object = ocl_blit_object_gfx1201;
   } else {
     return HSA_STATUS_ERROR_INVALID_ISA_NAME;
   }

projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/CMakeLists.txt

@@ -50,7 +50,7 @@ if (NOT DEFINED TARGET_DEVICES)
   set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810"
                       "gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942"
                       "gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
-                      "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1200")
+                      "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1200;gfx1201")
 endif()
 set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE )
 

projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp

@@ -609,6 +609,7 @@ namespace code {
       case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC: MI.Name = "gfx10-3-generic"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
       case ELF::EF_AMDGPU_MACH_AMDGCN_GFX11_GENERIC:   MI.Name = "gfx11-generic";   MI.XnackSupported = false; MI.SrameccSupported = false; break;
       case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200: MI.Name = "gfx1200"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
+      case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201: MI.Name = "gfx1201"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
       default: return false;
       }
       return true;