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rocr: Fix compile warning when using clang

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This commit is contained in:
David Yat Sin
2025-05-28 21:06:59 +00:00
zatwierdzone przez Yat Sin, David
rodzic 77b86ca908
commit 96d0f07b15
10 zmienionych plików z 34 dodań i 36 usunięć
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libhsakmt/src/hsakmtmodel.c
+3 -3
Wyświetl plik
@@ -99,7 +99,7 @@ HSAKMT_STATUS HSAKMTAPI hsaKmtModelEnabled(bool* enable)
return HSAKMT_STATUS_SUCCESS;
}
void model_init_env_vars()
void model_init_env_vars(void)
{
/* Check whether to use a model instead of real hardware */
hsakmt_model_topology = getenv("HSA_MODEL_TOPOLOGY");
@@ -262,7 +262,7 @@ static void model_set_event(void *data, unsigned event_id)
pthread_cond_broadcast(&model_event_condvar);
}
void model_init()
void model_init(void)
{
if (!hsakmt_use_model)
return;
@@ -637,7 +637,7 @@ static int model_kfd_ioctl_locked(unsigned long request, void *arg)
{
unsigned slot = events[i].event_id - 1;
struct model_event *event = &model_events[slot];
bool this_ready;
bool this_ready = false;
if (event->event_type == HSA_EVENTTYPE_SIGNAL)
{
uint64_t current_age = event->value;
rocrtst/suites/functional/cu_masking.cc
+1 -1
Wyświetl plik
@@ -174,7 +174,7 @@ void CU_Masking::Run() {
auto dispatch = [&]() {
memset(args->hw_ids, 0, sizeof(uint32_t)*threads);
Aql pkt = {0};
Aql pkt = { };
pkt.header.type = HSA_PACKET_TYPE_KERNEL_DISPATCH;
pkt.header.acquire = HSA_FENCE_SCOPE_SYSTEM;
pkt.header.release = HSA_FENCE_SCOPE_SYSTEM;
runtime/hsa-runtime/core/inc/amd_gpu_agent.h
+6 -6
Wyświetl plik
@@ -555,13 +555,13 @@ class GpuAgent : public GpuAgentInt {
hsa_status_t PcSamplingIterateConfig(hsa_ven_amd_pcs_iterate_configuration_callback_t cb,
void* cb_data) override;
hsa_status_t PcSamplingCreate(pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingCreate(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingCreateFromId(HsaPcSamplingTraceId pcsId,
pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingDestroy(pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingStart(pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingStop(pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingFlush(pcs::PcsRuntime::PcSamplingSession& session);
pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingDestroy(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingStart(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingStop(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingFlush(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingFlushDeviceBuffers(pcs::PcsRuntime::PcSamplingSession& session);
// @brief Node properties.
runtime/hsa-runtime/core/inc/runtime.h
+1
Wyświetl plik
@@ -91,6 +91,7 @@
#define HSA_ARGUMENT_ALIGN_BYTES 16
#define HSA_QUEUE_ALIGN_BYTES 64
#define HSA_PACKET_ALIGN_BYTES 64
#define HSA_MAX_DEP_SIGNALS 5
//Avoids include
namespace rocr {
runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp
-2
Wyświetl plik
@@ -98,8 +98,6 @@ AqlQueue::AqlQueue(core::SharedQueue* shared_queue, GpuAgent* agent, size_t req_
priority_(HSA_QUEUE_PRIORITY_NORMAL),
exception_signal_(nullptr) {
const core::Isa* isa = agent_->supported_isas()[0];
// Queue size is a function of several restrictions.
const uint32_t min_pkts = ComputeRingBufferMinPkts();
const uint32_t max_pkts = ComputeRingBufferMaxPkts();
runtime/hsa-runtime/core/runtime/amd_blit_kernel.cpp
+1 -2
Wyświetl plik
@@ -52,7 +52,6 @@
namespace rocr {
namespace AMD {
static const uint16_t kInvalidPacketHeader = HSA_PACKET_TYPE_INVALID;
static std::string& kBlitKernelSource() {
static std::string kBlitKernelSource_(R"(
@@ -862,7 +861,7 @@ void BlitKernel::PopulateQueue(uint64_t index, uint64_t code_handle, void* args,
hsa_signal_t completion_signal) {
assert(IsMultipleOf(args, 16));
hsa_kernel_dispatch_packet_t packet = {0};
hsa_kernel_dispatch_packet_t packet = { };
static const uint16_t kDispatchPacketHeader =
(HSA_PACKET_TYPE_KERNEL_DISPATCH << HSA_PACKET_HEADER_TYPE) |
runtime/hsa-runtime/core/runtime/amd_blit_sdma.cpp
+1 -1
Wyświetl plik
@@ -287,7 +287,7 @@ hsa_status_t BlitSdma<RingIndexTy, HwIndexMonotonic, SizeToCountOffset, useGCR>:
uint32_t num_poll_command = 0;
// Cached copy of dep_signals[i]->LoadRelaxed
uint64_t dep_signals_value[dep_signals.size()];
uint64_t dep_signals_value[HSA_MAX_DEP_SIGNALS];
for (size_t i = 0; i < dep_signals.size(); ++i) {
// The signal is 64 bit value, and poll checks for 32 bit value.
runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp
+1 -1
Wyświetl plik
@@ -800,7 +800,7 @@ void GpuAgent::InitDma() {
// Dedicated compute queue for PC Sampling CP-DMA commands. We need a dedicated queue that runs at
// highest priority because we do not want the CP-DMA commands to be delayed/blocked due to
// other dispatches/barriers that could be in the other AQL queues.
queues_[QueuePCSampling].reset([queue_lambda, this]() { return queue_lambda(HSA_QUEUE_PRIORITY_MAXIMUM); });
queues_[QueuePCSampling].reset([queue_lambda]() { return queue_lambda(HSA_QUEUE_PRIORITY_MAXIMUM); });
// Decide which engine to use for blits.
auto blit_lambda = [this](bool use_xgmi, lazy_ptr<core::Queue>& queue, bool isHostToDev, uint32_t rec_eng) {
runtime/hsa-runtime/image/blit_kernel.cpp
+4 -4
Wyświetl plik
@@ -261,7 +261,7 @@ hsa_status_t BlitKernel::CopyBufferToImage(
assert(dst_image_view != NULL);
hsa_kernel_dispatch_packet_t packet = {0};
hsa_kernel_dispatch_packet_t packet = { };
const BlitCodeInfo& blit_code =
blit_code_catalog.at(KERNEL_OP_COPY_BUFFER_TO_IMAGE);
@@ -369,7 +369,7 @@ hsa_status_t BlitKernel::CopyImageToBuffer(
assert(src_image_view != NULL);
hsa_kernel_dispatch_packet_t packet = {0};
hsa_kernel_dispatch_packet_t packet = { };
const BlitCodeInfo& blit_code =
blit_code_catalog.at(KERNEL_OP_COPY_IMAGE_TO_BUFFER);
@@ -496,7 +496,7 @@ hsa_status_t BlitKernel::CopyImage(
blit_code = &blit_code_catalog.at(copy_type);
}
hsa_kernel_dispatch_packet_t packet = {0};
hsa_kernel_dispatch_packet_t packet = { };
packet.kernel_object = blit_code->code_handle_;
packet.group_segment_size = blit_code->group_segment_size_;
@@ -555,7 +555,7 @@ hsa_status_t BlitKernel::FillImage(
BlitQueue& blit_queue, const std::vector<BlitCodeInfo>& blit_code_catalog,
const Image& image, const void* pattern,
const hsa_ext_image_region_t& region) {
hsa_kernel_dispatch_packet_t packet = {0};
hsa_kernel_dispatch_packet_t packet = { };
const BlitCodeInfo& blit_code =
(image.desc.geometry != HSA_EXT_IMAGE_GEOMETRY_1DB)
runtime/hsa-runtime/image/image_manager_gfx12.cpp
+16 -16
Wyświetl plik
@@ -62,24 +62,24 @@
namespace rocr {
namespace image {
static_assert(sizeof(SQ_BUF_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD3) == sizeof(uint32_t));
static_assert(sizeof(SQ_BUF_RSRC_WORD0) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_BUF_RSRC_WORD1) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_BUF_RSRC_WORD2) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_BUF_RSRC_WORD3) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_RSRC_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD3) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD4) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD5) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD6) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD7) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_RSRC_WORD0) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_RSRC_WORD1) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_RSRC_WORD2) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_RSRC_WORD3) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_RSRC_WORD4) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_RSRC_WORD5) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_RSRC_WORD6) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_RSRC_WORD7) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_SAMP_WORD0) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD1) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD2) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD3) == sizeof(uint32_t));
static_assert(sizeof(SQ_IMG_SAMP_WORD0) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_SAMP_WORD1) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_SAMP_WORD2) == sizeof(uint32_t), "struct size is invalid");
static_assert(sizeof(SQ_IMG_SAMP_WORD3) == sizeof(uint32_t), "struct size is invalid");
//-----------------------------------------------------------------------------
// Workaround switch to combined format/type codes and missing gfx11