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SWDEV-332522 - streamOpsWrite & streamOpsWait to accept memory offset

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Change-Id: I4b6ecb4d80c093d038d86616a637c4bb465ae24e


[ROCm/clr commit: d2f837d25f]
Este commit está contenido en:
Ajay
2022-04-22 00:28:59 +00:00
cometido por Ajay GunaShekar
padre eccf328c14
commit 9fcc7a7219
Se han modificado 3 ficheros con 14 adiciones y 13 borrados
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projects/clr/rocclr/device/rocm/rocblit.cpp
+7 -7
Ver fichero
@@ -2461,7 +2461,7 @@ bool KernelBlitManager::fillImage(device::Memory& memory, const void* pattern,
// ================================================================================================
bool KernelBlitManager::streamOpsWrite(device::Memory& memory, uint64_t value,
size_t sizeBytes) const {
size_t offset, size_t sizeBytes) const {
amd::ScopedLock k(lockXferOps_);
bool result = false;
uint blitType = StreamOpsWrite;
@@ -2474,12 +2474,12 @@ bool KernelBlitManager::streamOpsWrite(device::Memory& memory, uint64_t value,
bool is32BitWrite = (sizeBytes == sizeof(uint32_t)) ? true : false;
// Program kernels arguments for the write operation
if (is32BitWrite) {
setArgument(kernels_[blitType], 0, sizeof(cl_mem), &mem);
setArgument(kernels_[blitType], 0, sizeof(cl_mem), &mem, offset);
setArgument(kernels_[blitType], 1, sizeof(cl_mem), nullptr);
setArgument(kernels_[blitType], 2, sizeof(uint32_t), &value);
} else {
setArgument(kernels_[blitType], 0, sizeof(cl_mem), nullptr);
setArgument(kernels_[blitType], 1, sizeof(cl_mem), &mem);
setArgument(kernels_[blitType], 1, sizeof(cl_mem), &mem, offset);
setArgument(kernels_[blitType], 2, sizeof(uint64_t), &value);
}
setArgument(kernels_[blitType], 3, sizeof(size_t), &sizeBytes);
@@ -2494,8 +2494,8 @@ bool KernelBlitManager::streamOpsWrite(device::Memory& memory, uint64_t value,
}
// ================================================================================================
bool KernelBlitManager::streamOpsWait(device::Memory& memory, uint64_t value, size_t sizeBytes,
uint64_t flags, uint64_t mask) const {
bool KernelBlitManager::streamOpsWait(device::Memory& memory, uint64_t value, size_t offset,
size_t sizeBytes, uint64_t flags, uint64_t mask) const {
amd::ScopedLock k(lockXferOps_);
bool result = false;
uint blitType = StreamOpsWait;
@@ -2510,14 +2510,14 @@ bool KernelBlitManager::streamOpsWait(device::Memory& memory, uint64_t value, si
bool is32BitWait = (sizeBytes == sizeof(uint32_t)) ? true : false;
// Program kernels arguments for the wait operation
if (is32BitWait) {
setArgument(kernels_[blitType], 0, sizeof(cl_mem), &mem);
setArgument(kernels_[blitType], 0, sizeof(cl_mem), &mem, offset);
setArgument(kernels_[blitType], 1, sizeof(cl_mem), nullptr);
setArgument(kernels_[blitType], 2, sizeof(uint32_t), &value);
setArgument(kernels_[blitType], 3, sizeof(uint32_t), &flags);
setArgument(kernels_[blitType], 4, sizeof(uint32_t), &mask);
} else {
setArgument(kernels_[blitType], 0, sizeof(cl_mem), nullptr);
setArgument(kernels_[blitType], 1, sizeof(cl_mem), &mem);
setArgument(kernels_[blitType], 1, sizeof(cl_mem), &mem, offset);
setArgument(kernels_[blitType], 2, sizeof(uint64_t), &value);
setArgument(kernels_[blitType], 3, sizeof(uint64_t), &flags);
setArgument(kernels_[blitType], 4, sizeof(uint64_t), &mask);
projects/clr/rocclr/device/rocm/rocblit.hpp
+4 -2
Ver fichero
@@ -429,12 +429,14 @@ class KernelBlitManager : public DmaBlitManager {
//! Stream memory write operation - Write a 'value' at 'memory'.
bool streamOpsWrite(device::Memory& memory, //!< Memory to write the 'value'
uint64_t value,
size_t offset,
size_t sizeBytes
) const;
//! Stream memory ops- Waits for a 'value' at 'memory' and wait is released based on compare op.
bool streamOpsWait(device::Memory& memory, //!< Memory contents to compare the 'value' against
uint64_t value,
size_t offset,
size_t sizeBytes,
uint64_t flags,
uint64_t mask
@@ -483,7 +485,7 @@ class KernelBlitManager : public DmaBlitManager {
void releaseArguments(address args) const;
inline void setArgument(amd::Kernel* kernel, size_t index,
size_t size, const void* value, uint32_t offset = 0,
size_t size, const void* value, size_t offset = 0,
const device::Memory* dev_mem = nullptr) const;
uint32_t ConstantBufferOffset() const {
@@ -528,7 +530,7 @@ static const char* BlitName[KernelBlitManager::BlitTotal] = {
};
inline void KernelBlitManager::setArgument(amd::Kernel* kernel, size_t index,
size_t size, const void* value, uint32_t offset,
size_t size, const void* value, size_t offset,
const device::Memory* dev_mem) const {
const amd::KernelParameterDescriptor& desc = kernel->signature().at(index);
projects/clr/rocclr/device/rocm/rocvirtual.cpp
+3 -4
Ver fichero
@@ -2394,8 +2394,8 @@ void VirtualGPU::submitStreamOperation(amd::StreamOperationCommand& cmd) {
else {
// mask is applied on value before performing
// the comparision defined by 'condition'
bool result = static_cast<KernelBlitManager&>(blitMgr()).streamOpsWait(*memory, value,
sizeBytes, flags, mask);
bool result = static_cast<KernelBlitManager&>(blitMgr()).streamOpsWait(*memory, value, offset,
sizeBytes, flags, mask);
ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Waiting for value: 0x%lx."
" Flags: 0x%lx mask: 0x%lx", value, flags, mask);
if (!result) {
@@ -2405,12 +2405,11 @@ void VirtualGPU::submitStreamOperation(amd::StreamOperationCommand& cmd) {
} else if (type == ROCCLR_COMMAND_STREAM_WRITE_VALUE) {
amd::Coord3D origin(offset);
amd::Coord3D size(sizeBytes);
// Ensure memory ordering preceding the write
dispatchBarrierPacket(kBarrierPacketReleaseHeader);
bool result = static_cast<KernelBlitManager&>(blitMgr()).streamOpsWrite(*memory, value,
sizeBytes);
offset, sizeBytes);
ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Writing value: 0x%lx", value);
if (!result) {
LogError("submitStreamOperation: Write failed!");