kfdtest: Move KFDCWSRTest shaders to ShaderStore
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7c89fca94e92145a4115d1089348380807a868ee
[ROCm/ROCR-Runtime commit: ad5f98814f]
Αυτή η υποβολή περιλαμβάνεται σε:
υποβλήθηκε από
Harish Kasiviswanathan
γονέας
ea451d26fd
υποβολή
a4b42c2213
@@ -24,72 +24,6 @@
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#include "KFDCWSRTest.hpp"
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#include "Dispatch.hpp"
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/* Initial state:
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* s[0:1] - 64 bits iteration number; only the lower 32 bits are useful.
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* s[2:3] - result buffer base address
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* s4 - workgroup id
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* v0 - workitem id, always 0 because
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* NUM_THREADS_X(number of threads) in workgroup set to 1
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* Registers:
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* v0 - calculated workitem = v0 + s4 * NUM_THREADS_X, which is s4
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* v2 - = s0, 32 bits iteration number
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* v[4:5] - corresponding output buf address: s[2:3] + v0 * 4
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* v6 - counter
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*/
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static const char* IterateIsa_gfx8 = R"(
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.text
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// Copy the parameters from scalar registers to vector registers
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v_mov_b32 v2, s0 // v[2:3] = s[0:1]
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v_mov_b32 v3, s1 // v[2:3] = s[0:1]
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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v_add_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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v_add_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP:
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v_add_u32 v6, vcc, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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v_cmp_lt_u32 vcc, v6, v2
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s_cbranch_vccnz LOOP
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flat_store_dword v[4:5], v6
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s_waitcnt vmcnt(0) & lgkmcnt(0)
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s_endpgm
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)";
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// This shader can be used by gfx9 and gfx10
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static const char* IterateIsa_gfx9 = R"(
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.text
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// Copy the parameters from scalar registers to vector registers
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v_mov_b32 v2, s0 // v[2:3] = s[0:1]
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v_mov_b32 v3, s1 // v[2:3] = s[0:1]
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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v_add_co_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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v_add_co_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP:
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v_add_co_u32 v6, vcc, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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v_cmp_lt_u32 vcc, v6, v2
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s_cbranch_vccnz LOOP
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flat_store_dword v[4:5], v6
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s_waitcnt vmcnt(0) & lgkmcnt(0)
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s_endpgm
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)";
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static const char* InfiniteIsa = R"(
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.text
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LOOP:
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s_branch LOOP
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s_endpgm
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)";
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void KFDCWSRTest::SetUp() {
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ROUTINE_START
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@@ -137,16 +71,10 @@ TEST_F(KFDCWSRTest, BasicTest) {
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int defaultGPUNode = m_NodeInfo.HsaDefaultGPUNode();
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if ((m_FamilyId >= FAMILY_VI) && (checkCWSREnabled())) {
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const char *pIterateIsa;
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HsaMemoryBuffer isaBuffer(PAGE_SIZE, defaultGPUNode, true/*zero*/, false/*local*/, true/*exec*/);
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HsaMemoryBuffer resultBuf1(PAGE_SIZE, defaultGPUNode, true, false, false);
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uint64_t count1 = 400000000;
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if (m_FamilyId < FAMILY_AI)
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pIterateIsa = IterateIsa_gfx8;
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else
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pIterateIsa = IterateIsa_gfx9;
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if (isOnEmulator()) {
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// Divide the iterator times by 10000 so that the test can
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// finish in a reasonable time.
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@@ -156,7 +84,7 @@ TEST_F(KFDCWSRTest, BasicTest) {
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unsigned int* result1 = resultBuf1.As<unsigned int*>();
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ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(pIterateIsa, isaBuffer.As<char*>()));
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ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(IterateIsa, isaBuffer.As<char*>()));
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PM4Queue queue1;
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@@ -220,7 +148,7 @@ TEST_F(KFDCWSRTest, InterruptRestore) {
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if ((m_FamilyId >= FAMILY_VI) && (checkCWSREnabled())) {
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HsaMemoryBuffer isaBuffer(PAGE_SIZE, defaultGPUNode, true/*zero*/, false/*local*/, true/*exec*/);
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ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(InfiniteIsa, isaBuffer.As<char*>()));
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ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(InfiniteLoopIsa, isaBuffer.As<char*>()));
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PM4Queue queue1, queue2, queue3;
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@@ -386,3 +386,55 @@ const char *LoopIsa = R"(
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END_OF_PGM:
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s_endpgm
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)";
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/**
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* KFDCWSRTest
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*/
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/* Initial state:
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* s[0:1] - 64 bits iteration number; only the lower 32 bits are useful.
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* s[2:3] - result buffer base address
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* s4 - workgroup id
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* v0 - workitem id, always 0 because
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* NUM_THREADS_X(number of threads) in workgroup set to 1
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* Registers:
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* v0 - calculated workitem = v0 + s4 * NUM_THREADS_X, which is s4
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* v2 - = s0, 32 bits iteration number
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* v[4:5] - corresponding output buf address: s[2:3] + v0 * 4
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* v6 - counter
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*/
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const char *IterateIsa = R"(
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.text
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// Copy the parameters from scalar registers to vector registers
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v_mov_b32 v2, s0 // v[2:3] = s[0:1]
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v_mov_b32 v3, s1 // v[2:3] = s[0:1]
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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.if (.amdgcn.gfx_generation_number >= 9)
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v_add_co_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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v_add_co_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP:
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v_add_co_u32 v6, vcc, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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v_cmp_lt_u32 vcc, v6, v2
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s_cbranch_vccnz LOOP
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.else
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v_add_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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v_add_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP_GFX8:
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v_add_u32 v6, vcc, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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v_cmp_lt_u32 vcc, v6, v2
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s_cbranch_vccnz LOOP_GFX8
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.endif
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flat_store_dword v[4:5], v6
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s_waitcnt vmcnt(0) & lgkmcnt(0)
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s_endpgm
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)";
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@@ -42,4 +42,7 @@ extern const char *WriteAndSignalIsa;
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/* KFDQMTest */
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extern const char *LoopIsa;
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/* KFDCWSRTest */
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extern const char *IterateIsa;
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#endif // _SHADERSTORE_H_
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