kfdtest: Move KFDCWSRTest shaders to ShaderStore

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7c89fca94e92145a4115d1089348380807a868ee


[ROCm/ROCR-Runtime commit: ad5f98814f]
Αυτή η υποβολή περιλαμβάνεται σε:
Graham Sider
2021-11-02 13:54:54 -04:00
υποβλήθηκε από Harish Kasiviswanathan
γονέας ea451d26fd
υποβολή a4b42c2213
3 αρχεία άλλαξαν με 57 προσθήκες και 74 διαγραφές
@@ -24,72 +24,6 @@
#include "KFDCWSRTest.hpp"
#include "Dispatch.hpp"
/* Initial state:
* s[0:1] - 64 bits iteration number; only the lower 32 bits are useful.
* s[2:3] - result buffer base address
* s4 - workgroup id
* v0 - workitem id, always 0 because
* NUM_THREADS_X(number of threads) in workgroup set to 1
* Registers:
* v0 - calculated workitem = v0 + s4 * NUM_THREADS_X, which is s4
* v2 - = s0, 32 bits iteration number
* v[4:5] - corresponding output buf address: s[2:3] + v0 * 4
* v6 - counter
*/
static const char* IterateIsa_gfx8 = R"(
.text
// Copy the parameters from scalar registers to vector registers
v_mov_b32 v2, s0 // v[2:3] = s[0:1]
v_mov_b32 v3, s1 // v[2:3] = s[0:1]
v_mov_b32 v0, s4 // use workgroup id as index
v_lshlrev_b32 v0, 2, v0 // v0 *= 4
v_add_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
v_add_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
v_mov_b32 v6, 0
LOOP:
v_add_u32 v6, vcc, 1, v6
// Compare the result value (v6) to iteration value (v2), and
// jump if equal (i.e. if VCC is not zero after the comparison)
v_cmp_lt_u32 vcc, v6, v2
s_cbranch_vccnz LOOP
flat_store_dword v[4:5], v6
s_waitcnt vmcnt(0) & lgkmcnt(0)
s_endpgm
)";
// This shader can be used by gfx9 and gfx10
static const char* IterateIsa_gfx9 = R"(
.text
// Copy the parameters from scalar registers to vector registers
v_mov_b32 v2, s0 // v[2:3] = s[0:1]
v_mov_b32 v3, s1 // v[2:3] = s[0:1]
v_mov_b32 v0, s4 // use workgroup id as index
v_lshlrev_b32 v0, 2, v0 // v0 *= 4
v_add_co_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
v_add_co_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
v_mov_b32 v6, 0
LOOP:
v_add_co_u32 v6, vcc, 1, v6
// Compare the result value (v6) to iteration value (v2), and
// jump if equal (i.e. if VCC is not zero after the comparison)
v_cmp_lt_u32 vcc, v6, v2
s_cbranch_vccnz LOOP
flat_store_dword v[4:5], v6
s_waitcnt vmcnt(0) & lgkmcnt(0)
s_endpgm
)";
static const char* InfiniteIsa = R"(
.text
LOOP:
s_branch LOOP
s_endpgm
)";
void KFDCWSRTest::SetUp() {
ROUTINE_START
@@ -137,16 +71,10 @@ TEST_F(KFDCWSRTest, BasicTest) {
int defaultGPUNode = m_NodeInfo.HsaDefaultGPUNode();
if ((m_FamilyId >= FAMILY_VI) && (checkCWSREnabled())) {
const char *pIterateIsa;
HsaMemoryBuffer isaBuffer(PAGE_SIZE, defaultGPUNode, true/*zero*/, false/*local*/, true/*exec*/);
HsaMemoryBuffer resultBuf1(PAGE_SIZE, defaultGPUNode, true, false, false);
uint64_t count1 = 400000000;
if (m_FamilyId < FAMILY_AI)
pIterateIsa = IterateIsa_gfx8;
else
pIterateIsa = IterateIsa_gfx9;
if (isOnEmulator()) {
// Divide the iterator times by 10000 so that the test can
// finish in a reasonable time.
@@ -156,7 +84,7 @@ TEST_F(KFDCWSRTest, BasicTest) {
unsigned int* result1 = resultBuf1.As<unsigned int*>();
ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(pIterateIsa, isaBuffer.As<char*>()));
ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(IterateIsa, isaBuffer.As<char*>()));
PM4Queue queue1;
@@ -220,7 +148,7 @@ TEST_F(KFDCWSRTest, InterruptRestore) {
if ((m_FamilyId >= FAMILY_VI) && (checkCWSREnabled())) {
HsaMemoryBuffer isaBuffer(PAGE_SIZE, defaultGPUNode, true/*zero*/, false/*local*/, true/*exec*/);
ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(InfiniteIsa, isaBuffer.As<char*>()));
ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(InfiniteLoopIsa, isaBuffer.As<char*>()));
PM4Queue queue1, queue2, queue3;
@@ -386,3 +386,55 @@ const char *LoopIsa = R"(
END_OF_PGM:
s_endpgm
)";
/**
* KFDCWSRTest
*/
/* Initial state:
* s[0:1] - 64 bits iteration number; only the lower 32 bits are useful.
* s[2:3] - result buffer base address
* s4 - workgroup id
* v0 - workitem id, always 0 because
* NUM_THREADS_X(number of threads) in workgroup set to 1
* Registers:
* v0 - calculated workitem = v0 + s4 * NUM_THREADS_X, which is s4
* v2 - = s0, 32 bits iteration number
* v[4:5] - corresponding output buf address: s[2:3] + v0 * 4
* v6 - counter
*/
const char *IterateIsa = R"(
.text
// Copy the parameters from scalar registers to vector registers
v_mov_b32 v2, s0 // v[2:3] = s[0:1]
v_mov_b32 v3, s1 // v[2:3] = s[0:1]
v_mov_b32 v0, s4 // use workgroup id as index
v_lshlrev_b32 v0, 2, v0 // v0 *= 4
.if (.amdgcn.gfx_generation_number >= 9)
v_add_co_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
v_add_co_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
v_mov_b32 v6, 0
LOOP:
v_add_co_u32 v6, vcc, 1, v6
// Compare the result value (v6) to iteration value (v2), and
// jump if equal (i.e. if VCC is not zero after the comparison)
v_cmp_lt_u32 vcc, v6, v2
s_cbranch_vccnz LOOP
.else
v_add_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
v_add_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
v_mov_b32 v6, 0
LOOP_GFX8:
v_add_u32 v6, vcc, 1, v6
// Compare the result value (v6) to iteration value (v2), and
// jump if equal (i.e. if VCC is not zero after the comparison)
v_cmp_lt_u32 vcc, v6, v2
s_cbranch_vccnz LOOP_GFX8
.endif
flat_store_dword v[4:5], v6
s_waitcnt vmcnt(0) & lgkmcnt(0)
s_endpgm
)";
@@ -42,4 +42,7 @@ extern const char *WriteAndSignalIsa;
/* KFDQMTest */
extern const char *LoopIsa;
/* KFDCWSRTest */
extern const char *IterateIsa;
#endif // _SHADERSTORE_H_