SWDEV-301667 - Add a flag for gpuvm kernargs

HIP_FORCE_DEV_KERNARG=1 will create a device allocation for kernel arg
segment. Flag is 0 by default.

Change-Id: Iaaf5a149f3be8596568878d5d272268baf067c60


[ROCm/clr commit: 5436d362b1]

projects/clr/rocclr/device/rocm/rocdevice.cpp

@@ -175,6 +175,7 @@ Device::Device(hsa_agent_t bkendDevice)
   gpuvm_segment_.handle = 0;
   gpu_fine_grained_segment_.handle = 0;
   prefetch_signal_.handle = 0;
+  isXgmi_ = false;
   cache_state_ = Device::CacheState::kCacheStateInvalid;
 }
 
@@ -192,14 +193,20 @@ void Device::setupCpuAgent() {
       }
     }
   }
+  std::vector<amd::Device::LinkAttrType> link_attrs;
+  link_attrs.push_back(std::make_pair(LinkAttribute::kLinkLinkType, 0));
+  if (findLinkInfo(cpu_agents_[0].fine_grain_pool, &link_attrs)) {
+    isXgmi_ = (link_attrs[0].second == HSA_AMD_LINK_INFO_TYPE_XGMI);
+  }
+
   preferred_numa_node_ = index;
   cpu_agent_ = cpu_agents_[index].agent;
   system_segment_ = cpu_agents_[index].fine_grain_pool;
   system_coarse_segment_ = cpu_agents_[index].coarse_grain_pool;
   system_kernarg_segment_ = cpu_agents_[index].kern_arg_pool;
   ClPrint(amd::LOG_INFO, amd::LOG_INIT, "Numa selects cpu agent[%zu]=0x%zx(fine=0x%zx,"
-          "coarse=0x%zx) for gpu agent=0x%zx", index, cpu_agent_.handle,
-          system_segment_.handle, system_coarse_segment_.handle, bkendDevice_.handle);
+          "coarse=0x%zx) for gpu agent=0x%zx CPU<->GPU XGMI=%d", index, cpu_agent_.handle,
+          system_segment_.handle, system_coarse_segment_.handle, bkendDevice_.handle, isXgmi_);
 }
 
 void Device::checkAtomicSupport() {

projects/clr/rocclr/device/rocm/rocdevice.hpp

@@ -554,6 +554,7 @@ class Device : public NullDevice {
 
   uint32_t fetchSDMAMask(const device::BlitManager* handle, bool readEngine = true) const;
   void resetSDMAMask(const device::BlitManager* handle) const ;
+  bool isXgmi() const { return isXgmi_; }
 
  private:
   bool create();
@@ -628,6 +629,7 @@ class Device : public NullDevice {
   uint32_t maxSdmaWriteMask_;
   //! Map of SDMA engineId<->stream
   mutable std::map<uint32_t, const device::BlitManager*> engineAssignMap_;
+  bool isXgmi_; //!< Flag to indicate if there is XGMI between CPU<->GPU
 
  public:
   std::atomic<uint> numOfVgpus_;  //!< Virtual gpu unique index

projects/clr/rocclr/device/rocm/rocvirtual.cpp

@@ -1315,8 +1315,12 @@ bool VirtualGPU::initPool(size_t kernarg_pool_size) {
   kernarg_pool_size_ = kernarg_pool_size;
   kernarg_pool_chunk_end_ = kernarg_pool_size_ / KernelArgPoolNumSignal;
   active_chunk_ = 0;
-  kernarg_pool_base_ = reinterpret_cast<address>(roc_device_.hostAlloc(kernarg_pool_size_, 0,
-                                                 Device::MemorySegment::kKernArg));
+  if (HIP_FORCE_DEV_KERNARG && roc_device_.info().largeBar_) {
+    kernarg_pool_base_ = reinterpret_cast<address>(roc_device_.deviceLocalAlloc(kernarg_pool_size_));
+  } else {
+    kernarg_pool_base_ = reinterpret_cast<address>(roc_device_.hostAlloc(kernarg_pool_size_, 0,
+                                                   Device::MemorySegment::kKernArg));
+  }
   if (kernarg_pool_base_ == nullptr) {
     return false;
   }

projects/clr/rocclr/utils/flags.hpp

@@ -284,6 +284,8 @@ release(bool, HIPRTC_USE_RUNTIME_UNBUNDLER, false,                            \
         "Set this to true to force runtime unbundler in hiprtc.")             \
 release(size_t, HIP_INITIAL_DM_SIZE, 8 * Mi,                                  \
         "Set initial heap size for device malloc.")                           \
+release(bool, HIP_FORCE_DEV_KERNARG, 0,                                       \
+         "Force device mem for kernel args")
 
 namespace amd {