Fix sibling map in CPU cache properties
Previous code only works for systems where shared_cpu_map lists 32 or less bits. Some systems list more than 32 bits and express them as XXXXXXXX,XXXXXXXX,.... This patch adds that calculation. Also increase MAX_CPU_CORES and MAX_CACHES to accommodate more advanced systems. Change-Id: Ia5c7041866456a6aa3b66f8f0f951022d7c51028
Αυτή η υποβολή περιλαμβάνεται σε:
Amber Lin
+126
-53
@@ -43,8 +43,8 @@
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#define KFD_SYSFS_PATH_GENERATION_ID "/sys/devices/virtual/kfd/kfd/topology/generation_id"
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#define KFD_SYSFS_PATH_SYSTEM_PROPERTIES "/sys/devices/virtual/kfd/kfd/topology/system_properties"
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#define KFD_SYSFS_PATH_NODES "/sys/devices/virtual/kfd/kfd/topology/nodes"
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#define MAX_CPU_CORES 32
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#define MAX_CACHES 128
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#define MAX_CPU_CORES 128
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#define MAX_CACHES 256
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typedef struct {
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uint32_t gpu_id;
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@@ -505,6 +505,119 @@ err1:
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return ret;
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}
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/* parse_sysfs_cache -
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* @sys_path - cache path in sysfs
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* @prop - [OUT] HSA cache property to fill up
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* @apicid - an array where contains each processor's apicid
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* Return - HSAKMT_STATUS_SUCCESS in success or an error number in failure
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*/
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static HSAKMT_STATUS
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parse_sysfs_cache(char *sys_path, HsaCacheProperties *prop, uint32_t *apicid)
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{
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char file[256], buf[256];
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int i, j, n, cpu;
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int last; /* the last valid entry in array, which is n-1 if n items */
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unsigned long map[32];
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char *token, *str;
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/* cache level */
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snprintf(file, 256, "%s/level", sys_path);
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read_file(file, buf, sizeof(buf));
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prop->CacheLevel = atoi(buf);
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/* cache size */
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snprintf(file, 256, "%s/size", sys_path);
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read_file(file, buf, sizeof(buf));
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prop->CacheSize = (atoi(buf));
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/* cache line size in bytes */
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snprintf(file, 256, "%s/coherency_line_size", sys_path);
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read_file(file, buf, sizeof(buf));
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prop->CacheLineSize = (atoi(buf));
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/* cache lines per tag */
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snprintf(file, 256, "%s/physical_line_partition", sys_path);
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read_file(file, buf, sizeof(buf));
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prop->CacheLinesPerTag = (atoi(buf));
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/* cache associativity */
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snprintf(file, 256, "%s/ways_of_associativity", sys_path);
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read_file(file, buf, sizeof(buf));
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prop->CacheAssociativity = (atoi(buf));
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/* cache type */
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prop->CacheType.ui32.CPU = 1;
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snprintf(file, 256, "%s/type", sys_path);
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read_file(file, buf, sizeof(buf));
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if (buf[0] == 'D')
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prop->CacheType.ui32.Data = 1;
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else if (buf[0] == 'I')
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prop->CacheType.ui32.Instruction = 1;
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/* sibling map */
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snprintf(file, 256, "%s/shared_cpu_map", sys_path);
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read_file(file, buf, sizeof(buf));
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/* Data in shared_cpu_map can be XXXXXXXX when the system doesn't have
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* more than 32 processors; it also can be XXXXXXXX,XXXXXXXX,XX .... to
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* represent more than 32 processors. We'll parse each XXXXXXXX and
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* store them into map[].
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* Say shared_cpu_map is "Nn-1,Nn-2,...,N2,N1,N0\n". Because strtok_r()
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* parses Nn-1 first, map[] will store data in a reversed order:
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* map[0]=Nn-1, map[1]=Nn-2, ... map[n-2]=N1, map[n-1]=N0
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*/
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str = (char *)&buf[0];
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for (last = 0; last < 32; last++) { /* declared map[32] */
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token = strtok_r(str, ",", &str);
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map[last] = strtol(token, NULL, 16);
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if (token[strlen(token)-1] == '\n') /* this is N0 */
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break;
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}
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if (last >= 32) {
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printf("Fail to parse shared_cpu_map. Increase map[].\n");
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return HSAKMT_STATUS_ERROR;
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}
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/* Lower processor ID doesn't always have lower apicid.
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* Search the lowest apicid for ProcIdLow
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*/
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prop->ProcessorIdLow = 0xffffffff;
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for (i = last; i >= 0; i--) { /* N0 is stored in map[count] */
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if (!map[i])
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continue;
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j = 32;
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while (j-- > 0) {
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if (map[i] & (1<<j)) {
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cpu = 32 * (last - i) + j;
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if (apicid[cpu] < prop->ProcessorIdLow)
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prop->ProcessorIdLow = apicid[cpu];
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}
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}
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}
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/* Now fill in SiblingMap using ProcIdLow as the offset */
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for (i = last; i >= 0; i--) {
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j = 32;
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while (j-- > 0) {
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if (map[i] & (1<<j)) {
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cpu = 32 * (last - i) + j;
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/* Use the lowest-process-id item as offset */
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n = apicid[cpu] - prop->ProcessorIdLow;
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/* Use array instead of bitmask so the software
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* is endian-worry free
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*/
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if (n < HSA_CPU_SIBLINGS)
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prop->SiblingMap[n] = 1;
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else {
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printf("Increase HSA_CPU_SIBLINGS.\n");
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return HSAKMT_STATUS_ERROR;
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}
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}
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}
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}
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return HSAKMT_STATUS_SUCCESS;
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}
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/* topology_get_cpu_cache_props - get CPU cache properties and fill in the
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* cache entry of the node's table
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* @tbl - the node table to fill up
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@@ -521,7 +634,6 @@ topology_get_cpu_cache_props(node_t *tbl)
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char path[256], buf[256], cache_paths[MAX_CACHES][256];
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int i, j, n;
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const char SYSDIR[] = "/sys/devices/system/cpu";
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unsigned long ul;
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if (tbl == NULL)
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return HSAKMT_STATUS_ERROR;
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@@ -544,11 +656,9 @@ topology_get_cpu_cache_props(node_t *tbl)
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}
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fclose(fd);
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/* Get cache data from /sys/devices/system/cpu/cpuX/cache/indexY
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* 1. Calculate how many caches
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* 2. Fill up cache properties
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*/
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/* Get cache data from /sys/devices/system/cpu/cpuX/cache/indexY */
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/* 1. Calculate how many caches */
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for (i=0; i<num_cpus; i++) {
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snprintf(path, 256, "%s/cpu%d/cache", SYSDIR, i);
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n = num_subdirs(path, "index");
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@@ -578,58 +688,21 @@ topology_get_cpu_cache_props(node_t *tbl)
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}
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}
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/* 2. Allocate number of caches for the table */
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tbl->node.NumCaches = num_caches;
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tbl->cache = calloc(tbl->node.NumCaches * sizeof(HsaCacheProperties), 1);
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if (!tbl->cache)
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return HSAKMT_STATUS_NO_MEMORY;
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/* 3. Fill up cache properties */
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for (i=0; i<num_caches; i++) {
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/* cache level */
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snprintf(path, 256, "%s/level", cache_paths[i]);
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read_file(path, buf, sizeof(buf));
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tbl->cache[i].CacheLevel = atoi(buf);
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/* cache size */
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snprintf(path, 256, "%s/size", cache_paths[i]);
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read_file(path, buf, sizeof(buf));
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tbl->cache[i].CacheSize = (atoi(buf));
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/* cache line size in bytes */
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snprintf(path, 256, "%s/coherency_line_size", cache_paths[i]);
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read_file(path, buf, sizeof(buf));
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tbl->cache[i].CacheLineSize = (atoi(buf));
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/* cache lines per tag */
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snprintf(path, 256, "%s/physical_line_partition", cache_paths[i]);
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read_file(path, buf, sizeof(buf));
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tbl->cache[i].CacheLinesPerTag = (atoi(buf));
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/* cache associativity */
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snprintf(path, 256, "%s/ways_of_associativity", cache_paths[i]);
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read_file(path, buf, sizeof(buf));
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tbl->cache[i].CacheAssociativity = (atoi(buf));
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/* cache type */
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tbl->cache[i].CacheType.ui32.CPU = 1;
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snprintf(path, 256, "%s/type", cache_paths[i]);
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read_file(path, buf, sizeof(buf));
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if (buf[0] == 'D')
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tbl->cache[i].CacheType.ui32.Data = 1;
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else if (buf[0] == 'I')
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tbl->cache[i].CacheType.ui32.Instruction = 1;
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/* sibling map */
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snprintf(path, 256, "%s/shared_cpu_map", cache_paths[i]);
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read_file(path, buf, sizeof(buf));
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ul = strtol(buf, NULL, 16);
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j = 0;
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while (!(ul & (1 << j)))
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j++; // the lowest processor id in shared map
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tbl->cache[i].ProcessorIdLow = apicid[j];
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j = num_cpus;
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while (j-- > 0) {
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if (ul & (1<<j)) {
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/* Use the lowest-process-id item as offset */
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n = apicid[j] - tbl->cache[i].ProcessorIdLow;
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/* Use array instead of bitmask so the software
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* is endian-worry free
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*/
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tbl->cache[i].SiblingMap[n] = 1;
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}
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ret = parse_sysfs_cache(cache_paths[i],
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&tbl->cache[i],
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&apicid[0]);
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if (ret != HSAKMT_STATUS_SUCCESS) {
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printf("Failed to parse cache properties.\n");
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free(tbl->cache);
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return ret;
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}
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}
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