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P4 to Git Change 1449513 by skudchad@skudchad_test_win_opencl2 on 2017/08/20 12:41:18

Browse Source 
SWDEV-107271 - Add Raven IDs.
	- Refactor PAL backend code

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/libUtils.cpp#6 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings.h#19 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_hsail.h#22 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_hsail64.h#22 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/common/linker.cpp#155 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/libUtils.cpp#26 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings.h#51 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail.h#47 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail64.h#42 edit
... //depot/stg/opencl/drivers/opencl/compiler/tools/driver/driver.cpp#66 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldefs.hpp#17 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.cpp#49 edit
... //depot/stg/opencl/drivers/opencl/tests/ocltst/module/math/OCLMathFunc.cpp#29 edit
... //depot/stg/opencl/drivers/opencl/tests/ocltst/module/runtime/OCLDeviceQueries.cpp#45 edit
... //depot/stg/opencl/drivers/opencl/tests/ocltst/module/runtime/OCLPerfCounters.cpp#39 edit
This commit is contained in:
foreman
2017-08-20 12:49:56 -04:00
parent aa2a61f18a
commit a643fcf3d1
7 changed files with 109 additions and 71 deletions
Download Patch File Download Diff File Expand all files Collapse all files
rocclr/runtime/device/pal/paldefs.hpp
+43 -25
View File
@@ -147,37 +147,55 @@ static const AMDDeviceInfo DeviceInfo[] = {
// The GfxIpDeviceInfo table must match with GfxIpLevel enum
// (located in //depot/stg/pal/inc/core/palDevice.h).
static const AMDDeviceInfo GfxIpDeviceInfo[] = {
/* Unknown */ {"unknown", "unknown", 4, 16, 1, 256, 64 * Ki, 32, 000},
/* GFX600 */ {"gfx600", "gfx600", 4, 16, 1, 256, 64 * Ki, 32, 600},
/* GFX700 */ {"gfx700", "gfx700", 4, 16, 1, 256, 64 * Ki, 32, 700},
/* GFX800 */ {"gfx800", "gfx800", 4, 16, 1, 256, 64 * Ki, 32, 800},
/* GFX801 */ {"gfx801", "gfx801", 4, 16, 1, 256, 64 * Ki, 32, 801},
/* GFX900 */ {"gfx900", "gfx900", 4, 16, 1, 256, 64 * Ki, 32, 900},
/* Unknown */ {"unknown", "unknown", 4, 16, 1, 256, 64 * Ki, 32, 000},
/* GFX600 */ {"gfx600", "gfx600", 4, 16, 1, 256, 64 * Ki, 32, 600},
/* GFX700 */ {"gfx700", "gfx700", 4, 16, 1, 256, 64 * Ki, 32, 700},
/* GFX800 */ {"gfx800", "gfx800", 4, 16, 1, 256, 64 * Ki, 32, 800},
/* GFX801 */ {"gfx801", "gfx801", 4, 16, 1, 256, 64 * Ki, 32, 801},
/* GFX900 */ {"gfx900", "gfx900", 4, 16, 1, 256, 64 * Ki, 32, 900},
};
static const AMDDeviceInfo Gfx901DeviceInfo =
/* GFX901 */ {"gfx901", "gfx901", 4, 16, 1, 256, 64 * Ki, 32, 901};
// Ordering as per AsicRevision# in //depot/stg/pal/inc/core/palDevice.h and
// http://confluence.amd.com/pages/viewpage.action?spaceKey=ASLC&title=AMDGPU+Target+Names
static const AMDDeviceInfo Gfx9PlusSubDeviceInfo[] = {
/* Vega10 */{"gfx900", "gfx900", 4, 16, 1, 256, 64 * Ki, 32, 900},
/* Vega10 XNACK */{"gfx901", "gfx901", 4, 16, 1, 256, 64 * Ki, 32, 901},
/* Vega12 */{0},
/* Vega12 XNACK */{0},
/* Vega20 */{0},
/* Vega20 XNACK */{0},
/* Raven */{"gfx902", "gfx902", 4, 16, 1, 256, 64 * Ki, 32, 902},
/* Raven XNACK */{"gfx903", "gfx903", 4, 16, 1, 256, 64 * Ki, 32, 903},
/* Raven2 */{0},
/* Raven2 XNACK */{0},
/* Navi10 */{0},
/* Navi10 XNACK */{0},
};
enum gfx_handle {
gfx700 = 700,
gfx701 = 701,
gfx702 = 702,
gfx800 = 800,
gfx801 = 801,
gfx804 = 804,
gfx810 = 810,
gfx900 = 900,
gfx901 = 901
gfx700 = 700,
gfx701 = 701,
gfx702 = 702,
gfx800 = 800,
gfx801 = 801,
gfx804 = 804,
gfx810 = 810,
gfx900 = 900,
gfx901 = 901,
gfx902 = 902,
gfx903 = 903
};
static const char* Gfx700 = "AMD:AMDGPU:7:0:0";
static const char* Gfx701 = "AMD:AMDGPU:7:0:1";
static const char* Gfx800 = "AMD:AMDGPU:8:0:0";
static const char* Gfx801 = "AMD:AMDGPU:8:0:1";
static const char* Gfx804 = "AMD:AMDGPU:8:0:4";
static const char* Gfx810 = "AMD:AMDGPU:8:1:0";
static const char* Gfx900 = "AMD:AMDGPU:9:0:0";
static const char* Gfx901 = "AMD:AMDGPU:9:0:1";
static const char* Gfx700 = "AMD:AMDGPU:7:0:0";
static const char* Gfx701 = "AMD:AMDGPU:7:0:1";
static const char* Gfx800 = "AMD:AMDGPU:8:0:0";
static const char* Gfx801 = "AMD:AMDGPU:8:0:1";
static const char* Gfx804 = "AMD:AMDGPU:8:0:4";
static const char* Gfx810 = "AMD:AMDGPU:8:1:0";
static const char* Gfx900 = "AMD:AMDGPU:9:0:0";
static const char* Gfx901 = "AMD:AMDGPU:9:0:1";
static const char* Gfx902 = "AMD:AMDGPU:9:0:2";
static const char* Gfx903 = "AMD:AMDGPU:9:0:3";
// Supported OpenCL versions
enum OclVersion { OpenCL10, OpenCL11, OpenCL12, OpenCL20 };
rocclr/runtime/device/pal/paldevice.cpp
+9 -6
View File
@@ -651,16 +651,19 @@ bool Device::create(Pal::IDevice* device) {
ipLevel_ = properties().gfxLevel;
asicRevision_ = properties().revision;
// XNACK flag should be set for PageMigration | IOMMUv2 Support
uint isXNACKSupported = static_cast<uint>(properties_.gpuMemoryProperties.flags.pageMigrationEnabled
|| properties_.gpuMemoryProperties.flags.iommuv2Support);
uint subtarget = isXNACKSupported;
// Update HW info for the device
if ((GPU_ENABLE_PAL == 1) && (properties().revision <= Pal::AsicRevision::Baffin)) {
hwInfo_ = &DeviceInfo[static_cast<uint>(properties().revision)];
} else if (ipLevel_ >= Pal::GfxIpLevel::GfxIp9) {
if (properties().gpuType == Pal::GpuType::Integrated ||
properties_.gpuMemoryProperties.flags.pageMigrationEnabled) {
hwInfo_ = &Gfx901DeviceInfo;
} else {
hwInfo_ = &GfxIpDeviceInfo[static_cast<uint>(ipLevel_)];
}
// For compiler sub targets
subtarget = (static_cast<uint>(asicRevision_) % static_cast<uint>(Pal::AsicRevision::Vega10)) << 1 |
subtarget;
hwInfo_ = &Gfx9PlusSubDeviceInfo[subtarget];
} else {
return false;
}