P4 to Git Change 1270658 by gandryey@gera-w8 on 2016/05/18 17:53:45
SWDEV-86035 - Add PAL backend to OpenCL - Fix a crash in the pipe test. Device layer can't use device blit queue directly, but requires a blit manager call, which will perform correct wait for idle sequence. Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palblit.cpp#3 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palblit.hpp#3 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.cpp#6 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palkernel.cpp#5 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palmemory.cpp#5 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palprogram.cpp#3 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.cpp#8 edit ... //depot/stg/opencl/drivers/opencl/tests/ocltst/module/runtime/OCLRTQueue.cpp#2 edit
Этот коммит содержится в:
foreman
@@ -23,8 +23,8 @@ inline void
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DmaBlitManager::synchronize() const
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{
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if (syncOperation_) {
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gpu().waitAllEngines();
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gpu().releaseMemObjects();
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gpu().waitAllEngines();
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}
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}
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@@ -2685,6 +2685,18 @@ KernelBlitManager::runScheduler(
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return result;
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}
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void
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KernelBlitManager::writeRawData(
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device::Memory& memory,
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size_t size,
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const void* data
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) const
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{
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static_cast<pal::Memory&>(memory).writeRawData(gpu(), size, data, false);
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synchronize();
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}
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amd::Memory*
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DmaBlitManager::pinHostMemory(
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const void* hostMem,
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@@ -371,14 +371,21 @@ public:
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bool entire = false //!< Entire buffer will be updated
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) const;
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//! Fills an image memory with a pattern data
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virtual bool runScheduler(
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//! Runs a GPU scheduler for device enqueue
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bool runScheduler(
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device::Memory& vqueue, //!< Memory object for virtual queue
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device::Memory& params, //!< Extra arguments for the scheduler
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uint paramIdx, //!< Parameter index
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uint threads //!< Number of scheduling threads
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) const;
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//! Writes CPU raw data into GPU memory
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void writeRawData(
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device::Memory& memory, //!< Memory object for data udpate
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size_t size, //!< Size of raw data
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const void* data //!< Raw data pointer
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) const;
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private:
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static const size_t MaxXferBuffers = 2;
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@@ -987,8 +987,8 @@ Device::init()
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acl_error error;
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compiler_ = aclCompilerInit(&opts, &error);
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if (error != ACL_SUCCESS) {
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LogError("Error initializing the compiler");
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return false;
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LogError("Error initializing the compiler");
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return false;
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}
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size_t size = Pal::GetPlatformSize();
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@@ -1210,7 +1210,8 @@ Device::createBuffer(
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// Pipe initialize in order read_idx, write_idx, end_idx. Refer clk_pipe_t structure.
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// Init with 3 DWORDS for 32bit addressing and 6 DWORDS for 64bit
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size_t pipeInit[3] = {0 , 0, owner.asPipe()->getMaxNumPackets()};
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gpuMemory->writeRawData(*xferQueue_, sizeof(pipeInit), pipeInit, true);
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static_cast<const KernelBlitManager&>(xferMgr()).writeRawData(
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*gpuMemory, sizeof(pipeInit), pipeInit);
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}
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// If memory has direct access from host, then get CPU address
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if (gpuMemory->isHostMemDirectAccess() &&
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@@ -677,9 +677,8 @@ HSAILKernel::init(amd::hsa::loader::Symbol *sym, bool finalize)
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return false;
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}
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//! @todo get the right value;
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// Copy wavefront size
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workGroupInfo_.wavefrontSize_ = 64;//dev().getAttribs().wavefrontSize;
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workGroupInfo_.wavefrontSize_ = dev().properties().gfxipProperties.shaderCore.wavefrontSize;
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// Find total workgroup size
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if (workGroupInfo_.compileSize_[0] != 0) {
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workGroupInfo_.size_ =
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@@ -999,7 +998,7 @@ HSAILKernel::loadArguments(
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break;
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}
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//! @todo 64 bit isn't supported with 32 bit binary
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//! 64 bit isn't supported with 32 bit binary
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uint64_t globalAddress = gpuMem->vmAddress() + gpuMem->pinOffset();
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WriteAqlArg(&aqlArgBuf, &globalAddress, sizeof(void*));
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@@ -151,14 +151,8 @@ Memory::create(
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reinterpret_cast<Resource::ViewParams*>(params);
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// Check if parent was allocated in system memory
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if ((view->resource_->memoryType() == Resource::Pinned) ||
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(((view->resource_->memoryType() == Resource::Remote) ||
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(view->resource_->memoryType() == Resource::RemoteUSWC)) &&
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// @todo Enable unconditional optimization for remote memory
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// Check for external allocation, to avoid the optimization
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// for non-VM (double copy) mode
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(owner() != nullptr) &&
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((owner()->getMemFlags() & CL_MEM_ALLOC_HOST_PTR) ||
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dev().settings().remoteAlloc_))) {
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(view->resource_->memoryType() == Resource::Remote) ||
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(view->resource_->memoryType() == Resource::RemoteUSWC)) {
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// Marks memory object for direct GPU access to the host memory
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flags_ |= HostMemoryDirectAccess;
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}
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@@ -578,10 +572,6 @@ Memory::syncCacheFromHost(VirtualGPU& gpu, device::Memory::SyncFlags syncFlags)
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}
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}
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//!@todo A wait isn't really necessary. However
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//! Linux no-VM may have extra random failures.
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wait(gpu);
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// Should never fail
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assert(result && "Memory synchronization failed!");
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}
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@@ -237,7 +237,6 @@ HSAILProgram::getCompilationStagesFromBinary(std::vector<aclType>& completeStage
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aclType from = ACL_TYPE_DEFAULT;
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needOptionsCheck = true;
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size_t boolSize = sizeof(bool);
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//! @todo Should we also check for ACL_TYPE_OPENCL & ACL_TYPE_LLVMIR_TEXT?
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// Checking llvmir in .llvmir section
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bool containsSpirv = true;
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errorCode = aclQueryInfo(dev().compiler(), binaryElf_,
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@@ -375,7 +374,6 @@ HSAILProgram::getNextCompilationStageFromBinary(amd::option::Options* options) {
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return continueCompileFrom;
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}
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bool recompile = false;
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//! @todo Should we also check for ACL_TYPE_OPENCL & ACL_TYPE_LLVMIR_TEXT?
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switch (continueCompileFrom) {
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case ACL_TYPE_HSAIL_BINARY:
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case ACL_TYPE_CG:
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@@ -149,8 +149,9 @@ VirtualGPU::Queue::addCmdMemRef(Pal::IGpuMemory* iMem)
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void
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VirtualGPU::Queue::removeCmdMemRef(Pal::IGpuMemory* iMem)
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{
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memReferences_.erase(iMem);
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iDev_->RemoveGpuMemoryReferences(1, &iMem, iQueue_);
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if (0 != memReferences_.erase(iMem)) {
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iDev_->RemoveGpuMemoryReferences(1, &iMem, iQueue_);
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}
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}
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uint
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@@ -2264,39 +2265,32 @@ VirtualGPU::submitMarker(amd::Marker& vcmd)
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GpuEvent*
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VirtualGPU::getGpuEvent(Pal::IGpuMemory* iMem)
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{
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GpuEvents::iterator it = gpuEvents_.find(iMem);
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if (it == gpuEvents_.end()) {
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// queue(MainEngine).addMemRef(iMem);
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// queue(SdmaEngine).addMemRef(iMem);
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}
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return &gpuEvents_[iMem];
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}
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void
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VirtualGPU::assignGpuEvent(Pal::IGpuMemory* iMem, GpuEvent gpuEvent)
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{
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GpuEvents::iterator it = gpuEvents_.find(iMem);
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auto it = gpuEvents_.find(iMem);
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if (it != gpuEvents_.end()) {
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it->second = gpuEvent;
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}
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else {
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// queue(gpuEvent.engineId_).addMemRef(iMem);
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gpuEvents_[iMem] = gpuEvent;
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}
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// queues_[gpuEvent.engineId_]->addCmdMemRef(iMem);
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}
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void
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VirtualGPU::releaseMemory(Pal::IGpuMemory* iMem, bool wait)
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{
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auto it = gpuEvents_.find(iMem);
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//! @note if there is no wait, then it's a view release
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if (wait) {
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waitForEvent(&gpuEvents_[iMem]);
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//queue(MainEngine).removeMemRef(iMem);
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//queue(SdmaEngine).removeMemRef(iMem);
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if (wait && (it != gpuEvents_.end())) {
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waitForEvent(&it->second);
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queues_[MainEngine]->removeCmdMemRef(iMem);
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queues_[SdmaEngine]->removeCmdMemRef(iMem);
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gpuEvents_.erase(iMem);
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gpuEvents_.erase(it);
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}
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}
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