Rework barriers and adjust scope of atomics (#1019)
Этот коммит содержится в:
@@ -338,8 +338,9 @@ __device__ __forceinline__ void mscclRunInterpreter(
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if (tid == 0) {
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NpKit::CollectGpuEventLDS(NPKIT_EVENT_MSCCL_SEND_ENTRY, thisNelem*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP());
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}
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#endif
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prims.template send<1>(srcOffset, thisNelem); // LL.send is the only situation where there is no barrier at the end.
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#endif
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prims.send(srcOffset, thisNelem); // LL.send is the only situation where there is no barrier at the end.
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_MSCCL_SEND_EXIT)
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if (tid == 0) {
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@@ -352,8 +353,9 @@ __device__ __forceinline__ void mscclRunInterpreter(
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if (tid == 0) {
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NpKit::CollectGpuEventLDS(NPKIT_EVENT_MSCCL_RECV_ENTRY, thisNelem*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP());
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}
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#endif
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prims.template recv<1>(dstOffset, thisNelem);
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#endif
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prims.recv(dstOffset, thisNelem);
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_MSCCL_RECV_EXIT)
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if (tid == 0) {
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NpKit::CollectGpuEventLDS(NPKIT_EVENT_MSCCL_RECV_EXIT, thisNelem*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP());
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@@ -89,13 +89,6 @@ private:
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#endif
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}
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inline __device__ void msccl_barrier() {
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#if defined(__HIP_PLATFORM_HCC__) || defined(__HCC__) || defined(__HIPCC__)
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__builtin_amdgcn_s_barrier();
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#else
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#endif
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}
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uint32_t abort = 0;
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inline __device__ int checkAbort(int &spins, int send) {
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@@ -107,7 +100,6 @@ private:
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return abort;
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}
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template<int MSCCL = 0>
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inline __device__ void waitSend(int nbytes) {
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_PRIM_LL_WAIT_SEND_ENTRY)
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if (tid == 0) {
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@@ -125,15 +117,11 @@ private:
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__asm__ __volatile__("s_wakeup");
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if (sendConnFifoPtr) {
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int size = ((sendConnHead & NCCL_LL_CLEAN_MASK) == NCCL_LL_CLEAN_MASK) ? stepLines*sizeof(union ncclLLFifoLine) : nbytes;
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__atomic_store_n(sendConnFifoPtr+sendConnHead%NCCL_STEPS, (size), __ATOMIC_SEQ_CST);
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__atomic_store_n(sendConnFifoPtr+sendConnHead%NCCL_STEPS, (size), __ATOMIC_RELAXED);
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}
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sendConnHead += 1;
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}
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if (MSCCL) {
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msccl_barrier();
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} else {
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barrier();
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}
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barrier();
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_PRIM_LL_WAIT_SEND_EXIT)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_PRIM_LL_WAIT_SEND_EXIT, nbytes, 0, NPKIT_GET_GPU_TIMESTAMP(),
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@@ -145,13 +133,8 @@ private:
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inline __device__ void incRecv(int i) {
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recvStep[i] += 1;
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}
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template<int MSCCL = 0>
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inline __device__ void postRecv() {
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if (MSCCL) {
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msccl_barrier();
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} else {
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barrier();
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}
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barrier();
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if (recvConnHeadPtr) STORE(recvConnHeadPtr, recvConnHead += 1);
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}
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@@ -402,7 +385,7 @@ private:
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}
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}
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template <int RECV, int SEND, int SrcBuf, int DstBuf, int MSCCL = 0>
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template <int RECV, int SEND, int SrcBuf, int DstBuf>
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__device__ void LLGenericOp(intptr_t srcIx, intptr_t dstIx, int nelem, bool postOp) {
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constexpr int SRC = SrcBuf != -1 ? 1 : 0;
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constexpr int DST = DstBuf != -1 ? 1 : 0;
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@@ -411,7 +394,7 @@ private:
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// Always waitSend in case of cleanup
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nelem = nelem < 0 ? 0 : nelem;
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if (SEND) waitSend<MSCCL>(divUp(nelem, EltPerLine)*sizeof(ncclLLFifoLine));
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if (SEND) waitSend(divUp(nelem, EltPerLine)*sizeof(ncclLLFifoLine));
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_PRIM_LL_DATA_PROCESS_ENTRY) && defined(ENABLE_NPKIT_EVENT_PRIM_LL_DATA_PROCESS_EXIT)
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if (tid == 0) {
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@@ -494,7 +477,7 @@ private:
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if (RECV) {
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for (int i=0; i < MaxRecv; i++) incRecv(i);
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postRecv<MSCCL>();
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postRecv();
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}
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if (SEND) {
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for (int i=1; i < MaxSend && i < fan.nsend(); i++)
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@@ -656,7 +639,6 @@ private:
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userBufs[Output] += delta;
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}
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template<int MSCCL = 0>
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__device__ void send(intptr_t inpIx, int eltN) {
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_SEND_ENTRY)
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if (tid == 0) {
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@@ -664,7 +646,7 @@ private:
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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LLGenericOp<0, 1, Input, -1, MSCCL>(inpIx, -1, eltN, false);
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LLGenericOp<0, 1, Input, -1>(inpIx, -1, eltN, false);
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_SEND_EXIT)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_SEND_EXIT, eltN*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP(),
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@@ -687,7 +669,6 @@ private:
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}
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#endif
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}
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template<int MSCCL = 0>
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__device__ void recv(intptr_t outIx, int eltN, bool postOp=false) {
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_RECV_ENTRY)
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if (tid == 0) {
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@@ -695,7 +676,7 @@ private:
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ncclShmem.comm.npKitEventCollectContexts + npKitCtxIdx);
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}
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#endif
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LLGenericOp<1, 0, -1, Output, MSCCL>(-1, outIx, eltN, postOp);
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LLGenericOp<1, 0, -1, Output>(-1, outIx, eltN, postOp);
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#if defined(ENABLE_NPKIT) && defined(ENABLE_NPKIT_EVENT_RECV_EXIT)
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if (tid == 0) {
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NpKit::CollectGpuEvent(NPKIT_EVENT_RECV_EXIT, eltN*sizeof(T), 0, NPKIT_GET_GPU_TIMESTAMP(),
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@@ -99,12 +99,12 @@ private:
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int spins = 0;
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while (sendConnHeadCache + NCCL_STEPS < sendConnHead + 1) {
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__builtin_amdgcn_s_sleep(1);
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sendConnHeadCache = atomicAdd_system((unsigned long long *)sendConnHeadPtr, 0);
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sendConnHeadCache = __atomic_load_n(sendConnHeadPtr, __ATOMIC_RELAXED);
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if (checkAbort(spins, wid, 1)) break;
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}
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__asm__ __volatile__("s_wakeup");
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if (sendConnFifoPtr) {
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__atomic_store_n(sendConnFifoPtr+sendStep[wid]%NCCL_STEPS, nbytes, __ATOMIC_SEQ_CST);
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__atomic_store_n(sendConnFifoPtr+sendStep[wid]%NCCL_STEPS, nbytes, __ATOMIC_RELAXED);
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}
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sendConnHead += 1;
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}
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@@ -546,14 +546,12 @@ public:
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userBufs[Output] += delta;
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}
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template<int MSCCL = 0>
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__device__ void send(intptr_t inpIx, int eltN) {
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return GenericOp<0, 1, Input, -1>(inpIx, -1, eltN, false);
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}
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__device__ void sendFromOutput(intptr_t outIx, int eltN) {
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return GenericOp<0, 1, Output, -1>(outIx, -1, eltN, false);
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}
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template<int MSCCL = 0>
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__device__ void recv(intptr_t outIx, int eltN, bool postOp=false) {
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return GenericOp<1, 0, -1, Output>(-1, outIx, eltN, postOp);
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}
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@@ -81,7 +81,7 @@ private:
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inline __device__ bool checkAbort(int &spins) {
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spins++;
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if (!(flags & Aborted) && spins == NCCL_SPINS_BEFORE_CHECK_ABORT) {
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if (atomicAdd_system((unsigned int *)ncclShmem.comm.abortFlag, 0)) {
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if (__atomic_load_n(ncclShmem.comm.abortFlag, __ATOMIC_SEQ_CST)) {
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flags |= Aborted;
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ncclShmem.aborted = 1;
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}
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@@ -100,11 +100,7 @@ private:
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#endif
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// volatile is faster than acquire but not as correct. Make sure reduceCopy
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// loads data using volatile so it doesn't see stale data in L1.
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#ifdef __GFX9__
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return atomicAdd((unsigned long long *)ptr, 0);
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#else
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return __atomic_load_n(ptr, __ATOMIC_SEQ_CST);
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#endif
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return __atomic_load_n(ptr, __ATOMIC_RELAXED);
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}
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template <int DirectRecv, int DirectSend, int Recv, int Send, int Src, int Dst>
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@@ -127,7 +123,7 @@ private:
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if (flags & (Recv*RoleWaitRecv | Send*RoleWaitSend)) {
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if (isSendNotRecv && (flags & SizesFifoEnabled))
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__atomic_store_n(connSizesFifoPtr+step%NCCL_STEPS, nelts*sizeof(T), __ATOMIC_SEQ_CST);
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__atomic_store_n(connSizesFifoPtr+step%NCCL_STEPS, nelts*sizeof(T), __ATOMIC_RELAXED);
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void **ptrs = isSendNotRecv ? (ncclShmem.groups[group].dsts + Dst)
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: (ncclShmem.groups[group].srcs + Src);
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@@ -710,7 +706,6 @@ private:
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if (flags & RoleOutput) userBuff = (T*)outputBuf;
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}
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template<int MSCCL = 0>
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__device__ __forceinline__ void send(intptr_t inpIx, int eltN) {
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genericOp<0, 0, 0, 1, Input, -1>(inpIx, -1, eltN, false);
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}
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@@ -724,7 +719,6 @@ private:
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genericOp<0, 1, 0, 1, Output, -1>(outIx, outIx, eltN, false);
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}
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template<int MSCCL = 0>
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__device__ __forceinline__ void recv(intptr_t outIx, int eltN, bool postOp=false) {
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genericOp<0, 0, 1, 0, -1, Output>(-1, outIx, eltN, postOp);
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}
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