SWDEV-246878-Update document HIP_porting_guide
Change-Id: I7f4c92637f31da76293048133fff5af816c752ca
[ROCm/clr commit: e93f7b6a56]
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@@ -14,7 +14,7 @@ and provides practical suggestions on how to port CUDA code and work through com
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* [CUDA to HIP Math Library Equivalents](#library-equivalents)
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- [Distinguishing Compiler Modes](#distinguishing-compiler-modes)
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* [Identifying HIP Target Platform](#identifying-hip-target-platform)
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* [Identifying the Compiler: hcc, hip-clang, or nvcc](#identifying-the-compiler-hcc-hip-clang-or-nvcc)
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* [Identifying the Compiler: hip-clang, or nvcc](#identifying-the-compiler-hip-clang-or-nvcc)
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* [Identifying Current Compilation Pass: Host or Device](#identifying-current-compilation-pass-host-or-device)
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* [Compiler Defines: Summary](#compiler-defines-summary)
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- [Identifying Architecture Features](#identifying-architecture-features)
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@@ -41,12 +41,10 @@ and provides practical suggestions on how to port CUDA code and work through com
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- [threadfence_system](#threadfence_system)
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* [Textures and Cache Control](#textures-and-cache-control)
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- [More Tips](#more-tips)
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* [HIPTRACE Mode](#hiptrace-mode)
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* [Environment Variables](#environment-variables)
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* [HIP Logging](#hip-logging)
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* [Debugging hipcc](#debugging-hipcc)
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* [What Does This Error Mean?](#what-does-this-error-mean)
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+ [/usr/include/c++/v1/memory:5172:15: error: call to implicitly deleted default constructor of 'std::__1::bad_weak_ptr' throw bad_weak_ptr();](#usrincludecv1memory517215-error-call-to-implicitly-deleted-default-constructor-of-std__1bad_weak_ptr-throw-bad_weak_ptr)
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* [HIP Environment Variables](#hip-environment-variables)
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* [Editor Highlighting](#editor-highlighting)
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@@ -163,17 +161,19 @@ Many projects use a mixture of an accelerator compiler (AMD or NVIDIA) and a sta
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### Identifying the Compiler: hcc, hip-clang or nvcc
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Often, it's useful to know whether the underlying compiler is hcc, HIP-Clang or nvcc. This knowledge can guard platform-specific code or aid in platform-specific performance tuning.
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### Identifying the Compiler: hip-clang or nvcc
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Often, it's useful to know whether the underlying compiler is HIP-Clang or nvcc. This knowledge can guard platform-specific code or aid in platform-specific performance tuning.
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```
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#ifdef __HCC__
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// Compiled with hcc
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#ifdef __HIP_PLATFORM_HCC__
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// Compiled with HIP-Clang
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```
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```
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#ifdef __HIP__
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#if defined(__HCC__) || (defined(__clang__) && defined(__HIP__))
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#define __HIP_PLATFORM_HCC__
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#endif
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// Compiled with HIP-Clang
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```
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@@ -198,7 +198,7 @@ Compiler directly generates the host code (using the Clang x86 target) and passe
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nvcc makes two passes over the code: one for host code and one for device code.
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HIP-Clang will have multiple passes over the code: one for the host code, and one for each architecture on the device code.
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`__HIP_DEVICE_COMPILE__` is set to a nonzero value when the compiler (hcc, HIP-Clang or nvcc) is compiling code for a device inside a `__global__` kernel or for a device function. `__HIP_DEVICE_COMPILE__` can replace #ifdef checks on the `__CUDA_ARCH__` define.
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`__HIP_DEVICE_COMPILE__` is set to a nonzero value when the compiler (HIP-Clang or nvcc) is compiling code for a device inside a `__global__` kernel or for a device function. `__HIP_DEVICE_COMPILE__` can replace #ifdef checks on the `__CUDA_ARCH__` define.
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```
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// #ifdef __CUDA_ARCH__
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@@ -209,24 +209,21 @@ Unlike `__CUDA_ARCH__`, the `__HIP_DEVICE_COMPILE__` value is 1 or undefined, an
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### Compiler Defines: Summary
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|Define | hcc | HIP-Clang | nvcc | Other (GCC, ICC, Clang, etc.)
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|--- | --- | --- | --- |---|
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|Define | HIP-Clang | nvcc | Other (GCC, ICC, Clang, etc.)
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|--- | --- | --- |---|
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|HIP-related defines:|
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|`__HIP_PLATFORM_HCC__`| Defined | Defined | Undefined | Defined if targeting hcc platform; undefined otherwise |
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|`__HIP_PLATFORM_NVCC__`| Undefined | Undefined | Defined | Defined if targeting nvcc platform; undefined otherwise |
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|`__HIP_DEVICE_COMPILE__` | 1 if compiling for device; undefined if compiling for host | 1 if compiling for device; undefined if compiling for host |1 if compiling for device; undefined if compiling for host | Undefined
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|`__HIPCC__` | Defined | Defined | Defined | Undefined
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|`__HIP_ARCH_*` | 0 or 1 depending on feature support (see below) |0 or 1 depending on feature support (see below) | 0 or 1 depending on feature support (see below) | 0
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|`__HIP_PLATFORM_HCC__`| Defined | Undefined | Defined if targeting AMD platform; undefined otherwise |
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|`__HIP_PLATFORM_NVCC__`| Undefined | Defined | Defined if targeting nvcc platform; undefined otherwise |
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|`__HIP_DEVICE_COMPILE__` | 1 if compiling for device; undefined if compiling for host |1 if compiling for device; undefined if compiling for host | Undefined
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|`__HIPCC__` | Defined | Defined | Undefined
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|`__HIP_ARCH_*` |0 or 1 depending on feature support (see below) | 0 or 1 depending on feature support (see below) | 0
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|nvcc-related defines:|
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|`__CUDACC__` | Undefined | Undefined | Defined if source code is compiled by nvcc; undefined otherwise | Undefined
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|`__NVCC__` | Undefined | Undefined | Defined | Undefined
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|`__CUDA_ARCH__` | Undefined | Undefined | Unsigned representing compute capability (e.g., "130") if in device code; 0 if in host code | Undefined
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|hcc-related defines:|
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|`__HCC__` | Defined | Undefined | Undefined | Undefined
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|`__HCC_ACCELERATOR__` | Nonzero if in device code; otherwise undefined | Undefined | Undefined | Undefined
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|`__CUDACC__` | Defined if source code is compiled by nvcc; undefined otherwise | Undefined
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|`__NVCC__` | Undefined | Defined | Undefined
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|`__CUDA_ARCH__` | Undefined | Unsigned representing compute capability (e.g., "130") if in device code; 0 if in host code | Undefined
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|hip-clang-related defines:|
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|`__HIP__` | Undefined | Defined | Undefined | Undefined
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|hcc/HIP-Clang common defines:|
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|`__HIP__` | Defined | Undefined | Undefined
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|HIP-Clang common defines:|
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|`__clang__` | Defined | Defined | Undefined | Defined if using Clang; otherwise undefined
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## Identifying Architecture Features
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@@ -274,23 +271,23 @@ The table below shows the full set of architectural properties that HIP supports
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|`__HIP_ARCH_HAS_SHARED_INT32_ATOMICS__` | hasSharedInt32Atomics |32-bit integer atomics for shared memory
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|`__HIP_ARCH_HAS_SHARED_FLOAT_ATOMIC_EXCH__` | hasSharedFloatAtomicExch |32-bit float atomic exchange for shared memory
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|`__HIP_ARCH_HAS_FLOAT_ATOMIC_ADD__` | hasFloatAtomicAdd |32-bit float atomic add in global and shared memory
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|64-bit atomics: | |
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|`__HIP_ARCH_HAS_GLOBAL_INT64_ATOMICS__` | hasGlobalInt64Atomics |64-bit integer atomics for global memory
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|64-bit atomics: | |
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|`__HIP_ARCH_HAS_GLOBAL_INT64_ATOMICS__` | hasGlobalInt64Atomics |64-bit integer atomics for global memory
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|`__HIP_ARCH_HAS_SHARED_INT64_ATOMICS__` | hasSharedInt64Atomics |64-bit integer atomics for shared memory
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|Doubles: | |
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|`__HIP_ARCH_HAS_DOUBLES__` | hasDoubles |Double-precision floating point
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|Warp cross-lane operations: | |
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|`__HIP_ARCH_HAS_WARP_VOTE__` | hasWarpVote |Warp vote instructions (any, all)
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|`__HIP_ARCH_HAS_WARP_BALLOT__` | hasWarpBallot |Warp ballot instructions
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|`__HIP_ARCH_HAS_WARP_SHUFFLE__` | hasWarpShuffle |Warp shuffle operations (shfl\_\*)
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|`__HIP_ARCH_HAS_DOUBLES__` | hasDoubles |Double-precision floating point
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|Warp cross-lane operations: | |
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|`__HIP_ARCH_HAS_WARP_VOTE__` | hasWarpVote |Warp vote instructions (any, all)
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|`__HIP_ARCH_HAS_WARP_BALLOT__` | hasWarpBallot |Warp ballot instructions
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|`__HIP_ARCH_HAS_WARP_SHUFFLE__` | hasWarpShuffle |Warp shuffle operations (shfl\_\*)
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|`__HIP_ARCH_HAS_WARP_FUNNEL_SHIFT__` | hasFunnelShift |Funnel shift two input words into one
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|Sync: | |
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|`__HIP_ARCH_HAS_THREAD_FENCE_SYSTEM__` | hasThreadFenceSystem |threadfence\_system
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|`__HIP_ARCH_HAS_SYNC_THREAD_EXT__` | hasSyncThreadsExt |syncthreads\_count, syncthreads\_and, syncthreads\_or
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|Miscellaneous: | |
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|`__HIP_ARCH_HAS_SURFACE_FUNCS__` | hasSurfaceFuncs |
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|`__HIP_ARCH_HAS_3DGRID__` | has3dGrid | Grids and groups are 3D
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|`__HIP_ARCH_HAS_DYNAMIC_PARALLEL__` | hasDynamicParallelism |
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|`__HIP_ARCH_HAS_SYNC_THREAD_EXT__` | hasSyncThreadsExt |syncthreads\_count, syncthreads\_and, syncthreads\_or
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|Miscellaneous: | |
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|`__HIP_ARCH_HAS_SURFACE_FUNCS__` | hasSurfaceFuncs |
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|`__HIP_ARCH_HAS_3DGRID__` | has3dGrid | Grids and groups are 3D
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|`__HIP_ARCH_HAS_DYNAMIC_PARALLEL__` | hasDynamicParallelism |
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## Finding HIP
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@@ -498,19 +495,15 @@ int main()
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std::cout<<"Passed"<<std::endl;
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}
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```
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## threadfence_system
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Threadfence_system makes all device memory writes, all writes to mapped host memory, and all writes to peer memory visible to CPU and other GPU devices.
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Some implementations can provide this behavior by flushing the GPU L2 cache.
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HIP/HCC does not provide this functionality. As a workaround, users can set the environment variable `HSA_DISABLE_CACHE=1` to
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disable the GPU L2 cache. This will affect all accesses and for all kernels and so may have
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a performance impact.
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HIP/HIP-Clang does not provide this functionality. As a workaround, users can set the environment variable `HSA_DISABLE_CACHE=1` to disable the GPU L2 cache. This will affect all accesses and for all kernels and so may have a performance impact.
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### Textures and Cache Control
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Compute programs sometimes use textures either to access dedicated texture caches or to use the texture-sampling hardware for interpolation and clamping. The former approach uses simple point samplers with linear interpolation, essentially only reading a single point. The latter approach uses the sampler hardware to interpolate and combine multiple
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point samples. AMD hardware, as well as recent competing hardware,
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has a unified texture/L1 cache, so it no longer has a dedicated texture cache. But the nvcc path often caches global loads in the L2 cache, and some programs may benefit from explicit control of the L1 cache contents. We recommend the __ldg instruction for this purpose.
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Compute programs sometimes use textures either to access dedicated texture caches or to use the texture-sampling hardware for interpolation and clamping. The former approach uses simple point samplers with linear interpolation, essentially only reading a single point. The latter approach uses the sampler hardware to interpolate and combine multiple samples. AMD hardware, as well as recent competing hardware, has a unified texture/L1 cache, so it no longer has a dedicated texture cache. But the nvcc path often caches global loads in the L2 cache, and some programs may benefit from explicit control of the L1 cache contents. We recommend the __ldg instruction for this purpose.
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AMD compilers currently load all data into both the L1 and L2 caches, so __ldg is treated as a no-op.
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@@ -521,27 +514,51 @@ We recommend the following for functional portability:
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## More Tips
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### HIPTRACE Mode
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On an hcc/AMD platform, set the HIP_TRACE_API environment variable to see a textural API trace. Use the following bit mask:
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### HIP Logging
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- 0x1 = trace APIs
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- 0x2 = trace synchronization operations
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- 0x4 = trace memory allocation / deallocation
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On an AMD platform, set the AMD_LOG_LEVEL environment variable to log HIP application execution information.
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### Environment Variables
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The value of the setting controls different logging level,
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On hcc/AMD platforms, set the HIP_PRINT_ENV environment variable to 1 and run an application that calls a HIP API to see all HIP-supported environment variables and their current values:
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```
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enum LogLevel {
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LOG_NONE = 0,
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LOG_ERROR = 1,
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LOG_WARNING = 2,
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LOG_INFO = 3,
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LOG_DEBUG = 4
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};
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```
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- HIP_PRINT_ENV = 1: print HIP environment variables
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- HIP_TRACE_API = 1: trace each HIP API call. Print the function name and return code to stderr as the program executes.
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- HIP_LAUNCH_BLOCKING = 0: make HIP APIs host-synchronous so they are blocked until any kernel launches or data-copy commands are complete (an alias is CUDA_LAUNCH_BLOCKING)
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- KMDUMPISA = 1 : Will dump the GCN ISA for all kernels into the local directory. (This flag is provided by HCC).
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Logging mask is used to print types of functionalities during the execution of HIP application.
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It can be set as one of the following values,
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```
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enum LogMask {
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LOG_API = 0x00000001, //!< API call
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LOG_CMD = 0x00000002, //!< Kernel and Copy Commands and Barriers
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LOG_WAIT = 0x00000004, //!< Synchronization and waiting for commands to finish
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LOG_AQL = 0x00000008, //!< Decode and display AQL packets
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LOG_QUEUE = 0x00000010, //!< Queue commands and queue contents
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LOG_SIG = 0x00000020, //!< Signal creation, allocation, pool
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LOG_LOCK = 0x00000040, //!< Locks and thread-safety code.
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LOG_KERN = 0x00000080, //!< kernel creations and arguments, etc.
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LOG_COPY = 0x00000100, //!< Copy debug
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LOG_COPY2 = 0x00000200, //!< Detailed copy debug
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LOG_RESOURCE = 0x00000400, //!< Resource allocation, performance-impacting events.
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LOG_INIT = 0x00000800, //!< Initialization and shutdown
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LOG_MISC = 0x00001000, //!< misc debug, not yet classified
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LOG_AQL2 = 0x00002000, //!< Show raw bytes of AQL packet
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LOG_CODE = 0x00004000, //!< Show code creation debug
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LOG_CMD2 = 0x00008000, //!< More detailed command info, including barrier commands
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LOG_LOCATION = 0x00010000, //!< Log message location
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LOG_ALWAYS = 0xFFFFFFFF, //!< Log always even mask flag is zero
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};
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```
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### Debugging hipcc
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To see the detailed commands that hipcc issues, set the environment variable HIPCC_VERBOSE to 1. Doing so will print to stderr the hcc (or nvcc) commands that hipcc generates.
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To see the detailed commands that hipcc issues, set the environment variable HIPCC_VERBOSE to 1. Doing so will print to stderr the HIP-clang (or nvcc) commands that hipcc generates.
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```
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export HIPCC_VERBOSE=1
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@@ -557,25 +574,6 @@ hipcc-cmd: /opt/hcc/bin/hcc -hc -I/opt/hcc/include -stdlib=libc++ -I../../../..
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If you pass a ".cu" file, hcc will attempt to compile it as a CUDA language file. You must tell hcc that it's in fact a C++ file: use the "-x c++" option.
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### HIP Environment Variables
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On the HCC path, HIP provides a number of environment variables that control the behavior of HIP. Some of these are useful for application development (for example HIP_VISIBLE_DEVICES, HIP_LAUNCH_BLOCKING),
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some are useful for performance tuning or experimentation (for example HIP_STAGING*), and some are useful for debugging (HIP_DB). You can see the environment variables supported by HIP as well as
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their current values and usage with the environment var "HIP_PRINT_ENV" - set this and then run any HIP application. For example:
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```
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$ HIP_PRINT_ENV=1 ./myhipapp
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HIP_PRINT_ENV = 1 : Print HIP environment variables.
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HIP_LAUNCH_BLOCKING = 0 : Make HIP APIs 'host-synchronous', so they block until any kernel launches or data copy commands complete. Alias: CUDA_LAUNCH_BLOCKING.
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HIP_DB = 0 : Print various debug info. Bitmask, see hip_hcc.cpp for more information.
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HIP_TRACE_API = 0 : Trace each HIP API call. Print function name and return code to stderr as program executes.
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HIP_TRACE_API_COLOR = green : Color to use for HIP_API. None/Red/Green/Yellow/Blue/Magenta/Cyan/White
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HIP_PROFILE_API = 0 : Add HIP function begin/end to ATP file generated with CodeXL
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HIP_VISIBLE_DEVICES = 0 : Only devices whose index is present in the secquence are visible to HIP applications and they are enumerated in the order of secquence
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```
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### Editor Highlighting
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See the utils/vim or utils/gedit directories to add handy highlighting to hip files.
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