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Make supported targets consistent

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Add missing target names and make all parts consistent with which
targets are supported.

- Add gfx805 as a supported target.

- Add all ELF targets to genric code.

- Make offline loader match supported targets.

Change-Id: Idab4d69edc71645aecaa83aa55e29c1aeee4c1d6


[ROCm/ROCR-Runtime commit: b443397bcc]
Этот коммит содержится в:
Tony
2020-11-24 01:38:49 +00:00
родитель 62138712cf
Коммит b36aad204e
9 изменённых файлов: 170 добавлений и 128 удалений
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projects/rocr-runtime/rocrtst/suites/test_common/CMakeLists.txt
+1 -1
Просмотреть файл
@@ -41,7 +41,7 @@ set(PROJECT_NAME "rocrtst64")
project (${PROJECT_NAME})
set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031")
set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031")
#
# Currently support for Windows platform is not present
projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp
+11 -1
Просмотреть файл
@@ -1847,7 +1847,13 @@ static std::string ConvertOldTargetNameToNew(
// FIXME #1: Should 9:0:3 be completely (loader, sc, etc.) removed?
// FIXME #2: What does PAL do with respect to boltzmann/usual fiji/tonga?
if (OldName == "AMD:AMDGPU:7:0:0")
if (OldName == "AMD:AMDGPU:6:0:0")
NewName = "amdgcn-amd-amdhsa--gfx600";
else if (OldName == "AMD:AMDGPU:6:0:1")
NewName = "amdgcn-amd-amdhsa--gfx601";
else if (OldName == "AMD:AMDGPU:6:0:2")
NewName = "amdgcn-amd-amdhsa--gfx602";
else if (OldName == "AMD:AMDGPU:7:0:0")
NewName = "amdgcn-amd-amdhsa--gfx700";
else if (OldName == "AMD:AMDGPU:7:0:1")
NewName = "amdgcn-amd-amdhsa--gfx701";
@@ -1857,6 +1863,8 @@ static std::string ConvertOldTargetNameToNew(
NewName = "amdgcn-amd-amdhsa--gfx703";
else if (OldName == "AMD:AMDGPU:7:0:4")
NewName = "amdgcn-amd-amdhsa--gfx704";
else if (OldName == "AMD:AMDGPU:7:0:5")
NewName = "amdgcn-amd-amdhsa--gfx705";
else if (OldName == "AMD:AMDGPU:8:0:0")
NewName = "amdgcn-amd-amdhsa--gfx800";
else if (OldName == "AMD:AMDGPU:8:0:1") {
@@ -1869,6 +1877,8 @@ static std::string ConvertOldTargetNameToNew(
NewName = "amdgcn-amd-amdhsa--gfx803";
else if (OldName == "AMD:AMDGPU:8:0:4")
NewName = "amdgcn-amd-amdhsa--gfx804";
else if (OldName == "AMD:AMDGPU:8:0:5")
NewName = "amdgcn-amd-amdhsa--gfx805";
else if (OldName == "AMD:AMDGPU:8:1:0") {
NewName = "amdgcn-amd-amdhsa--gfx810";
xnack_supported = true;
projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp
+52 -51
Просмотреть файл
@@ -231,7 +231,7 @@ const IsaRegistry::IsaMap IsaRegistry::supported_isas_ =
IsaRegistry::GetSupportedIsas();
const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() {
#define ISAREG_ENTRY_GEN(maj, min, stp, sramecc, xnack) \
#define ISAREG_ENTRY_GEN(name, maj, min, stp, sramecc, xnack) \
Isa amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack; \
amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.version_ = Isa::Version(maj, min, stp); \
amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.sramecc_ = sramecc; \
@@ -246,56 +246,57 @@ const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() {
IsaFeature disabled = IsaFeature::Disabled;
IsaFeature enabled = IsaFeature::Enabled;
// Version SRAMECC XNACK
ISAREG_ENTRY_GEN(7, 0, 0, unsupported, unsupported)
ISAREG_ENTRY_GEN(7, 0, 1, unsupported, unsupported)
ISAREG_ENTRY_GEN(7, 0, 2, unsupported, unsupported)
ISAREG_ENTRY_GEN(8, 0, 1, unsupported, any)
ISAREG_ENTRY_GEN(8, 0, 1, unsupported, disabled)
ISAREG_ENTRY_GEN(8, 0, 1, unsupported, enabled)
ISAREG_ENTRY_GEN(8, 0, 2, unsupported, unsupported)
ISAREG_ENTRY_GEN(8, 0, 3, unsupported, unsupported)
ISAREG_ENTRY_GEN(8, 1, 0, unsupported, any)
ISAREG_ENTRY_GEN(8, 1, 0, unsupported, disabled)
ISAREG_ENTRY_GEN(8, 1, 0, unsupported, enabled)
ISAREG_ENTRY_GEN(9, 0, 0, unsupported, any)
ISAREG_ENTRY_GEN(9, 0, 0, unsupported, disabled)
ISAREG_ENTRY_GEN(9, 0, 0, unsupported, enabled)
ISAREG_ENTRY_GEN(9, 0, 2, unsupported, any)
ISAREG_ENTRY_GEN(9, 0, 2, unsupported, disabled)
ISAREG_ENTRY_GEN(9, 0, 2, unsupported, enabled)
ISAREG_ENTRY_GEN(9, 0, 4, unsupported, any)
ISAREG_ENTRY_GEN(9, 0, 4, unsupported, disabled)
ISAREG_ENTRY_GEN(9, 0, 4, unsupported, enabled)
ISAREG_ENTRY_GEN(9, 0, 6, any, any)
ISAREG_ENTRY_GEN(9, 0, 6, any, disabled)
ISAREG_ENTRY_GEN(9, 0, 6, any, enabled)
ISAREG_ENTRY_GEN(9, 0, 6, disabled, any)
ISAREG_ENTRY_GEN(9, 0, 6, enabled, any)
ISAREG_ENTRY_GEN(9, 0, 6, disabled, disabled)
ISAREG_ENTRY_GEN(9, 0, 6, disabled, enabled)
ISAREG_ENTRY_GEN(9, 0, 6, enabled, disabled)
ISAREG_ENTRY_GEN(9, 0, 6, enabled, enabled)
ISAREG_ENTRY_GEN(9, 0, 8, any, any)
ISAREG_ENTRY_GEN(9, 0, 8, any, disabled)
ISAREG_ENTRY_GEN(9, 0, 8, any, enabled)
ISAREG_ENTRY_GEN(9, 0, 8, disabled, any)
ISAREG_ENTRY_GEN(9, 0, 8, enabled, any)
ISAREG_ENTRY_GEN(9, 0, 8, disabled, disabled)
ISAREG_ENTRY_GEN(9, 0, 8, disabled, enabled)
ISAREG_ENTRY_GEN(9, 0, 8, enabled, disabled)
ISAREG_ENTRY_GEN(9, 0, 8, enabled, enabled)
ISAREG_ENTRY_GEN(10, 1, 0, unsupported, any)
ISAREG_ENTRY_GEN(10, 1, 0, unsupported, disabled)
ISAREG_ENTRY_GEN(10, 1, 0, unsupported, enabled)
ISAREG_ENTRY_GEN(10, 1, 1, unsupported, any)
ISAREG_ENTRY_GEN(10, 1, 1, unsupported, disabled)
ISAREG_ENTRY_GEN(10, 1, 1, unsupported, enabled)
ISAREG_ENTRY_GEN(10, 1, 2, unsupported, any)
ISAREG_ENTRY_GEN(10, 1, 2, unsupported, disabled)
ISAREG_ENTRY_GEN(10, 1, 2, unsupported, enabled)
ISAREG_ENTRY_GEN(10, 3, 0, unsupported, unsupported)
ISAREG_ENTRY_GEN(10, 3, 1, unsupported, unsupported)
// Target ID Version SRAMECC XNACK
ISAREG_ENTRY_GEN("gfx700", 7, 0, 0, unsupported, unsupported)
ISAREG_ENTRY_GEN("gfx701", 7, 0, 1, unsupported, unsupported)
ISAREG_ENTRY_GEN("gfx702", 7, 0, 2, unsupported, unsupported)
ISAREG_ENTRY_GEN("gfx801", 8, 0, 1, unsupported, any)
ISAREG_ENTRY_GEN("gfx801:xnack-", 8, 0, 1, unsupported, disabled)
ISAREG_ENTRY_GEN("gfx801:xnack+", 8, 0, 1, unsupported, enabled)
ISAREG_ENTRY_GEN("gfx802", 8, 0, 2, unsupported, unsupported)
ISAREG_ENTRY_GEN("gfx803", 8, 0, 3, unsupported, unsupported)
ISAREG_ENTRY_GEN("gfx805", 8, 0, 5, unsupported, unsupported)
ISAREG_ENTRY_GEN("gfx810", 8, 1, 0, unsupported, any)
ISAREG_ENTRY_GEN("gfx810:xnack-", 8, 1, 0, unsupported, disabled)
ISAREG_ENTRY_GEN("gfx810:xnack+", 8, 1, 0, unsupported, enabled)
ISAREG_ENTRY_GEN("gfx900", 9, 0, 0, unsupported, any)
ISAREG_ENTRY_GEN("gfx900:xnack-", 9, 0, 0, unsupported, disabled)
ISAREG_ENTRY_GEN("gfx900:xnack+", 9, 0, 0, unsupported, enabled)
ISAREG_ENTRY_GEN("gfx902", 9, 0, 2, unsupported, any)
ISAREG_ENTRY_GEN("gfx902:xnack-", 9, 0, 2, unsupported, disabled)
ISAREG_ENTRY_GEN("gfx900:xnack+", 9, 0, 2, unsupported, enabled)
ISAREG_ENTRY_GEN("gfx904", 9, 0, 4, unsupported, any)
ISAREG_ENTRY_GEN("gfx904:xnack-", 9, 0, 4, unsupported, disabled)
ISAREG_ENTRY_GEN("gfx904:xnack+", 9, 0, 4, unsupported, enabled)
ISAREG_ENTRY_GEN("gfx906", 9, 0, 6, any, any)
ISAREG_ENTRY_GEN("gfx906:xnack-", 9, 0, 6, any, disabled)
ISAREG_ENTRY_GEN("gfx906:xnack+", 9, 0, 6, any, enabled)
ISAREG_ENTRY_GEN("gfx906:sramecc-", 9, 0, 6, disabled, any)
ISAREG_ENTRY_GEN("gfx906:sramecc+", 9, 0, 6, enabled, any)
ISAREG_ENTRY_GEN("gfx906:sramecc-:xnack-", 9, 0, 6, disabled, disabled)
ISAREG_ENTRY_GEN("gfx906:sramecc-:xnack+", 9, 0, 6, disabled, enabled)
ISAREG_ENTRY_GEN("gfx906:sramecc+:xnack-", 9, 0, 6, enabled, disabled)
ISAREG_ENTRY_GEN("gfx906:sramecc+:xnack+", 9, 0, 6, enabled, enabled)
ISAREG_ENTRY_GEN("gfx908", 9, 0, 8, any, any)
ISAREG_ENTRY_GEN("gfx908:xnack-", 9, 0, 8, any, disabled)
ISAREG_ENTRY_GEN("gfx908:xnack+", 9, 0, 8, any, enabled)
ISAREG_ENTRY_GEN("gfx908:sramecc-", 9, 0, 8, disabled, any)
ISAREG_ENTRY_GEN("gfx908:sramecc+", 9, 0, 8, enabled, any)
ISAREG_ENTRY_GEN("gfx908:sramecc-:xnack-", 9, 0, 8, disabled, disabled)
ISAREG_ENTRY_GEN("gfx908:sramecc+:xnack+", 9, 0, 8, disabled, enabled)
ISAREG_ENTRY_GEN("gfx908:sramecc-:xnack-", 9, 0, 8, enabled, disabled)
ISAREG_ENTRY_GEN("gfx908:sramecc+:xnack+", 9, 0, 8, enabled, enabled)
ISAREG_ENTRY_GEN("gfx1010", 10, 1, 0, unsupported, any)
ISAREG_ENTRY_GEN("gfx1010:xnack-", 10, 1, 0, unsupported, disabled)
ISAREG_ENTRY_GEN("gfx1010:xnack+", 10, 1, 0, unsupported, enabled)
ISAREG_ENTRY_GEN("gfx1011", 10, 1, 1, unsupported, any)
ISAREG_ENTRY_GEN("gfx1011:xnack-", 10, 1, 1, unsupported, disabled)
ISAREG_ENTRY_GEN("gfx1011:xnack+", 10, 1, 1, unsupported, enabled)
ISAREG_ENTRY_GEN("gfx1012", 10, 1, 2, unsupported, any)
ISAREG_ENTRY_GEN("gfx1012:xnack-", 10, 1, 2, unsupported, disabled)
ISAREG_ENTRY_GEN("gfx1012:xnack+", 10, 1, 2, unsupported, enabled)
ISAREG_ENTRY_GEN("gfx1030", 10, 3, 0, unsupported, unsupported)
ISAREG_ENTRY_GEN("gfx1031", 10, 3, 1, unsupported, unsupported)
#undef ISAREG_ENTRY_GEN
return supported_isas;
}
projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp
+22 -41
Просмотреть файл
@@ -75,6 +75,7 @@ extern uint8_t ocl_blit_object_gfx702[];
extern uint8_t ocl_blit_object_gfx801[];
extern uint8_t ocl_blit_object_gfx802[];
extern uint8_t ocl_blit_object_gfx803[];
extern uint8_t ocl_blit_object_gfx805[];
extern uint8_t ocl_blit_object_gfx810[];
extern uint8_t ocl_blit_object_gfx900[];
extern uint8_t ocl_blit_object_gfx902[];
@@ -959,65 +960,45 @@ hsa_status_t BlitKernel::LaunchKernel(BlitQueue& blit_queue,
hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name,
uint8_t** blit_code_object) {
if (strncmp(agent_name, "gfx", 3) != 0) {
return HSA_STATUS_ERROR_INVALID_ISA_NAME;
}
std::string sname(agent_name);
uint64_t target_name = atoi(&agent_name[3]);
switch (target_name) {
case 700:
if (sname == "gfx700") {
*blit_code_object = ocl_blit_object_gfx700;
break;
case 701:
} else if (sname == "gfx701") {
*blit_code_object = ocl_blit_object_gfx701;
break;
case 702:
} else if (sname == "gfx702") {
*blit_code_object = ocl_blit_object_gfx702;
break;
case 801:
} else if (sname == "gfx801") {
*blit_code_object = ocl_blit_object_gfx801;
break;
case 802:
} else if (sname == "gfx802") {
*blit_code_object = ocl_blit_object_gfx802;
break;
case 803:
} else if (sname == "gfx803") {
*blit_code_object = ocl_blit_object_gfx803;
break;
case 810:
} else if (sname == "gfx805") {
*blit_code_object = ocl_blit_object_gfx805;
} else if (sname == "gfx810") {
*blit_code_object = ocl_blit_object_gfx810;
break;
case 900:
} else if (sname == "gfx900") {
*blit_code_object = ocl_blit_object_gfx900;
break;
case 902:
} else if (sname == "gfx902") {
*blit_code_object = ocl_blit_object_gfx902;
break;
case 904:
} else if (sname == "gfx904") {
*blit_code_object = ocl_blit_object_gfx904;
break;
case 906:
} else if (sname == "gfx906") {
*blit_code_object = ocl_blit_object_gfx906;
break;
case 908:
} else if (sname == "gfx908") {
*blit_code_object = ocl_blit_object_gfx908;
break;
case 1010:
} else if (sname == "gfx1010") {
*blit_code_object = ocl_blit_object_gfx1010;
break;
case 1011:
} else if (sname == "gfx1011") {
*blit_code_object = ocl_blit_object_gfx1011;
break;
case 1012:
} else if (sname == "gfx1012") {
*blit_code_object = ocl_blit_object_gfx1012;
break;
case 1030:
} else if (sname == "gfx1030") {
*blit_code_object = ocl_blit_object_gfx1030;
break;
case 1031:
} else if (sname == "gfx1031") {
*blit_code_object = ocl_blit_object_gfx1031;
break;
default:
} else {
return HSA_STATUS_ERROR_INVALID_ISA_NAME;
}
projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/CMakeLists.txt
+1 -1
Просмотреть файл
@@ -69,7 +69,7 @@ endif()
# Determine the target devices if not specified
if (NOT DEFINED TARGET_DEVICES)
set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031")
set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031")
endif()
set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE )
projects/rocr-runtime/runtime/hsa-runtime/inc/amd_hsa_elf.h
+34 -24
Просмотреть файл
@@ -85,30 +85,40 @@ enum : unsigned {
// Not specified processor.
EF_AMDGPU_MACH_NONE = 0x000,
// AMDGCN GFX7.
EF_AMDGPU_MACH_AMDGCN_GFX700 = 0x022,
EF_AMDGPU_MACH_AMDGCN_GFX701 = 0x023,
EF_AMDGPU_MACH_AMDGCN_GFX702 = 0x024,
EF_AMDGPU_MACH_AMDGCN_GFX703 = 0x025,
EF_AMDGPU_MACH_AMDGCN_GFX704 = 0x026,
// AMDGCN GFX8.
EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028,
EF_AMDGPU_MACH_AMDGCN_GFX802 = 0x029,
EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a,
EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b,
// AMDGCN GFX9.
EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d,
EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e,
EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030,
EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
// AMDGCN GFX10.
EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034,
EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037,
// AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_GFX600 = 0x020,
EF_AMDGPU_MACH_AMDGCN_GFX601 = 0x021,
EF_AMDGPU_MACH_AMDGCN_GFX700 = 0x022,
EF_AMDGPU_MACH_AMDGCN_GFX701 = 0x023,
EF_AMDGPU_MACH_AMDGCN_GFX702 = 0x024,
EF_AMDGPU_MACH_AMDGCN_GFX703 = 0x025,
EF_AMDGPU_MACH_AMDGCN_GFX704 = 0x026,
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X27 = 0x027,
EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028,
EF_AMDGPU_MACH_AMDGCN_GFX802 = 0x029,
EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a,
EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b,
EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d,
EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e,
EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030,
EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
EF_AMDGPU_MACH_AMDGCN_GFX90C = 0x032,
EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034,
EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037,
EF_AMDGPU_MACH_AMDGCN_GFX1032 = 0x038,
EF_AMDGPU_MACH_AMDGCN_GFX1033 = 0x039,
EF_AMDGPU_MACH_AMDGCN_GFX602 = 0x03a,
EF_AMDGPU_MACH_AMDGCN_GFX705 = 0x03b,
EF_AMDGPU_MACH_AMDGCN_GFX805 = 0x03c,
// First/last AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX805,
// Indicates if the "xnack" target feature is enabled for all code contained
// in the object.
projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
+20 -2
Просмотреть файл
@@ -549,25 +549,33 @@ namespace code {
// TODO: Move isa registry into the loader.
static bool GetMachInfo(unsigned mach, std::string &name, bool &sramecc_supported, bool &xnack_supported) {
switch (mach) {
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700: name = "gfx700"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600: name = "gfx600"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601: name = "gfx601"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX602: name = "gfx602"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701: name = "gfx701"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702: name = "gfx702"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703: name = "gfx703"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704: name = "gfx704"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX705: name = "gfx705"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801: name = "gfx801"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802: name = "gfx802"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803: name = "gfx803"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX805: name = "gfx805"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810: name = "gfx810"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900: name = "gfx900"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902: name = "gfx902"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904: name = "gfx904"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906: name = "gfx906"; xnack_supported = true; sramecc_supported = true; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX908: name = "gfx908"; xnack_supported = true; sramecc_supported = true; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909: name = "gfx909"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C: name = "gfx90c"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010: name = "gfx1010"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011: name = "gfx1011"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: name = "gfx1012"; xnack_supported = true; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030: name = "gfx1030"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: name = "gfx1031"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: name = "gfx1032"; xnack_supported = false; sramecc_supported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033: name = "gfx1033"; xnack_supported = false; sramecc_supported = false; break;
default: return false;
}
return true;
@@ -578,7 +586,13 @@ namespace code {
assert(!old_name.empty() && "Expecting non-empty old name");
unsigned mach = 0;
if (old_name == "AMD:AMDGPU:7:0:0")
if (old_name == "AMD:AMDGPU:6:0:0")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX600;
else if (old_name == "AMD:AMDGPU:6:0:1")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX601;
else if (old_name == "AMD:AMDGPU:6:0:2")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX602;
else if (old_name == "AMD:AMDGPU:7:0:0")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX700;
else if (old_name == "AMD:AMDGPU:7:0:1")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX701;
@@ -588,12 +602,16 @@ namespace code {
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX703;
else if (old_name == "AMD:AMDGPU:7:0:4")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX704;
else if (old_name == "AMD:AMDGPU:7:0:5")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX705;
else if (old_name == "AMD:AMDGPU:8:0:1")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX801;
else if (old_name == "AMD:AMDGPU:8:0:2")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX802;
else if (old_name == "AMD:AMDGPU:8:0:3")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX803;
else if (old_name == "AMD:AMDGPU:8:0:5")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX805;
else if (old_name == "AMD:AMDGPU:8:1:0")
mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX810;
else if (old_name == "AMD:AMDGPU:9:0:0" || old_name == "AMD:AMDGPU:9:0:1")
projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp
+26 -5
Просмотреть файл
@@ -82,16 +82,16 @@ namespace loader {
invalid.handle = 0;
gfx700.handle = 700;
gfx701.handle = 701;
gfx800.handle = 800;
gfx702.handle = 702;
gfx801.handle = 801;
gfx802.handle = 802;
gfx803.handle = 803;
gfx804.handle = 804;
gfx805.handle = 805;
gfx810.handle = 810;
gfx900.handle = 900;
gfx901.handle = 901;
gfx902.handle = 902;
gfx903.handle = 903;
gfx904.handle = 904;
gfx906.handle = 906;
gfx908.handle = 908;
gfx1010.handle = 1010;
gfx1011.handle = 1011;
@@ -107,6 +107,14 @@ namespace loader {
return gfx700;
} else if (sname == "AMD:AMDGPU:7:0:1") {
return gfx701;
} else if (sname == "AMD:AMDGPU:7:0:2") {
return gfx702;
} else if (sname == "AMD:AMDGPU:7:0:3") {
return gfx703;
} else if (sname == "AMD:AMDGPU:7:0:4") {
return gfx704;
} else if (sname == "AMD:AMDGPU:7:0:5") {
return gfx705;
} else if (sname == "AMD:AMDGPU:8:0:0") {
return gfx800;
} else if (sname == "AMD:AMDGPU:8:0:1") {
@@ -117,6 +125,8 @@ namespace loader {
return gfx803;
} else if (sname == "AMD:AMDGPU:8:0:4") {
return gfx804;
} else if (sname == "AMD:AMDGPU:8:0:5") {
return gfx805;
} else if (sname == "AMD:AMDGPU:8:1:0") {
return gfx810;
} else if (sname == "AMD:AMDGPU:9:0:0") {
@@ -126,7 +136,15 @@ namespace loader {
} else if (sname == "AMD:AMDGPU:9:0:2") {
return gfx902;
} else if (sname == "AMD:AMDGPU:9:0:3") {
return gfx903;
return gfx902;
} else if (sname == "AMD:AMDGPU:9:0:4") {
return gfx904;
} else if (sname == "AMD:AMDGPU:9:0:5") {
return gfx904;
} else if (sname == "AMD:AMDGPU:9:0:6") {
return gfx906;
} else if (sname == "AMD:AMDGPU:9:0:7") {
return gfx906;
} else if (sname == "AMD:AMDGPU:9:0:8") {
return gfx908;
} else if (sname == "AMD:AMDGPU:10:1:0") {
@@ -141,6 +159,9 @@ namespace loader {
return gfx1031;
}
// The offline loader only supports code object v2 which only supports
// asics up to gfx906. Do NOT add handling of new asics into this
// if-else-if* block.
assert(0);
return invalid;
}
projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp
+3 -2
Просмотреть файл
@@ -55,8 +55,9 @@ namespace loader {
class OfflineLoaderContext : public amd::hsa::loader::Context {
private:
hsa_isa_t invalid;
hsa_isa_t gfx700, gfx701, gfx800, gfx801, gfx802, gfx803, gfx804, gfx810;
hsa_isa_t gfx900, gfx901, gfx902, gfx903, gfx908;
hsa_isa_t gfx700, gfx701, gfx702, gfx703, gfx704, gfx705;
hsa_isa_t gfx800, gfx801, gfx802, gfx803, gfx804, gfx805, gfx810;
hsa_isa_t gfx900, gfx901, gfx902, gfx904, gfx906, gfx908;
hsa_isa_t gfx1010, gfx1011, gfx1012, gfx1030, gfx1031;
std::ostream& out;
typedef std::set<void*> PointerSet;