Workaround for non cached memory issue on gfx801 A0
Signed-off-by: Ben Goz <ben.goz@amd.com>
Adjust to new ioctl format
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
[ROCm/ROCR-Runtime commit: 402ff3f881]
This commit is contained in:
zatwierdzone przez
Oded Gabbay
rodzic
75895e0f5e
commit
b494094790
@@ -286,7 +286,13 @@ struct kfd_ioctl_open_graphic_handle_args {
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#define AMDKFD_IOC_OPEN_GRAPHIC_HANDLE \
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AMDKFD_IOWR(0x13, struct kfd_ioctl_open_graphic_handle_args)
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#define AMDKFD_IOC_NC_PAGE_ALLOC \
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AMDKFD_IOWR(0x14, unsigned long)
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#define AMDKFD_IOC_NC_PAGE_FREE \
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AMDKFD_IOWR(0x15, unsigned long)
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#define AMDKFD_COMMAND_START 0x01
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#define AMDKFD_COMMAND_END 0x14
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#define AMDKFD_COMMAND_END 0x16
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#endif
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@@ -94,7 +94,7 @@ struct queue
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{
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uint32_t queue_id;
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uint32_t wptr;
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uint32_t rptr;
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uint32_t *rptr;
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void *eop_buffer;
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void *ctx_save_restore;
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};
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@@ -108,6 +108,29 @@ struct process_doorbells
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struct process_doorbells doorbells[] = {[0 ... (NUM_OF_SUPPORTED_GPUS-1)] = {.need_mmap = true, .doorbells = NULL, .doorbells_mutex = PTHREAD_MUTEX_INITIALIZER}};
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static uint32_t *nc_rptr_page = NULL;
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static void* alloc_nc_page(void)
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{
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void *ptr;
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if (nc_rptr_page)
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return nc_rptr_page;
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if (kmtIoctl(kfd_fd, AMDKFD_IOC_NC_PAGE_ALLOC, &ptr) == 0) {
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nc_rptr_page = ptr;
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return ptr;
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}
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return NULL;
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}
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static void free_nc_page(void *page_addr)
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{
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if (page_addr)
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if (kmtIoctl(kfd_fd, AMDKFD_IOC_NC_PAGE_FREE, page_addr) == 0)
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page_addr = NULL;
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}
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static struct device_info *get_device_info_by_dev_id(uint16_t dev_id)
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{
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int i = 0;
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@@ -227,10 +250,18 @@ hsaKmtCreateQueue(
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default: free_queue(q); return HSAKMT_STATUS_INVALID_PARAMETER;
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}
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if (Type != HSA_QUEUE_COMPUTE_AQL)
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{
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if (Type != HSA_QUEUE_COMPUTE_AQL) {
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QueueResource->QueueRptrValue = (uintptr_t)&q->rptr;
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QueueResource->QueueWptrValue = (uintptr_t)&q->wptr;
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/* CZ A0 workaround */
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if (dev_info->eop_buffer_size > 0) {
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if (alloc_nc_page() == NULL) {
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free_queue(q);
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return HSAKMT_STATUS_NO_MEMORY;
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}
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QueueResource->Queue_read_ptr = (HSAuint32 *)nc_rptr_page;
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}
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}
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args.read_pointer_address = QueueResource->QueueRptrValue;
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@@ -249,6 +280,13 @@ hsaKmtCreateQueue(
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}
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q->queue_id = args.queue_id;
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if (Type != HSA_QUEUE_COMPUTE_AQL &&
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dev_info->eop_buffer_size > 0)
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{
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q->rptr = &nc_rptr_page[args.queue_id];
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QueueResource->Queue_read_ptr = (HSAuint32 *)&nc_rptr_page[args.queue_id];
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*q->rptr = 0;
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}
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pthread_mutex_lock(&doorbells[NodeId].doorbells_mutex);
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@@ -335,6 +373,8 @@ hsaKmtDestroyQueue(
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}
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else
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{
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if (nc_rptr_page != NULL)
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free_nc_page((void *)nc_rptr_page);
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free_queue(q);
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return HSAKMT_STATUS_SUCCESS;
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}
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