Add CI workloads for MI300A_A1 and MI300X_A1
Signed-off-by: coleramos425 <colramos@amd.com>
Этот коммит содержится в:
coleramos425 authored and Cole Ramos committed
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Коммит
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1580 files changed
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Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
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0,11995,1,146393,146393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,202500.0,202500.0,16384.0,65536.0,30805.0,2463572.0
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1,11995,1,146393,146393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,187357.0,187357.0,16384.0,65536.0,13173.0,1048640.0
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2,11995,1,146393,146393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,170598.0,170598.0,16384.0,65536.0,13073.0,1049580.0
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@@ -0,0 +1,4 @@
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Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
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0,11995,1,146405,146405,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,0.0,0.0,0.0
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1,11995,1,146405,146405,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,0.0,0.0,0.0
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2,11995,1,146405,146405,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,0.0,0.0,0.0
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@@ -0,0 +1,4 @@
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Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
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0,11995,1,146417,146417,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,65536.0,285822.0,22979680.0
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1,11995,1,146417,146417,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,65536.0,272096.0,21714432.0
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2,11995,1,146417,146417,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,65536.0,196758.0,15754744.0
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@@ -0,0 +1,4 @@
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Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
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0,11995,1,146430,146430,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,32768.0,534742.0,42776552.0
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1,11995,1,146430,146430,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,32768.0,417452.0,33402672.0
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2,11995,1,146430,146430,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,32768.0,420621.0,33641000.0
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@@ -0,0 +1,4 @@
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Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
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0,11995,1,146442,146442,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,220495.0,220495.0,124129.0,881980.0,16384.0,14778568.0,258251.0,0.0,59508956.0
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1,11995,1,146442,146442,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,196758.0,196758.0,115387.0,787032.0,16384.0,10783368.0,200415.0,0.0,43523016.0
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2,11995,1,146442,146442,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,179626.0,179626.0,98300.0,718504.0,16384.0,10772922.0,200430.0,0.0,43481204.0
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Omniperf version: 2.0.0
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Profiler choice: rocprofv2
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Path: /home/colramos/omniperf/tests/workloads/dispatch_0/MI300A_A1
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Target: MI300A_A1
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Command: ./tests/vcopy -n 1048576 -b 256 -i 3
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Kernel Selection: None
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Dispatch Selection: ['0']
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Hardware Blocks: All
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Collecting Performance Counters
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
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|-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
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|-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
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|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
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|-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
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|-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
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|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
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|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
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|-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
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|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
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|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
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|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
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|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
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|-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
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|-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
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|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
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|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
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|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
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|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
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|-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
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|-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
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|-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
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|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
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|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
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|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
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|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
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|-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
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|-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
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|-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
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|-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
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|-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_0.txt
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
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|-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_1.txt
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
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|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_10.txt
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
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|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
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|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
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|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
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|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
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|-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
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|-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
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|-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
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|
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_11.txt
|
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
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|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
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|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
|
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|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
|
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|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
|
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|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_12.txt
|
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|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
|
||||
|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
|
||||
|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
|
||||
|-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
|
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|
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[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_13.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_14.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_15.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_16.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_17.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_2.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_3.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_4.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_5.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_6.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_7.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_8.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_9.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/timestamps.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
|
||||
|-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
|
||||
|-> [/opt/rocm/bin/rocprofv2] Launching the kernel on the GPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
|
||||
[roofline] Roofline temporarily disabled in MI300
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_SMEM SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VMEM SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc:
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57Line truncated
|
||||
0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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||||
2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,16384.0,16384.0,9175500.0,584386.0,278528.0,0.0,0.0,98304.0,210876.0,0.0,0.0,418111.0,213344.0,32768.0,131072.0,131072.0,131072.0,0.0,0.0,524288.0,453189.0,1824.0,64,0,0,1364.0,1364.0,574484.0,682.0,1364.0,1364.0,579622.0,682.0,1364.0,1364.0,580669.0,682.0,1364.0,1364.0,582419.0,682.0,1364.0,1364.0,586675.0,682.0,1364.0,1364.0,582291.0,682.0,1364.0,1364.0,581876.0,682.0,1364.0,1364.0,577269.0,682.0,1364.0,1364.0,552301.0,682.0,1364.0,1364.0,561958.0,682.0,1364.0,1364.0,572316.0,682.0,1364.0,1364.0,571542.0,701.0,1364.0,1364.0,564945.0,682.0,1364.0,1364.0,566731.0,682.0,1364.0,1364.0,580290.0,682.0,1364.0,1364.0,575495.0,682.0,1364.0,1364.0,580199.0,682.0,1364.0,1364.0,585393.0,682.0,1364.0,1364.0,590593.0,682.0,1364.0,1364.0,589029.0,701.0,1364.0,1364.0,587243.0,682.0,1364.0,1364.0,585378.0,682.0,1364.0,1364.0,606484.0,682.0,1364.0,1364.0,604513.0,682.0,1364.0,1364.0,553769.0,682.0,1364.0,1364.0,566389.0,682.0,1364.0,1364.0,561211.0,682.0,1364.0,1364.0,570964.0,682.0,1364.0,1364.0,562812.0,682.0,1364.0,1364.0,570841.0,682.0,1364.0,1364.0,576576.0,682.0,1364.0,1364.0,570675.0,682.0,1364.0,1364.0,557389.0,682.0,1364.0,1364.0,566455.0,682.0,1364.0,1364.0,580946.0,682.0,1364.0,1364.0,579503.0,701.0,1364.0,1364.0,563432.0,682.0,1364.0,1364.0,571185.0,682.0,1364.0,1364.0,579115.0,682.0,1364.0,1364.0,575669.0,682.0,1368.0,1368.0,603227.0,684.0,1368.0,1368.0,617458.0,684.0,1368.0,1368.0,607451.0,684.0,1368.0,1368.0,618003.0,684.0,1368.0,1368.0,609256.0,684.0,1368.0,1368.0,614796.0,684.0,1368.0,1368.0,620877.0,684.0,1368.0,1368.0,611759.0,684.0,1364.0,1364.0,556056.0,682.0,1364.0,1364.0,568344.0,682.0,1364.0,1364.0,571055.0,682.0,1364.0,1364.0,580924.0,682.0,1364.0,1364.0,563296.0,682.0,1364.0,1364.0,568349.0,682.0,1364.0,1364.0,578959.0,682.0,1364.0,1364.0,569996.0,682.0,1368.0,1368.0,595992.0,684.0,1368.0,1368.0,606465.0,684.0,1368.0,1368.0,611635.0,684.0,1368.0,1368.0,610833.0,703.0,1368.0,1368.0,608668.0,684.0,1368.0,1368.0,616861.0,684.0,1368.0,1368.0,623376.0,684.0,1368.0,1368.0,623393.0,684.0,1368.0,1368.0,570624.0,684.0,1368.0,1368.0,587256.0,684.0,1368.0,1368.0,583039.0,684.0,1368.0,1368.0,590898.0,703.0,1368.0,1368.0,588931.0,684.0,1368.0,1368.0,594527.0,684.0,1368.0,1368.0,581229.0,684.0,1368.0,1368.0,568033.0,684.0,1364.0,1364.0,559156.0,682.0,1364.0,1364.0,569857.0,682.0,1364.0,1364.0,577150.0,682.0,1364.0,1364.0,578971.0,682.0,1364.0,1364.0,568307.0,682.0,1364.0,1364.0,571837.0,682.0,1364.0,1364.0,585374.0,682.0,1364.0,1364.0,573929.0,682.0,1368.0,1368.0,562282.0,684.0,1368.0,1368.0,564714.0,684.0,1368.0,1368.0,565419.0,684.0,1368.0,1368.0,562175.0,684.0,1368.0,1368.0,564280.0,684.0,1368.0,1368.0,567910.0,684.0,1368.0,1368.0,578287.0,684.0,1368.0,1368.0,576379.0,684.0,1364.0,1364.0,561616.0,682.0,1364.0,1364.0,573625.0,682.0,1364.0,1364.0,570412.0,682.0,1364.0,1364.0,577794.0,701.0,1364.0,1364.0,565925.0,682.0,1364.0,1364.0,573380.0,682.0,1364.0,1364.0,580463.0,682.0,1364.0,1364.0,569387.0,682.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,16384.0,32768.0,52700.0,65596.0,12836.0,97743.0,0.0,0.0,0.0,0.0,64,0,0,1062.0,0.0,1364.0,1114.0,0.0,1364.0,1097.0,0.0,1364.0,1066.0,0.0,1364.0,1211.0,0.0,1364.0,1163.0,0.0,1364.0,1213.0,0.0,1364.0,1161.0,0.0,1364.0,1041.0,0.0,1368.0,1029.0,0.0,1368.0,978.0,0.0,1368.0,976.0,0.0,1368.0,1008.0,0.0,1368.0,979.0,0.0,1368.0,956.0,0.0,1368.0,935.0,0.0,1368.0,1068.0,0.0,1364.0,1067.0,0.0,1364.0,1082.0,0.0,1364.0,1088.0,0.0,1364.0,1168.0,0.0,1364.0,1138.0,0.0,1364.0,1053.0,0.0,1364.0,1042.0,0.0,1364.0,1101.0,0.0,1368.0,1035.0,0.0,1368.0,912.0,0.0,1368.0,922.0,0.0,1368.0,1216.0,0.0,1368.0,1080.0,0.0,1368.0,1134.0,0.0,1368.0,1068.0,0.0,1368.0,1013.0,0.0,1364.0,1030.0,0.0,1364.0,956.0,0.0,1364.0,955.0,0.0,1364.0,1026.0,0.0,1364.0,1054.0,0.0,1364.0,990.0,0.0,1364.0,982.0,0.0,1364.0,1083.0,0.0,1364.0,1056.0,0.0,1364.0,1031.0,0.0,1364.0,1079.0,0.0,1364.0,1153.0,0.0,1364.0,1031.0,0.0,1364.0,1161.0,0.0,1364.0,1126.0,0.0,1364.0,840.0,0.0,1364.0,927.0,0.0,1364.0,805.0,0.0,1364.0,806.0,0.0,1364.0,809.0,0.0,1364.0,766.0,0.0,1364.0,855.0,0.0,1364.0,768.0,0.0,1364.0,951.0,0.0,1364.0,973.0,0.0,1364.0,906.0,0.0,1364.0,906.0,0.0,1364.0,877.0,0.0,1364.0,874.0,0.0,1364.0,898.0,0.0,1364.0,901.0,0.0,1364.0,854.0,0.0,1364.0,866.0,0.0,1364.0,873.0,0.0,1364.0,873.0,0.0,1364.0,834.0,0.0,1364.0,820.0,0.0,1364.0,992.0,0.0,1364.0,903.0,0.0,1364.0,1388.0,0.0,1368.0,1357.0,0.0,1368.0,1329.0,0.0,1368.0,1334.0,0.0,1368.0,1475.0,0.0,1368.0,1387.0,0.0,1368.0,1531.0,0.0,1368.0,1488.0,0.0,1368.0,777.0,0.0,1364.0,692.0,0.0,1364.0,755.0,0.0,1364.0,789.0,0.0,1364.0,917.0,0.0,1364.0,891.0,0.0,1364.0,968.0,0.0,1364.0,874.0,0.0,1364.0,1397.0,0.0,1368.0,1415.0,0.0,1368.0,1387.0,0.0,1368.0,1385.0,0.0,1368.0,1412.0,0.0,1368.0,1385.0,0.0,1368.0,1295.0,0.0,1368.0,1265.0,0.0,1368.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,7974.0,0.0,5892.0,577263.0,0.0,0.0,0.0,0.0,65692.0,65536.0,131072.0,0.0,0.0,524288.0,228Line truncated
|
||||
@@ -0,0 +1,2 @@
|
||||
workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
|
||||
dispatch_0,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:36:42 PM (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
|
||||
|
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
|
||||
1,11995,1,146671,146671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0
|
||||
2,11995,1,146671,146671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0
|
||||
3,11995,1,146671,146671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0
|
||||
|
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
|
||||
0,60633,1,965001,965001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,444006.0,444006.0,16384.0,65536.0,41450.0,3312160.0
|
||||
1,60633,1,965001,965001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,353019.0,353019.0,16384.0,65536.0,12985.0,1048580.0
|
||||
2,60633,1,965001,965001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,369082.0,369082.0,16384.0,65536.0,12997.0,1048580.0
|
||||
|
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
|
||||
0,60633,1,965013,965013,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,0.0,0.0,0.0
|
||||
1,60633,1,965013,965013,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,0.0,0.0,0.0
|
||||
2,60633,1,965013,965013,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,0.0,0.0,0.0
|
||||
|
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
|
||||
0,60633,1,965025,965025,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,65536.0,4261790.0,340921184.0
|
||||
1,60633,1,965025,965025,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,65536.0,3891402.0,311272176.0
|
||||
2,60633,1,965025,965025,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,65536.0,3843844.0,307502000.0
|
||||
|
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
|
||||
0,60633,1,965037,965037,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,32768.0,495237.0,39618736.0
|
||||
1,60633,1,965037,965037,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,32768.0,350935.0,28065080.0
|
||||
2,60633,1,965037,965037,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,32768.0,373947.0,29913184.0
|
||||
|
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
|
||||
0,60633,1,965049,965049,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,496419.0,496419.0,296323.0,1985676.0,16384.0,38863092.0,610251.0,0.0,155796620.0
|
||||
1,60633,1,965049,965049,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,455818.0,455818.0,270374.0,1823272.0,16384.0,33346747.0,525782.0,0.0,133745984.0
|
||||
2,60633,1,965049,965049,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,522827.0,522827.0,270535.0,2091308.0,16384.0,31719531.0,513671.0,0.0,127230640.0
|
||||
|
@@ -0,0 +1,226 @@
|
||||
Omniperf version: 2.0.0
|
||||
Profiler choice: rocprofv2
|
||||
Path: /home/colramos/omniperf/tests/workloads/dispatch_0/MI300X_A1
|
||||
Target: MI300X_A1
|
||||
Command: ./tests/vcopy -n 1048576 -b 256 -i 3
|
||||
Kernel Selection: None
|
||||
Dispatch Selection: ['0']
|
||||
Hardware Blocks: All
|
||||
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
Collecting Performance Counters
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
|
||||
|-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
|
||||
|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
|
||||
|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
|
||||
|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
|
||||
|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
|
||||
|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
|
||||
|-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
|
||||
|-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_0.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_1.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_10.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_11.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_12.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
|
||||
|-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
|
||||
|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_13.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[2]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[2]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[2]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[2]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[3]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[3]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[3]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_14.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_15.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_16.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_17.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
|
||||
|-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_2.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_3.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_4.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_5.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_6.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_7.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_8.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_9.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
|
||||
|-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
|
||||
|
||||
[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/timestamps.txt
|
||||
|-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
|
||||
|-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
|
||||
|-> [/opt/rocm/bin/rocprofv2] Launching the kernel on the GPU
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
|
||||
|-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
|
||||
[roofline] Roofline temporarily disabled in MI300
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_SMEM SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VMEM SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc: SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,5 @@
|
||||
pmc:
|
||||
|
||||
gpu:
|
||||
range: 0
|
||||
kernel:
|
||||
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLine truncated
|
||||
0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2748750.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,51277.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,49112.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,69456.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,77522.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,89525.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,101185.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,98258.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,0.0,512.0,112522.0,0.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,0.0,16384.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,0.0,87657541.0,57813693.0,185794.0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,53861.0,26865.0,2100753.0,696.0,0.0,392449.0,0.0,0.0,66160.0,131309.0,197469.0,0.0,2097152.0,1048576.0,1048576.0,2097152.0,0.0,16384.0,64,0,0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1026.0,514.0,1538.0,1536.0,1044.0,532.0,1556.0,1536.0,1026.0,514.0,1538.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1025.0,513.0,1537.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1026.0,592.0,1616.0,1616.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1025.0,513.0,1537.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1026.0,592.0,1616.0,1616.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1026.0,514.0,1538.0,1536.0,1044.0,532.0,1556.0,1536.0,1026.0,514.0,1538.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1025.0,513.0,1537.0,1536.0,1044.0,532.0,1556.0,1536.0,1025.0,513.0,1537.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1025.0,513.0,1537.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1026.0,592.0,1616.0,1616.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1025.0,513.0,1537.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1026.0,592.0,1616.0,1616.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1024.0,512.0,1536.0,1536.0,1025.0,513.0,1537.0,1536.0,1026.0,514.0,1538.0,1536.0,1044.0,532.0,15Line truncated
|
||||
1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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truncated
|
||||
2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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truncated
|
||||
@@ -0,0 +1,2 @@
|
||||
workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
|
||||
dispatch_0,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:01:22 PM (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
|
||||
|
@@ -0,0 +1,4 @@
|
||||
Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
|
||||
1,60633,1,965292,965292,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0
|
||||
2,60633,1,965292,965292,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0
|
||||
3,60633,1,965292,965292,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0
|
||||
|
Reference in new issue
Block a user