Hide L2Banks in sysinfo and update roofline module
Signed-off-by: colramos-amd <colramos@amd.com>
[ROCm/rocprofiler-compute commit: a70dc4999d]
Este cometimento está contido em:
colramos-amd
cometido por
Cole Ramos
Cole Ramos
ascendente
28202ab4de
cometimento
c27927e4ad
@@ -284,7 +284,7 @@ class webui_analysis(OmniAnalyze_Base):
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# create the loaded kernel stats
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parser.load_kernel_top(self._runs[self.dest_dir], self.dest_dir)
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# set architecture
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self.arch = self._runs[self.dest_dir].sys_info.iloc[0]['GPU']
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self.arch = self._runs[self.dest_dir].sys_info.iloc[0]['gpu_arch']
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else:
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error("Multiple runs not yet supported in GUI. Retry without --gui flag.")
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+1
-1
@@ -195,7 +195,7 @@ Panel Config:
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peak: $hbm_bw
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pop: ((100 * (AVG((128 * TCC_BUBBLE_sum +
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64 * (TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) +
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32 * TCC_EA0_RDREQ_32B_sum) / (End_Timestamp - Start_Timestamp)))) / $hbmBW)
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32 * TCC_EA0_RDREQ_32B_sum) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
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tips:
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L2-Fabric Write BW:
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value: AVG((((TCC_EA0_WRREQ_64B_sum * 64) + ((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum)
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@@ -164,9 +164,9 @@ class OmniSoC_Base():
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self._mspec.gpu_model = list(SUPPORTED_ARCHS[self._mspec.gpu_arch].keys())[0].upper()
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if self._mspec.gpu_model == "MI300":
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self._mspec.gpu_model = list(SUPPORTED_ARCHS[self._mspec.gpu_arch].values())[0][0]
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if (self._mspec.gpu_arch == "gfx942") and ("MI300A" in self._mspec._rocminfo):
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if (self._mspec.gpu_arch == "gfx942") and ("MI300A" in '\n'.join(self._mspec._rocminfo)):
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self._mspec.gpu_model = "MI300A_A1"
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if (self._mspec.gpu_arch == "gfx942") and ("MI300A" not in self._mspec._rocminfo):
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if (self._mspec.gpu_arch == "gfx942") and ("MI300A" not in '\n'.join(self._mspec._rocminfo)):
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self._mspec.gpu_model = "MI300X_A1"
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self._mspec.num_xcd = str(total_xcds(self._mspec.gpu_model, self._mspec.compute_partition))
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@@ -51,7 +51,7 @@ class gfx906_soc (OmniSoC_Base):
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)
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# Set arch specific specs
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self._mspec.L2Banks = 16
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self._mspec._l2_banks = 16
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self._mspec.lds_banks_per_cu = 32
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self._mspec.pipes_per_gpu = 4
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@@ -51,7 +51,7 @@ class gfx908_soc (OmniSoC_Base):
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)
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# Set arch specific specs
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self._mspec.L2Banks = 32
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self._mspec._l2_banks = 32
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self._mspec.lds_banks_per_cu = 32
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self._mspec.pipes_per_gpu = 4
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# --showmclkrange is broken in Mi100, hardcode freq
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@@ -57,7 +57,7 @@ class gfx90a_soc (OmniSoC_Base):
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self.roofline_obj = Roofline(args, self._mspec)
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# Set arch specific specs
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self._mspec.L2Banks = 32
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self._mspec._l2_banks = 32
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self._mspec.lds_banks_per_cu = 32
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self._mspec.pipes_per_gpu = 4
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@@ -91,4 +91,7 @@ class gfx90a_soc (OmniSoC_Base):
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super().analysis_setup()
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# configure roofline for analysis
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if roofline_parameters:
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self.roofline_obj = Roofline(self.get_args(), roofline_parameters)
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self.roofline_obj = Roofline(self.get_args(), self._mspec, roofline_parameters)
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@@ -62,7 +62,7 @@ class gfx940_soc (OmniSoC_Base):
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self.roofline_obj = Roofline(args, self._mspec)
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# Set arch specific specs
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self._mspec.L2Banks = 16
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self._mspec._l2_banks = 16
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self._mspec.lds_banks_per_cu = 32
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self._mspec.pipes_per_gpu = 4
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@@ -62,7 +62,7 @@ class gfx941_soc (OmniSoC_Base):
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self.roofline_obj = Roofline(args, self._mspec)
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# Set arch specific specs
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self._mspec.L2Banks = 16
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self._mspec._l2_banks = 16
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self._mspec.lds_banks_per_cu = 32
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self._mspec.pipes_per_gpu = 4
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@@ -62,7 +62,7 @@ class gfx942_soc (OmniSoC_Base):
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self.roofline_obj = Roofline(args, self._mspec)
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# Set arch specific specs
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self._mspec.L2Banks = 16
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self._mspec._l2_banks = 16
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self._mspec.lds_banks_per_cu = 32
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self._mspec.pipes_per_gpu = 4
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@@ -53,7 +53,7 @@ class Roofline:
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self.__ceiling_data = None
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self.__figure = go.Figure()
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# Set roofline run parameters from args
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if hasattr(self.__args, 'path'):
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if hasattr(self.__args, 'path') and not run_parameters:
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self.__run_parameters['workload_dir'] = self.__args.path
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if hasattr(self.__args, 'roof_only') and self.__args.roof_only == True:
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self.__run_parameters['is_standalone'] = True
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@@ -126,7 +126,7 @@ class MachineSpecs:
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self.cur_mclk: str = None
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self.max_waves_per_cu: str = None
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self.gpu_model: str = None
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self.L2Banks: str = None #NB: This only used in flatten_tcc_info_across_hbm_stacks()
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self._l2_banks: str = None #NB: This only used in flatten_tcc_info_across_hbm_stacks()
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self.lds_banks_per_cu: str = None
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self.sqc_per_gpu: str = None
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self.pipes_per_gpu: str = None
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@@ -143,7 +143,7 @@ class MachineSpecs:
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soc_obj = soc_class(args, self)
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# Update arch specific specs
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self.total_l2_chan: str = total_l2_banks(
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self.gpu_model, int(self.L2Banks), self.memory_partition
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self.gpu_model, int(self._l2_banks), self.memory_partition
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)
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self.hbm_bw: str = str(int(self.max_mclk) / 1000 * 32 * self.get_hbm_channels())
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@@ -234,7 +234,7 @@ def run_prof(fname, profiler_options, workload_dir, mspec):
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f = path(workload_dir + "/out/pmc_1/results_" + fbase + ".csv")
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hbm_stack_num = get_hbm_stack_num(mspec.gpu_model, mspec.memory_partition)
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df = flatten_tcc_info_across_hbm_stacks(
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f, hbm_stack_num, int(mspec.L2Banks)
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f, hbm_stack_num, int(mspec._ls_banks)
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)
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df.to_csv(f, index=False)
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