Use checkpatch.pl to fix the majority of errors. Some that remain and
will be excluded:
Use of typedefs/externs/volatile/sscanf
Lines over 80 characters

Remaining errors are due to misunderstanding the * symbol with typedefs

Also use this opportunity to spell manageable properly

Change-Id: I0b335e9cb3e1eea38bee27eaa1f582b2c9b09b38


[ROCm/ROCR-Runtime commit: b78e0e152a]
Этот коммит содержится в:
Kent Russell
2017-04-20 08:25:00 -04:00
родитель c0e1079b78
Коммит c53049ce46
15 изменённых файлов: 819 добавлений и 1108 удалений
+82 -130
Просмотреть файл
@@ -29,14 +29,14 @@
#include <string.h>
static bool *is_device_debugged;
int debug_get_reg_status(uint32_t node_id, bool* is_debugged);
int debug_get_reg_status(uint32_t node_id, bool *is_debugged);
HSAKMT_STATUS init_device_debugging_memory(unsigned int NumNodes)
{
unsigned int i;
is_device_debugged = malloc(NumNodes * sizeof(bool));
if (is_device_debugged == NULL)
if (!is_device_debugged)
return HSAKMT_STATUS_NO_MEMORY;
for (i = 0; i < NumNodes; i++)
@@ -51,17 +51,14 @@ void destroy_device_debugging_memory(void)
free(is_device_debugged);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtDbgRegister(
HSAuint32 NodeId //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtDbgRegister(HSAuint32 NodeId)
{
HSAKMT_STATUS result;
uint32_t gpu_id;
CHECK_KFD_OPEN();
if (is_device_debugged == NULL)
if (!is_device_debugged)
return HSAKMT_STATUS_NO_MEMORY;
result = validate_nodeid(NodeId, &gpu_id);
@@ -69,31 +66,28 @@ hsaKmtDbgRegister(
return result;
struct kfd_ioctl_dbg_register_args args;
memset(&args, 0, sizeof(args));
args.gpu_id = gpu_id;
long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_REGISTER, &args);
long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_REGISTER, &args);
if (err == 0)
result = HSAKMT_STATUS_SUCCESS;
else
result = HSAKMT_STATUS_ERROR;
return (result);
return result;
}
/* =============================================================================== */
HSAKMT_STATUS
HSAKMTAPI
hsaKmtDbgUnregister(
HSAuint32 NodeId //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtDbgUnregister(HSAuint32 NodeId)
{
HSAKMT_STATUS result;
uint32_t gpu_id;
HSAKMT_STATUS result;
CHECK_KFD_OPEN();
if (is_device_debugged == NULL)
if (!is_device_debugged)
return HSAKMT_STATUS_NO_MEMORY;
result = validate_nodeid(NodeId, &gpu_id);
@@ -101,28 +95,22 @@ hsaKmtDbgUnregister(
return result;
struct kfd_ioctl_dbg_unregister_args args;
memset(&args, 0, sizeof(args));
args.gpu_id = gpu_id;
long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_UNREGISTER, &args);
if (err == 0)
result = HSAKMT_STATUS_SUCCESS;
else
result = HSAKMT_STATUS_ERROR;
long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_UNREGISTER, &args);
return (result);
if (err)
return HSAKMT_STATUS_ERROR;
return HSAKMT_STATUS_SUCCESS;
}
/* =============================================================================== */
HSAKMT_STATUS
HSAKMTAPI
hsaKmtDbgWavefrontControl(
HSAuint32 NodeId, //IN
HSA_DBG_WAVEOP Operand, //IN
HSA_DBG_WAVEMODE Mode, //IN
HSAuint32 TrapId, //IN
HsaDbgWaveMessage* DbgWaveMsgRing //IN (? - see thunk API doc!)
)
HSAKMT_STATUS HSAKMTAPI hsaKmtDbgWavefrontControl(HSAuint32 NodeId,
HSA_DBG_WAVEOP Operand,
HSA_DBG_WAVEMODE Mode,
HSAuint32 TrapId,
HsaDbgWaveMessage *DbgWaveMsgRing)
{
HSAKMT_STATUS result;
uint32_t gpu_id;
@@ -136,18 +124,14 @@ hsaKmtDbgWavefrontControl(
return result;
/* Determine Size of the ioctl buffer */
/* Determine Size of the ioctl buffer */
uint32_t buff_size = sizeof(Operand) + sizeof(Mode) + sizeof(TrapId) +
sizeof(DbgWaveMsgRing->DbgWaveMsg) +
sizeof(DbgWaveMsgRing->MemoryVA) + sizeof(*args);
uint32_t buff_size = sizeof(Operand)+
sizeof(Mode) + sizeof(TrapId) +
sizeof(DbgWaveMsgRing->DbgWaveMsg)+ sizeof(DbgWaveMsgRing->MemoryVA) + sizeof(*args);
args = (struct kfd_ioctl_dbg_wave_control_args*) malloc(buff_size);
if (args == NULL)
{
args = (struct kfd_ioctl_dbg_wave_control_args *)malloc(buff_size);
if (!args)
return HSAKMT_STATUS_ERROR;
}
memset(args, 0, buff_size);
@@ -155,67 +139,53 @@ hsaKmtDbgWavefrontControl(
args->buf_size_in_bytes = buff_size;
/* increment pointer to the start of the non fixed part */
unsigned char* run_ptr = (unsigned char*)args + sizeof(*args);
unsigned char *run_ptr = (unsigned char *)args + sizeof(*args);
/* save variable content pointer for kfd */
args->content_ptr = (uint64_t)run_ptr;
/* insert items, and increment pointer accordingly */
*((HSA_DBG_WAVEOP*)run_ptr) = Operand;
*((HSA_DBG_WAVEOP *)run_ptr) = Operand;
run_ptr += sizeof(Operand);
*((HSA_DBG_WAVEMODE*)run_ptr) = Mode;
*((HSA_DBG_WAVEMODE *)run_ptr) = Mode;
run_ptr += sizeof(Mode);
*((HSAuint32*)run_ptr) = TrapId;
*((HSAuint32 *)run_ptr) = TrapId;
run_ptr += sizeof(TrapId);
*((HsaDbgWaveMessageAMD*)run_ptr) = DbgWaveMsgRing->DbgWaveMsg;
run_ptr += sizeof(DbgWaveMsgRing->DbgWaveMsg);
*((HsaDbgWaveMessageAMD *)run_ptr) = DbgWaveMsgRing->DbgWaveMsg;
run_ptr += sizeof(DbgWaveMsgRing->DbgWaveMsg);
*((void**)run_ptr) = DbgWaveMsgRing->MemoryVA;
*((void **)run_ptr) = DbgWaveMsgRing->MemoryVA;
run_ptr += sizeof(DbgWaveMsgRing->MemoryVA);
/* send to kernel */
long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_WAVE_CONTROL, args);
free (args);
free(args);
if (err == 0)
return HSAKMT_STATUS_SUCCESS;
else
if (err)
return HSAKMT_STATUS_ERROR;
return HSAKMT_STATUS_SUCCESS;
}
/* =============================================================================== */
HSAKMT_STATUS
HSAKMTAPI
hsaKmtDbgAddressWatch(
HSAuint32 NodeId, //IN
HSAuint32 NumWatchPoints, //IN
HSA_DBG_WATCH_MODE WatchMode[], //IN
void* WatchAddress[], //IN
HSAuint64 WatchMask[], //IN, optional
HsaEvent* WatchEvent[] //IN, optional
)
HSAKMT_STATUS HSAKMTAPI hsaKmtDbgAddressWatch(HSAuint32 NodeId,
HSAuint32 NumWatchPoints,
HSA_DBG_WATCH_MODE WatchMode[],
void *WatchAddress[],
HSAuint64 WatchMask[],
HsaEvent *WatchEvent[])
{
HSAKMT_STATUS result;
uint32_t gpu_id;
/* determine the size of the watch mask and event buffers
* the value is NULL if and only if no vector data should be attached
*
* the value is NULL if and only if no vector data should be attached
*/
uint32_t watch_mask_items = WatchMask[0] > 0 ? NumWatchPoints:1;
uint32_t watch_event_items = WatchEvent != NULL ? NumWatchPoints:0;
uint32_t watch_mask_items = WatchMask[0] > 0 ? NumWatchPoints:1;
uint32_t watch_event_items = WatchEvent != NULL ? NumWatchPoints:0;
struct kfd_ioctl_dbg_address_watch_args *args;
HSAuint32 i = 0;
@@ -229,23 +199,18 @@ hsaKmtDbgAddressWatch(
if (NumWatchPoints > MAX_ALLOWED_NUM_POINTS)
return HSAKMT_STATUS_INVALID_PARAMETER;
/* Size and structure of the ioctl buffer is dynamic in this case
* Here we calculate the buff size.
*/
/* Size and structure of the ioctl buffer is dynamic in this case
* Here we calculate the buff size.
*/
uint32_t buff_size = sizeof(NumWatchPoints) +
(sizeof(WatchMode[0]) + sizeof(WatchAddress[0])) *
NumWatchPoints +
watch_mask_items * sizeof(HSAuint64) +
watch_event_items * sizeof(HsaEvent *) + sizeof(*args);
uint32_t buff_size =sizeof(NumWatchPoints)+
( sizeof(WatchMode[0]) +
sizeof(WatchAddress[0]))*NumWatchPoints +
watch_mask_items*sizeof(HSAuint64) +
watch_event_items*sizeof(HsaEvent*)+
sizeof(*args);
args = (struct kfd_ioctl_dbg_address_watch_args*) malloc(buff_size);
if (args == NULL)
{
args = (struct kfd_ioctl_dbg_address_watch_args *) malloc(buff_size);
if (!args)
return HSAKMT_STATUS_ERROR;
}
memset(args, 0, buff_size);
@@ -254,64 +219,51 @@ hsaKmtDbgAddressWatch(
/* increment pointer to the start of the non fixed part */
unsigned char* run_ptr = (unsigned char*)args + sizeof(*args);
unsigned char *run_ptr = (unsigned char *)args + sizeof(*args);
/* save variable content pointer for kfd */
args->content_ptr = (uint64_t)run_ptr;
/* insert items, and increment pointer accordingly */
*((HSAuint32*)run_ptr) = NumWatchPoints;
*((HSAuint32 *)run_ptr) = NumWatchPoints;
run_ptr += sizeof(NumWatchPoints);
for (i=0; i < NumWatchPoints; i++)
{
*((HSA_DBG_WATCH_MODE*)run_ptr) = WatchMode[i];
run_ptr += sizeof(WatchMode[i]);
for (i = 0; i < NumWatchPoints; i++) {
*((HSA_DBG_WATCH_MODE *)run_ptr) = WatchMode[i];
run_ptr += sizeof(WatchMode[i]);
}
for (i=0; i < NumWatchPoints; i++)
{
*((void**)run_ptr) = WatchAddress[i];
run_ptr += sizeof(WatchAddress[i]);
for (i = 0; i < NumWatchPoints; i++) {
*((void **)run_ptr) = WatchAddress[i];
run_ptr += sizeof(WatchAddress[i]);
}
for (i=0; i < watch_mask_items; i++)
{
*((HSAuint64*)run_ptr) = WatchMask[i];
run_ptr += sizeof(WatchMask[i]);
for (i = 0; i < watch_mask_items; i++) {
*((HSAuint64 *)run_ptr) = WatchMask[i];
run_ptr += sizeof(WatchMask[i]);
}
for (i=0; i < watch_event_items; i++)
{
*((HsaEvent**)run_ptr) = WatchEvent[i];
run_ptr += sizeof(WatchEvent[i]);
for (i = 0; i < watch_event_items; i++) {
*((HsaEvent **)run_ptr) = WatchEvent[i];
run_ptr += sizeof(WatchEvent[i]);
}
/* send to kernel */
long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_ADDRESS_WATCH, args);
free (args);
free(args);
if (err == 0)
{
return HSAKMT_STATUS_SUCCESS;
}
else
{
if (err)
return HSAKMT_STATUS_ERROR;
}
return HSAKMT_STATUS_SUCCESS;
}
/* =============================================================================== */
int debug_get_reg_status(uint32_t node_id, bool* is_debugged)
int debug_get_reg_status(uint32_t node_id, bool *is_debugged)
{
*is_debugged = NULL;
if (is_device_debugged == NULL)
if (!is_device_debugged)
return -1;
else {
*is_debugged = is_device_debugged[node_id];
return 0;
}
*is_debugged = is_device_debugged[node_id];
return 0;
}
+34 -58
Просмотреть файл
@@ -47,31 +47,24 @@ static bool IsSystemEventType(HSA_EVENTTYPE type)
return (type != HSA_EVENTTYPE_SIGNAL && type != HSA_EVENTTYPE_DEBUG_EVENT);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtCreateEvent(
HsaEventDescriptor* EventDesc, //IN
bool ManualReset, //IN
bool IsSignaled, //IN
HsaEvent** Event //OUT
)
HSAKMT_STATUS HSAKMTAPI hsaKmtCreateEvent(HsaEventDescriptor *EventDesc,
bool ManualReset, bool IsSignaled,
HsaEvent **Event)
{
CHECK_KFD_OPEN();
if (EventDesc->EventType >= HSA_EVENTTYPE_MAXID)
{
return HSAKMT_STATUS_INVALID_PARAMETER;
}
HsaEvent* e = malloc(sizeof(HsaEvent));
if (e == NULL)
{
HsaEvent *e = malloc(sizeof(HsaEvent));
if (!e)
return HSAKMT_STATUS_ERROR;
}
memset(e, 0, sizeof(*e));
struct kfd_ioctl_create_event_args args;
memset(&args, 0, sizeof(args));
args.event_type = EventDesc->EventType;
@@ -81,7 +74,7 @@ hsaKmtCreateEvent(
/* dGPU code */
pthread_mutex_lock(&hsakmt_mutex);
if (is_dgpu && events_page == NULL) {
if (is_dgpu && !events_page) {
events_page = allocate_exec_aligned_memory_gpu(
KFD_SIGNAL_EVENT_LIMIT * 8, PAGE_SIZE, 0, true);
if (!events_page) {
@@ -100,7 +93,7 @@ hsaKmtCreateEvent(
e->EventId = args.event_id;
if (events_page == NULL && args.event_page_offset > 0) {
if (!events_page && args.event_page_offset > 0) {
events_page = mmap(NULL, KFD_SIGNAL_EVENT_LIMIT * 8, PROT_WRITE | PROT_READ,
MAP_SHARED, kfd_fd, args.event_page_offset);
if (events_page == MAP_FAILED) {
@@ -127,6 +120,7 @@ hsaKmtCreateEvent(
if (IsSignaled && !IsSystemEventType(e->EventData.EventType)) {
struct kfd_ioctl_set_event_args set_args;
memset(&set_args, 0, sizeof(set_args));
set_args.event_id = args.event_id;
@@ -138,11 +132,7 @@ hsaKmtCreateEvent(
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtDestroyEvent(
HsaEvent* Event //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtDestroyEvent(HsaEvent *Event)
{
CHECK_KFD_OPEN();
@@ -150,34 +140,33 @@ hsaKmtDestroyEvent(
return HSAKMT_STATUS_INVALID_HANDLE;
struct kfd_ioctl_destroy_event_args args;
memset(&args, 0, sizeof(args));
args.event_id = Event->EventId;
if (kmtIoctl(kfd_fd, AMDKFD_IOC_DESTROY_EVENT, &args) != 0) {
if (kmtIoctl(kfd_fd, AMDKFD_IOC_DESTROY_EVENT, &args) != 0)
return HSAKMT_STATUS_ERROR;
}
free(Event);
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtSetEvent(
HsaEvent* Event //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtSetEvent(HsaEvent *Event)
{
CHECK_KFD_OPEN();
if (!Event)
return HSAKMT_STATUS_INVALID_HANDLE;
/* Although the spec is doesn't say, don't allow system-defined events to be signaled. */
/* Although the spec is doesn't say, don't allow system-defined events
* to be signaled.
*/
if (IsSystemEventType(Event->EventData.EventType))
return HSAKMT_STATUS_ERROR;
struct kfd_ioctl_set_event_args args;
memset(&args, 0, sizeof(args));
args.event_id = Event->EventId;
@@ -188,22 +177,21 @@ hsaKmtSetEvent(
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtResetEvent(
HsaEvent* Event //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtResetEvent(HsaEvent *Event)
{
CHECK_KFD_OPEN();
if (!Event)
return HSAKMT_STATUS_INVALID_HANDLE;
/* Although the spec is doesn't say, don't allow system-defined events to be signaled. */
/* Although the spec is doesn't say, don't allow system-defined events
* to be signaled.
*/
if (IsSystemEventType(Event->EventData.EventType))
return HSAKMT_STATUS_ERROR;
struct kfd_ioctl_reset_event_args args;
memset(&args, 0, sizeof(args));
args.event_id = Event->EventId;
@@ -214,11 +202,7 @@ hsaKmtResetEvent(
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtQueryEventState(
HsaEvent* Event //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtQueryEventState(HsaEvent *Event)
{
CHECK_KFD_OPEN();
@@ -228,12 +212,8 @@ hsaKmtQueryEventState(
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtWaitOnEvent(
HsaEvent* Event, //IN
HSAuint32 Milliseconds //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtWaitOnEvent(HsaEvent *Event,
HSAuint32 Milliseconds)
{
if (!Event)
return HSAKMT_STATUS_INVALID_HANDLE;
@@ -241,14 +221,10 @@ hsaKmtWaitOnEvent(
return hsaKmtWaitOnMultipleEvents(&Event, 1, true, Milliseconds);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtWaitOnMultipleEvents(
HsaEvent* Events[], //IN
HSAuint32 NumEvents, //IN
bool WaitOnAll, //IN
HSAuint32 Milliseconds //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtWaitOnMultipleEvents(HsaEvent *Events[],
HSAuint32 NumEvents,
bool WaitOnAll,
HSAuint32 Milliseconds)
{
CHECK_KFD_OPEN();
@@ -256,12 +232,14 @@ hsaKmtWaitOnMultipleEvents(
return HSAKMT_STATUS_INVALID_HANDLE;
struct kfd_event_data *event_data = calloc(NumEvents, sizeof(struct kfd_event_data));
for (HSAuint32 i = 0; i < NumEvents; i++) {
event_data[i].event_id = Events[i]->EventId;
event_data[i].kfd_event_data_ext = (uint64_t)(uintptr_t)NULL;
}
struct kfd_ioctl_wait_events_args args;
memset(&args, 0, sizeof(args));
args.wait_for_all = WaitOnAll;
@@ -271,12 +249,10 @@ hsaKmtWaitOnMultipleEvents(
HSAKMT_STATUS result;
if (kmtIoctl(kfd_fd, AMDKFD_IOC_WAIT_EVENTS, &args) == -1) {
if (kmtIoctl(kfd_fd, AMDKFD_IOC_WAIT_EVENTS, &args) == -1)
result = HSAKMT_STATUS_ERROR;
}
else if (args.wait_result == KFD_IOC_WAIT_RESULT_TIMEOUT) {
else if (args.wait_result == KFD_IOC_WAIT_RESULT_TIMEOUT)
result = HSAKMT_STATUS_WAIT_TIMEOUT;
}
else {
result = HSAKMT_STATUS_SUCCESS;
for (HSAuint32 i = 0; i < NumEvents; i++) {
Разница между файлами не показана из-за своего большого размера Загрузить разницу
+15 -17
Просмотреть файл
@@ -41,27 +41,25 @@ typedef enum {
typedef struct {
aperture_type_e app_type;
uint64_t size;
void* start_address;
void *start_address;
} aperture_properties_t;
HSAKMT_STATUS fmm_init_process_apertures(unsigned int NumNodes);
void fmm_destroy_process_apertures(void);
/*
* Memory interface
*/
void* fmm_allocate_scratch(uint32_t gpu_id, uint64_t MemorySizeInBytes);
void* fmm_allocate_device(uint32_t gpu_id, uint64_t MemorySizeInBytes, HsaMemFlags flags);
void* fmm_allocate_doorbell(uint32_t gpu_id, uint64_t MemorySizeInBytes, uint64_t doorbell_offset);
void* fmm_allocate_host(uint32_t node_id, uint64_t MemorySizeInBytes,
/* Memory interface */
void *fmm_allocate_scratch(uint32_t gpu_id, uint64_t MemorySizeInBytes);
void *fmm_allocate_device(uint32_t gpu_id, uint64_t MemorySizeInBytes, HsaMemFlags flags);
void *fmm_allocate_doorbell(uint32_t gpu_id, uint64_t MemorySizeInBytes, uint64_t doorbell_offset);
void *fmm_allocate_host(uint32_t node_id, uint64_t MemorySizeInBytes,
HsaMemFlags flags);
void* fmm_open_graphic_handle(uint32_t gpu_id,
int32_t graphic_device_handle,
uint32_t graphic_handle,
uint64_t MemorySizeInBytes);
void *fmm_open_graphic_handle(uint32_t gpu_id,
int32_t graphic_device_handle,
uint32_t graphic_handle,
uint64_t MemorySizeInBytes);
void fmm_print(uint32_t node);
bool fmm_is_inside_some_aperture(void* address);
void fmm_release(void* address);
bool fmm_is_inside_some_aperture(void *address);
void fmm_release(void *address);
int fmm_map_to_gpu(void *address, uint64_t size, uint64_t *gpuvm_address);
int fmm_unmap_from_gpu(void *address);
bool fmm_get_handle(void *address, uint64_t *handle);
@@ -75,14 +73,14 @@ HSAKMT_STATUS fmm_get_aperture_base_and_limit(aperture_type_e aperture_type, HSA
HSAuint64 *aperture_base, HSAuint64 *aperture_limit);
HSAKMT_STATUS fmm_register_memory(void *address, uint64_t size_in_bytes,
uint32_t *gpu_id_array,
uint32_t gpu_id_array_size);
uint32_t *gpu_id_array,
uint32_t gpu_id_array_size);
HSAKMT_STATUS fmm_register_graphics_handle(HSAuint64 GraphicsResourceHandle,
HsaGraphicsResourceInfo *GraphicsResourceInfo,
uint32_t *gpu_id_array,
uint32_t gpu_id_array_size);
HSAKMT_STATUS fmm_deregister_memory(void *address);
HSAKMT_STATUS fmm_share_memory(void* MemoryAddress,
HSAKMT_STATUS fmm_share_memory(void *MemoryAddress,
HSAuint64 SizeInBytes,
HsaSharedMemoryHandle *SharedMemoryHandle);
HSAKMT_STATUS fmm_register_shared_memory(const HsaSharedMemoryHandle *SharedMemoryHandle,
+1 -1
Просмотреть файл
@@ -31,6 +31,6 @@ int kfd_fd;
unsigned long kfd_open_count;
unsigned long system_properties_count;
pthread_mutex_t hsakmt_mutex = PTHREAD_MUTEX_INITIALIZER;
bool is_dgpu = false;
bool is_dgpu;
int PAGE_SIZE;
int PAGE_SHIFT;
+8 -10
Просмотреть файл
@@ -3,16 +3,14 @@
#include "libhsakmt.h"
/**
* Call ioctl, restarting if it is interupted
*/
int
kmtIoctl(int fd, unsigned long request, void *arg)
/* Call ioctl, restarting if it is interrupted */
int kmtIoctl(int fd, unsigned long request, void *arg)
{
int ret;
int ret;
do {
ret = ioctl(fd, request, arg);
} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
return ret;
do {
ret = ioctl(fd, request, arg);
} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
return ret;
}
+92 -174
Просмотреть файл
@@ -34,15 +34,11 @@
#include <fcntl.h>
#include "fmm.h"
HSAKMT_STATUS
HSAKMTAPI
hsaKmtSetMemoryPolicy(
HSAuint32 Node,
HSAuint32 DefaultPolicy,
HSAuint32 AlternatePolicy,
void *MemoryAddressAlternate,
HSAuint64 MemorySizeInBytes
)
HSAKMT_STATUS HSAKMTAPI hsaKmtSetMemoryPolicy(HSAuint32 Node,
HSAuint32 DefaultPolicy,
HSAuint32 AlternatePolicy,
void *MemoryAddressAlternate,
HSAuint64 MemorySizeInBytes)
{
struct kfd_ioctl_set_memory_policy_args args;
HSAKMT_STATUS result;
@@ -54,7 +50,8 @@ hsaKmtSetMemoryPolicy(
/* This is a legacy API useful on Kaveri only. On dGPU
* the alternate aperture is setup and used
* automatically for coherent allocations. Don't let
* app override it. */
* app override it.
*/
return HSAKMT_STATUS_NOT_IMPLEMENTED;
result = validate_nodeid(Node, &gpu_id);
@@ -106,14 +103,10 @@ HSAuint32 PageSizeFromFlags(unsigned int pageSizeFlags)
}
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtAllocMemory(
HSAuint32 PreferredNode, /* IN */
HSAuint64 SizeInBytes, /* IN (multiple of page size) */
HsaMemFlags MemFlags, /* IN */
void **MemoryAddress /* OUT (page-aligned) */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtAllocMemory(HSAuint32 PreferredNode,
HSAuint64 SizeInBytes,
HsaMemFlags MemFlags,
void **MemoryAddress)
{
HSAKMT_STATUS result;
uint32_t gpu_id;
@@ -127,16 +120,14 @@ hsaKmtAllocMemory(
page_size = PageSizeFromFlags(MemFlags.ui32.PageSize);
if ((!MemoryAddress) || (!SizeInBytes) ||
(SizeInBytes & (page_size-1))) {
if (!MemoryAddress || !SizeInBytes || (SizeInBytes & (page_size-1)))
return HSAKMT_STATUS_INVALID_PARAMETER;
}
if (gpu_id == 0 && !MemFlags.ui32.Scratch) {
*MemoryAddress = fmm_allocate_host(PreferredNode, SizeInBytes,
MemFlags);
if (*MemoryAddress == NULL)
if (!(*MemoryAddress))
return HSAKMT_STATUS_ERROR;
return HSAKMT_STATUS_SUCCESS;
@@ -145,27 +136,28 @@ hsaKmtAllocMemory(
if (gpu_id && MemFlags.ui32.NonPaged && !MemFlags.ui32.Scratch) {
*MemoryAddress = fmm_allocate_device(gpu_id, SizeInBytes, MemFlags);
if (*MemoryAddress == NULL)
if (!(*MemoryAddress))
return HSAKMT_STATUS_NO_MEMORY;
return HSAKMT_STATUS_SUCCESS;
}
if (MemFlags.ui32.Scratch ) {
if (MemFlags.ui32.Scratch) {
*MemoryAddress = fmm_allocate_scratch(gpu_id, SizeInBytes);
if (*MemoryAddress == NULL)
if (!(*MemoryAddress))
return HSAKMT_STATUS_NO_MEMORY;
return HSAKMT_STATUS_SUCCESS;
}
/* Backwards compatibility hack: Allocate system memory if app
* asks for paged memory from a GPU node. */
* asks for paged memory from a GPU node.
*/
if (gpu_id && !MemFlags.ui32.NonPaged && !MemFlags.ui32.Scratch) {
*MemoryAddress = fmm_allocate_host(PreferredNode, SizeInBytes,
MemFlags);
if (*MemoryAddress == NULL)
if (!(*MemoryAddress))
return HSAKMT_STATUS_ERROR;
return HSAKMT_STATUS_SUCCESS;
@@ -174,16 +166,12 @@ hsaKmtAllocMemory(
return HSAKMT_STATUS_INVALID_PARAMETER;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtFreeMemory(
void *MemoryAddress, /* IN (page-aligned) */
HSAuint64 SizeInBytes /* IN */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtFreeMemory(void *MemoryAddress,
HSAuint64 SizeInBytes)
{
CHECK_KFD_OPEN();
if (MemoryAddress == NULL) {
if (!MemoryAddress) {
fprintf(stderr, "FIXME: freeing NULL pointer\n");
return HSAKMT_STATUS_ERROR;
}
@@ -192,12 +180,8 @@ hsaKmtFreeMemory(
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtRegisterMemory(
void *MemoryAddress, /* IN (cache-aligned) */
HSAuint64 MemorySizeInBytes /* IN (cache-aligned) */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtRegisterMemory(void *MemoryAddress,
HSAuint64 MemorySizeInBytes)
{
CHECK_KFD_OPEN();
@@ -206,17 +190,13 @@ hsaKmtRegisterMemory(
return HSAKMT_STATUS_SUCCESS;
return fmm_register_memory(MemoryAddress, MemorySizeInBytes,
NULL, 0);
NULL, 0);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtRegisterMemoryToNodes(
void *MemoryAddress, /* IN (cache-aligned) */
HSAuint64 MemorySizeInBytes, /* IN (cache-aligned) */
HSAuint64 NumberOfNodes, /* IN */
HSAuint32* NodeArray /* IN */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtRegisterMemoryToNodes(void *MemoryAddress,
HSAuint64 MemorySizeInBytes,
HSAuint64 NumberOfNodes,
HSAuint32 *NodeArray)
{
CHECK_KFD_OPEN();
uint32_t *gpu_id_array;
@@ -240,14 +220,10 @@ hsaKmtRegisterMemoryToNodes(
return ret;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtRegisterGraphicsHandleToNodes(
HSAuint64 GraphicsResourceHandle, /* IN */
HsaGraphicsResourceInfo *GraphicsResourceInfo, /* OUT */
HSAuint64 NumberOfNodes, /* IN */
HSAuint32* NodeArray /* IN */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtRegisterGraphicsHandleToNodes(HSAuint64 GraphicsResourceHandle,
HsaGraphicsResourceInfo *GraphicsResourceInfo,
HSAuint64 NumberOfNodes,
HSAuint32 *NodeArray)
{
CHECK_KFD_OPEN();
uint32_t *gpu_id_array;
@@ -259,7 +235,7 @@ hsaKmtRegisterGraphicsHandleToNodes(
if (ret == HSAKMT_STATUS_SUCCESS) {
ret = fmm_register_graphics_handle(
GraphicsResourceHandle, GraphicsResourceInfo,
gpu_id_array,NumberOfNodes*sizeof(uint32_t));
gpu_id_array, NumberOfNodes * sizeof(uint32_t));
if (ret != HSAKMT_STATUS_SUCCESS)
free(gpu_id_array);
}
@@ -267,13 +243,9 @@ hsaKmtRegisterGraphicsHandleToNodes(
return ret;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtShareMemory(
void *MemoryAddress, /* IN */
HSAuint64 SizeInBytes, /* IN */
HsaSharedMemoryHandle *SharedMemoryHandle /* OUT */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtShareMemory(void *MemoryAddress,
HSAuint64 SizeInBytes,
HsaSharedMemoryHandle *SharedMemoryHandle)
{
CHECK_KFD_OPEN();
@@ -283,13 +255,9 @@ hsaKmtShareMemory(
return fmm_share_memory(MemoryAddress, SizeInBytes, SharedMemoryHandle);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtRegisterSharedHandle(
const HsaSharedMemoryHandle *SharedMemoryHandle, /* IN */
void **MemoryAddress, /* OUT */
HSAuint64 *SizeInBytes /* OUT */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtRegisterSharedHandle(const HsaSharedMemoryHandle *SharedMemoryHandle,
void **MemoryAddress,
HSAuint64 *SizeInBytes)
{
CHECK_KFD_OPEN();
@@ -300,15 +268,11 @@ hsaKmtRegisterSharedHandle(
NULL);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtRegisterSharedHandleToNodes(
const HsaSharedMemoryHandle *SharedMemoryHandle, /* IN */
void **MemoryAddress, /* OUT */
HSAuint64 *SizeInBytes, /* OUT */
HSAuint64 NumberOfNodes, /* OUT */
HSAuint32* NodeArray /* OUT */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtRegisterSharedHandleToNodes(const HsaSharedMemoryHandle *SharedMemoryHandle,
void **MemoryAddress,
HSAuint64 *SizeInBytes,
HSAuint64 NumberOfNodes,
HSAuint32 *NodeArray)
{
CHECK_KFD_OPEN();
@@ -340,32 +304,26 @@ error:
return ret;
}
static uint64_t convertHsaToKfdRange(
HsaMemoryRange *HsaRange)
static uint64_t convertHsaToKfdRange(HsaMemoryRange *HsaRange)
{
if (sizeof(struct kfd_memory_range) !=
sizeof(HsaMemoryRange)) {
fprintf(stderr, "Struct size mismatch in thunk."
"Cannot cast Hsa Range to KFD IOCTL range\n");
fprintf(stderr, "Struct size mismatch in thunk. Cannot cast Hsa Range to KFD IOCTL range\n");
return 0;
}
return (uint64_t) HsaRange;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtProcessVMRead(
HSAuint32 Pid, /* IN */
HsaMemoryRange *LocalMemoryArray, /* IN */
HSAuint64 LocalMemoryArrayCount, /* IN */
HsaMemoryRange *RemoteMemoryArray, /* IN */
HSAuint64 RemoteMemoryArrayCount,/* IN */
HSAuint64 *SizeCopied /* OUT */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtProcessVMRead(HSAuint32 Pid,
HsaMemoryRange *LocalMemoryArray,
HSAuint64 LocalMemoryArrayCount,
HsaMemoryRange *RemoteMemoryArray,
HSAuint64 RemoteMemoryArrayCount,
HSAuint64 *SizeCopied)
{
struct kfd_ioctl_cross_memory_copy_args args;
if (LocalMemoryArray == NULL || RemoteMemoryArray == NULL ||
if (!LocalMemoryArray || !RemoteMemoryArray ||
LocalMemoryArrayCount == 0 || RemoteMemoryArrayCount == 0)
return HSAKMT_STATUS_ERROR;
@@ -379,6 +337,7 @@ hsaKmtProcessVMRead(
args.bytes_copied = 0;
int err = kmtIoctl(kfd_fd, AMDKFD_IOC_CROSS_MEMORY_COPY, &args);
if (err)
return HSAKMT_STATUS_ERROR;
@@ -388,20 +347,16 @@ hsaKmtProcessVMRead(
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtProcessVMWrite(
HSAuint32 Pid, /* IN */
HsaMemoryRange *LocalMemoryArray, /* IN */
HSAuint64 LocalMemoryArrayCount, /* IN */
HsaMemoryRange *RemoteMemoryArray, /* IN */
HSAuint64 RemoteMemoryArrayCount, /* IN */
HSAuint64 *SizeCopied /* OUT */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtProcessVMWrite(HSAuint32 Pid,
HsaMemoryRange *LocalMemoryArray,
HSAuint64 LocalMemoryArrayCount,
HsaMemoryRange *RemoteMemoryArray,
HSAuint64 RemoteMemoryArrayCount,
HSAuint64 *SizeCopied)
{
struct kfd_ioctl_cross_memory_copy_args args;
if (LocalMemoryArray == NULL || RemoteMemoryArray == NULL ||
if (!LocalMemoryArray || !RemoteMemoryArray ||
LocalMemoryArrayCount == 0 || RemoteMemoryArrayCount == 0)
return HSAKMT_STATUS_ERROR;
@@ -415,6 +370,7 @@ hsaKmtProcessVMWrite(
args.bytes_copied = 0;
int err = kmtIoctl(kfd_fd, AMDKFD_IOC_CROSS_MEMORY_COPY, &args);
if (err)
return HSAKMT_STATUS_ERROR;
@@ -425,28 +381,20 @@ hsaKmtProcessVMWrite(
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtDeregisterMemory(
void *MemoryAddress /* IN */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtDeregisterMemory(void *MemoryAddress)
{
CHECK_KFD_OPEN();
return fmm_deregister_memory(MemoryAddress);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtMapMemoryToGPU(
void *MemoryAddress, /* IN (page-aligned) */
HSAuint64 MemorySizeInBytes, /* IN (page-aligned) */
HSAuint64 *AlternateVAGPU /* OUT (page-aligned) */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtMapMemoryToGPU(void *MemoryAddress,
HSAuint64 MemorySizeInBytes,
HSAuint64 *AlternateVAGPU)
{
CHECK_KFD_OPEN();
if (MemoryAddress == NULL) {
if (!MemoryAddress) {
fprintf(stderr, "FIXME: mapping NULL pointer\n");
return HSAKMT_STATUS_ERROR;
}
@@ -460,21 +408,17 @@ hsaKmtMapMemoryToGPU(
return HSAKMT_STATUS_ERROR;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtMapMemoryToGPUNodes(
void* MemoryAddress, //IN (page-aligned)
HSAuint64 MemorySizeInBytes, //IN (page-aligned)
HSAuint64* AlternateVAGPU, //OUT (page-aligned)
HsaMemMapFlags MemMapFlags, //IN
HSAuint64 NumberOfNodes, //IN
HSAuint32* NodeArray //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtMapMemoryToGPUNodes(void *MemoryAddress,
HSAuint64 MemorySizeInBytes,
HSAuint64 *AlternateVAGPU,
HsaMemMapFlags MemMapFlags,
HSAuint64 NumberOfNodes,
HSAuint32 *NodeArray)
{
uint32_t *gpu_id_array;
HSAKMT_STATUS ret;
if (MemoryAddress == NULL) {
if (!MemoryAddress) {
fprintf(stderr, "FIXME: mapping NULL pointer\n");
return HSAKMT_STATUS_ERROR;
}
@@ -493,15 +437,11 @@ hsaKmtMapMemoryToGPUNodes(
gpu_id_array, NumberOfNodes * sizeof(uint32_t), AlternateVAGPU);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtUnmapMemoryToGPU(
void *MemoryAddress /* IN (page-aligned) */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtUnmapMemoryToGPU(void *MemoryAddress)
{
CHECK_KFD_OPEN();
if (MemoryAddress == NULL) {
if (!MemoryAddress) {
/* Workaround for runtime bug */
fprintf(stderr, "FIXME: Unmapping NULL pointer\n");
return HSAKMT_STATUS_SUCCESS;
@@ -513,16 +453,12 @@ hsaKmtUnmapMemoryToGPU(
return HSAKMT_STATUS_ERROR;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtMapGraphicHandle(
HSAuint32 NodeId, /* IN */
HSAuint64 GraphicDeviceHandle, /* IN */
HSAuint64 GraphicResourceHandle, /* IN */
HSAuint64 GraphicResourceOffset, /* IN */
HSAuint64 GraphicResourceSize, /* IN */
HSAuint64 *FlatMemoryAddress /* OUT */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtMapGraphicHandle(HSAuint32 NodeId,
HSAuint64 GraphicDeviceHandle,
HSAuint64 GraphicResourceHandle,
HSAuint64 GraphicResourceOffset,
HSAuint64 GraphicResourceSize,
HSAuint64 *FlatMemoryAddress)
{
CHECK_KFD_OPEN();
@@ -550,24 +486,15 @@ hsaKmtMapGraphicHandle(
return HSAKMT_STATUS_NO_MEMORY;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtUnmapGraphicHandle(
HSAuint32 NodeId, /* IN */
HSAuint64 FlatMemoryAddress, /* IN */
HSAuint64 SizeInBytes /* IN */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtUnmapGraphicHandle(HSAuint32 NodeId,
HSAuint64 FlatMemoryAddress,
HSAuint64 SizeInBytes)
{
return hsaKmtUnmapMemoryToGPU(PORT_UINT64_TO_VPTR(FlatMemoryAddress));
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtGetTileConfig(
HSAuint32 NodeId, /* IN */
HsaGpuTileConfig *config /* IN & OUT */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtGetTileConfig(HSAuint32 NodeId, HsaGpuTileConfig *config)
{
struct kfd_ioctl_get_tile_config_args args;
uint32_t gpu_id;
@@ -583,9 +510,8 @@ hsaKmtGetTileConfig(
args.num_tile_configs = config->NumTileConfigs;
args.num_macro_tile_configs = config->NumMacroTileConfigs;
if (kmtIoctl(kfd_fd, AMDKFD_IOC_GET_TILE_CONFIG, &args) != 0) {
if (kmtIoctl(kfd_fd, AMDKFD_IOC_GET_TILE_CONFIG, &args) != 0)
return HSAKMT_STATUS_ERROR;
}
config->NumTileConfigs = args.num_tile_configs;
config->NumMacroTileConfigs = args.num_macro_tile_configs;
@@ -598,24 +524,16 @@ hsaKmtGetTileConfig(
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtQueryPointerInfo(
const void *Pointer, /* IN */
HsaPointerInfo *PointerInfo /* OUT */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtQueryPointerInfo(const void *Pointer,
HsaPointerInfo *PointerInfo)
{
if (!PointerInfo)
return HSAKMT_STATUS_INVALID_PARAMETER;
return fmm_get_mem_info(Pointer, PointerInfo);
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtSetMemoryUserData(
const void *Pointer, /* IN */
void *UserData /* IN */
)
HSAKMT_STATUS HSAKMTAPI hsaKmtSetMemoryUserData(const void *Pointer,
void *UserData)
{
return fmm_set_mem_user_data(Pointer, UserData);
}
+11 -21
Просмотреть файл
@@ -36,7 +36,7 @@
static const char kfd_device_name[] = "/dev/kfd";
static const char tmp_file[] = "/var/lock/.amd_hsa_thunk_lock";
int amd_hsa_thunk_lock_fd = 0;
int amd_hsa_thunk_lock_fd;
static pid_t parent_pid = -1;
@@ -76,9 +76,7 @@ static inline void init_page_size(void)
PAGE_SHIFT = ffs(PAGE_SIZE) - 1;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtOpenKFD(void)
HSAKMT_STATUS HSAKMTAPI hsaKmtOpenKFD(void)
{
HSAKMT_STATUS result;
int fd;
@@ -94,8 +92,9 @@ hsaKmtOpenKFD(void)
if (is_forked_child())
clear_after_fork();
if (kfd_open_count == 0)
{
if (kfd_open_count == 0) {
amd_hsa_thunk_lock_fd = 0;
fd = open(kfd_device_name, O_RDWR | O_CLOEXEC);
if (fd != -1) {
@@ -125,7 +124,7 @@ hsaKmtOpenKFD(void)
mask = umask(0); /* save the current umask */
/* We don't want the existing umask to mask out S_IWOTH */
umask(S_IXOTH);
umask(0001);
amd_hsa_thunk_lock_fd = open(tmp_file,
O_CREAT | O_RDWR,
0666);
@@ -136,9 +135,7 @@ hsaKmtOpenKFD(void)
if (init_counter_props(sys_props.NumNodes) !=
HSAKMT_STATUS_SUCCESS)
fprintf(stderr, "Profiling is not available\n");
}
else
{
} else {
kfd_open_count++;
result = HSAKMT_STATUS_SUCCESS;
}
@@ -157,18 +154,14 @@ open_failed:
return result;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtCloseKFD(void)
HSAKMT_STATUS HSAKMTAPI hsaKmtCloseKFD(void)
{
HSAKMT_STATUS result;
pthread_mutex_lock(&hsakmt_mutex);
if (kfd_open_count > 0)
{
if (--kfd_open_count == 0)
{
if (kfd_open_count > 0) {
if (--kfd_open_count == 0) {
destroy_counter_props();
destroy_device_debugging_memory();
destroy_process_doorbells();
@@ -183,11 +176,8 @@ hsaKmtCloseKFD(void)
}
result = HSAKMT_STATUS_SUCCESS;
}
else
{
} else
result = HSAKMT_STATUS_KERNEL_IO_CHANNEL_NOT_OPENED;
}
pthread_mutex_unlock(&hsakmt_mutex);
+45 -89
Просмотреть файл
@@ -96,7 +96,7 @@ static ssize_t readn(int fd, void *buf, size_t n)
bytes = read(fd, buf, left);
if (!bytes) /* reach EOF */
return (n - left);
if (bytes < 0 ) {
if (bytes < 0) {
if (errno == EINTR) /* read got interrupted */
continue;
else
@@ -145,8 +145,8 @@ out:
HSAKMT_STATUS init_counter_props(unsigned int NumNodes)
{
counter_props = calloc(NumNodes, sizeof(struct HsaCounterProperties*));
if (counter_props == NULL)
counter_props = calloc(NumNodes, sizeof(struct HsaCounterProperties *));
if (!counter_props)
return HSAKMT_STATUS_NO_MEMORY;
counter_props_count = NumNodes;
@@ -159,11 +159,11 @@ void destroy_counter_props(void)
{
unsigned int i;
if (counter_props == NULL)
if (!counter_props)
return;
for (i = 0; i<counter_props_count; i++)
if (counter_props[i] != NULL) {
for (i = 0; i < counter_props_count; i++)
if (counter_props[i]) {
free(counter_props[i]);
counter_props[i] = NULL;
}
@@ -349,9 +349,9 @@ static unsigned int get_perf_event_type(enum perf_block_id block_id)
}
/* close_perf_event_fd - Close all FDs opened for this block.
* When RT acquires the trace access, RT has no ideas about each
* individual FD opened for this block. We should treat the whole
* block as one and close all of them.
* When RT acquires the trace access, RT has no ideas about each
* individual FD opened for this block. We should treat the whole
* block as one and close all of them.
*/
static void close_perf_event_fd(struct perf_trace_block *block)
{
@@ -368,9 +368,9 @@ static void close_perf_event_fd(struct perf_trace_block *block)
}
/* open_perf_event_fd - Open FDs required for this block.
* If one of them fails, we should close all FDs that have been
* opened because RT has no ideas about those FDs successfully
* opened and it won't send anything to close them.
* If one of them fails, we should close all FDs that have been
* opened because RT has no ideas about those FDs successfully
* opened and it won't send anything to close them.
*/
static HSAKMT_STATUS open_perf_event_fd(struct perf_trace_block *block)
{
@@ -418,7 +418,7 @@ static HSAKMT_STATUS open_perf_event_fd(struct perf_trace_block *block)
}
static HSAKMT_STATUS perf_trace_ioctl(struct perf_trace_block *block,
uint32_t cmd)
uint32_t cmd)
{
uint32_t i;
@@ -438,19 +438,15 @@ static HSAKMT_STATUS query_trace(int fd, uint64_t *buf)
if (fd < 0)
return HSAKMT_STATUS_ERROR;
if(readn(fd, &content, sizeof(content)) != sizeof(content))
if (readn(fd, &content, sizeof(content)) != sizeof(content))
return HSAKMT_STATUS_ERROR;
*buf = content.val;
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcGetCounterProperties(
HSAuint32 NodeId, //IN
HsaCounterProperties** CounterProperties //OUT
)
HSAKMT_STATUS HSAKMTAPI hsaKmtPmcGetCounterProperties(HSAuint32 NodeId,
HsaCounterProperties **CounterProperties)
{
HSAKMT_STATUS rc = HSAKMT_STATUS_SUCCESS;
uint32_t gpu_id, i, block_id;
@@ -461,16 +457,16 @@ hsaKmtPmcGetCounterProperties(
uint32_t total_blocks = 0;
uint32_t entry;
if (counter_props == NULL)
if (!counter_props)
return HSAKMT_STATUS_NO_MEMORY;
if (CounterProperties == NULL)
if (!CounterProperties)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (validate_nodeid(NodeId, &gpu_id) != 0)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
if (counter_props[NodeId] != NULL) {
if (counter_props[NodeId]) {
*CounterProperties = counter_props[NodeId];
return HSAKMT_STATUS_SUCCESS;
}
@@ -491,7 +487,7 @@ hsaKmtPmcGetCounterProperties(
sizeof(HsaCounter)*(total_counters-1);
counter_props[NodeId] = malloc(counter_props_size);
if (counter_props[NodeId] == NULL)
if (!counter_props[NodeId])
return HSAKMT_STATUS_NO_MEMORY;
counter_props[NodeId]->NumBlocks = total_blocks;
@@ -534,18 +530,11 @@ hsaKmtPmcGetCounterProperties(
return HSAKMT_STATUS_SUCCESS;
}
/**
Registers a set of (HW) counters to be used for tracing/profiling
*/
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcRegisterTrace(
HSAuint32 NodeId, //IN
HSAuint32 NumberOfCounters, //IN
HsaCounter* Counters, //IN
HsaPmcTraceRoot* TraceRoot //OUT
)
/* Registers a set of (HW) counters to be used for tracing/profiling */
HSAKMT_STATUS HSAKMTAPI hsaKmtPmcRegisterTrace(HSAuint32 NodeId,
HSAuint32 NumberOfCounters,
HsaCounter *Counters,
HsaPmcTraceRoot *TraceRoot)
{
uint32_t gpu_id, i, j;
uint64_t min_buf_size = 0;
@@ -558,10 +547,10 @@ hsaKmtPmcRegisterTrace(
uint64_t *counter_id_ptr;
int *fd_ptr;
if (counter_props == NULL)
if (!counter_props)
return HSAKMT_STATUS_NO_MEMORY;
if (Counters == NULL || TraceRoot == NULL || NumberOfCounters == 0)
if (!Counters || !TraceRoot || NumberOfCounters == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (validate_nodeid(NodeId, &gpu_id) != HSAKMT_STATUS_SUCCESS)
@@ -618,7 +607,7 @@ hsaKmtPmcRegisterTrace(
+ sizeof(uint64_t) * total_counters
+ sizeof(int) * total_counters,
1);
if (trace == NULL)
if (!trace)
return HSAKMT_STATUS_NO_MEMORY;
/* Allocated area is partitioned as:
@@ -677,16 +666,10 @@ hsaKmtPmcRegisterTrace(
return HSAKMT_STATUS_SUCCESS;
}
/**
Unregisters a set of (HW) counters used for tracing/profiling
*/
/* Unregisters a set of (HW) counters used for tracing/profiling */
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcUnregisterTrace(
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtPmcUnregisterTrace(HSAuint32 NodeId,
HSATraceId TraceId)
{
uint32_t gpu_id;
struct perf_trace *trace;
@@ -708,6 +691,7 @@ hsaKmtPmcUnregisterTrace(
/* If the trace is in the running state, stop it */
if (trace->state == PERF_TRACE_STATE__STARTED) {
HSAKMT_STATUS status = hsaKmtPmcStopTrace(TraceId);
if (status != HSAKMT_STATUS_SUCCESS)
return status;
}
@@ -717,12 +701,8 @@ hsaKmtPmcUnregisterTrace(
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcAcquireTraceAccess(
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtPmcAcquireTraceAccess(HSAuint32 NodeId,
HSATraceId TraceId)
{
struct perf_trace *trace;
HSAKMT_STATUS ret = HSAKMT_STATUS_SUCCESS;
@@ -766,12 +746,8 @@ out:
return ret;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcReleaseTraceAccess(
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtPmcReleaseTraceAccess(HSAuint32 NodeId,
HSATraceId TraceId)
{
struct perf_trace *trace;
uint32_t i;
@@ -795,17 +771,10 @@ hsaKmtPmcReleaseTraceAccess(
}
/**
Starts tracing operation on a previously established set of performance counters
*/
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcStartTrace(
HSATraceId TraceId, //IN
void* TraceBuffer, //IN (page aligned)
HSAuint64 TraceBufferSizeBytes //IN (page aligned)
)
/* Starts tracing operation on a previously established set of performance counters */
HSAKMT_STATUS HSAKMTAPI hsaKmtPmcStartTrace(HSATraceId TraceId,
void *TraceBuffer,
HSAuint64 TraceBufferSizeBytes)
{
struct perf_trace *trace =
(struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
@@ -813,7 +782,7 @@ hsaKmtPmcStartTrace(
int32_t j;
HSAKMT_STATUS ret = HSAKMT_STATUS_SUCCESS;
if (TraceId == 0 || TraceBuffer == NULL || TraceBufferSizeBytes == 0)
if (TraceId == 0 || !TraceBuffer || TraceBufferSizeBytes == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
@@ -842,15 +811,9 @@ hsaKmtPmcStartTrace(
}
/**
Forces an update of all the counters that a previously started trace operation has registered
*/
/*Forces an update of all the counters that a previously started trace operation has registered */
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcQueryTrace(
HSATraceId TraceId //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtPmcQueryTrace(HSATraceId TraceId)
{
struct perf_trace *trace =
(struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
@@ -882,15 +845,8 @@ hsaKmtPmcQueryTrace(
}
/**
Stops tracing operation on a previously established set of performance counters
*/
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcStopTrace(
HSATraceId TraceId //IN
)
/* Stops tracing operation on a previously established set of performance counters */
HSAKMT_STATUS HSAKMTAPI hsaKmtPmcStopTrace(HSATraceId TraceId)
{
struct perf_trace *trace =
(struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
+4 -6
Просмотреть файл
@@ -1597,8 +1597,7 @@ uint32_t pmc_table_get_max_concurrent(int block_id)
}
}
static HSAKMT_STATUS
alloc_pmc_blocks_iommu(void)
static HSAKMT_STATUS alloc_pmc_blocks_iommu(void)
{
DIR *dir;
struct dirent *dent;
@@ -1704,10 +1703,9 @@ void free_pmc_blocks(void)
iommu_block.num_of_counters = 0;
}
HSAKMT_STATUS
get_block_properties(uint32_t node_id,
enum perf_block_id block_id,
struct perf_counter_block *block)
HSAKMT_STATUS get_block_properties(uint32_t node_id,
enum perf_block_id block_id,
struct perf_counter_block *block)
{
uint16_t dev_id = get_device_id_by_node(node_id);
enum asic_family_type asic;
+3 -4
Просмотреть файл
@@ -72,9 +72,8 @@ HSAKMT_STATUS alloc_pmc_blocks(void);
void free_pmc_blocks(void);
uint32_t pmc_table_get_max_concurrent(int block_id);
HSAKMT_STATUS
get_block_properties(uint32_t node_id,
enum perf_block_id block_id,
struct perf_counter_block *block);
HSAKMT_STATUS get_block_properties(uint32_t node_id,
enum perf_block_id block_id,
struct perf_counter_block *block);
#endif // PMC_TABLE_H
+83 -105
Просмотреть файл
@@ -44,8 +44,7 @@
#define WG_CONTEXT_DATA_SIZE_PER_CU_VI 344576
#define WAVES_PER_CU_VI 32
struct device_info
{
struct device_info {
enum asic_family_type asic_family;
uint32_t eop_buffer_size;
uint32_t doorbell_size;
@@ -110,14 +109,12 @@ static struct device_info *dev_lookup_table[] = {
[CHIP_VEGA10] = &vega10_device_info
};
struct device_id
{
struct device_id {
uint16_t dev_id;
struct device_info *dev_info;
};
struct queue
{
struct queue {
uint32_t queue_id;
uint64_t wptr;
uint64_t rptr;
@@ -128,11 +125,10 @@ struct queue
const struct device_info *dev_info;
};
struct process_doorbells
{
struct process_doorbells {
bool use_gpuvm;
uint32_t size;
void* doorbells;
void *doorbells;
pthread_mutex_t doorbells_mutex;
};
@@ -145,9 +141,10 @@ HSAKMT_STATUS init_process_doorbells(unsigned int NumNodes)
HSAKMT_STATUS ret = HSAKMT_STATUS_SUCCESS;
/* doorbells[] is accessed using Topology NodeId. This means doorbells[0],
* which corresponds to CPU only Node, might not be used */
* which corresponds to CPU only Node, might not be used
*/
doorbells = malloc(NumNodes * sizeof(struct process_doorbells));
if (doorbells == NULL)
if (!doorbells)
return HSAKMT_STATUS_NO_MEMORY;
for (i = 0; i < NumNodes; i++) {
@@ -258,7 +255,7 @@ static HSAKMT_STATUS map_doorbell_dgpu(HSAuint32 NodeId, HSAuint32 gpu_id,
ptr = fmm_allocate_doorbell(gpu_id, doorbells[NodeId].size,
doorbell_offset);
if (ptr == NULL)
if (!ptr)
return HSAKMT_STATUS_ERROR;
/* map for GPU access */
@@ -299,7 +296,7 @@ static HSAKMT_STATUS map_doorbell(HSAuint32 NodeId, HSAuint32 gpu_id,
return status;
}
static void* allocate_exec_aligned_memory_cpu(uint32_t size, uint32_t align)
static void *allocate_exec_aligned_memory_cpu(uint32_t size, uint32_t align)
{
void *ptr;
int retval;
@@ -344,7 +341,7 @@ static bool update_ctx_save_restore_size(uint32_t nodeid, struct queue *q)
return false;
}
void* allocate_exec_aligned_memory_gpu(uint32_t size, uint32_t align,
void *allocate_exec_aligned_memory_gpu(uint32_t size, uint32_t align,
uint32_t NodeId, bool nonPaged)
{
void *mem;
@@ -361,14 +358,13 @@ void* allocate_exec_aligned_memory_gpu(uint32_t size, uint32_t align,
size = ALIGN_UP(size, align);
ret = hsaKmtAllocMemory(0, size, flags, &mem);
if (ret != HSAKMT_STATUS_SUCCESS) {
if (ret != HSAKMT_STATUS_SUCCESS)
return NULL;
}
if (NodeId != 0) {
uint32_t nodes_array[1] = {NodeId};
if (hsaKmtRegisterMemoryToNodes(mem, size, 1, nodes_array)
!= HSAKMT_STATUS_SUCCESS) {
if (hsaKmtRegisterMemoryToNodes(mem, size, 1, nodes_array) != HSAKMT_STATUS_SUCCESS) {
hsaKmtFreeMemory(mem, size);
return NULL;
}
@@ -386,15 +382,14 @@ void free_exec_aligned_memory_gpu(void *addr, uint32_t size, uint32_t align)
{
size = ALIGN_UP(size, align);
if (hsaKmtUnmapMemoryToGPU(addr) == HSAKMT_STATUS_SUCCESS) {
if (hsaKmtUnmapMemoryToGPU(addr) == HSAKMT_STATUS_SUCCESS)
hsaKmtFreeMemory(addr, size);
}
}
static void* allocate_exec_aligned_memory(uint32_t size,
uint32_t align,
enum asic_family_type type,
uint32_t NodeId)
static void *allocate_exec_aligned_memory(uint32_t size,
uint32_t align,
enum asic_family_type type,
uint32_t NodeId)
{
if (IS_DGPU(type))
return allocate_exec_aligned_memory_gpu(size, align, NodeId,
@@ -429,6 +424,7 @@ static int handle_concrete_asic(struct queue *q,
uint32_t NodeId)
{
const struct device_info *dev_info = q->dev_info;
if (dev_info) {
if (dev_info->eop_buffer_size > 0) {
q->eop_buffer =
@@ -436,9 +432,9 @@ static int handle_concrete_asic(struct queue *q,
PAGE_SIZE,
dev_info->asic_family,
NodeId);
if (q->eop_buffer == NULL) {
if (!q->eop_buffer)
return HSAKMT_STATUS_NO_MEMORY;
}
args->eop_buffer_address = (uintptr_t)q->eop_buffer;
args->eop_buffer_size = dev_info->eop_buffer_size;
}
@@ -451,9 +447,9 @@ static int handle_concrete_asic(struct queue *q,
PAGE_SIZE,
dev_info->asic_family,
NodeId);
if (q->ctx_save_restore == NULL) {;
if (!q->ctx_save_restore)
return HSAKMT_STATUS_NO_MEMORY;
}
args->ctx_save_restore_address = (uintptr_t)q->ctx_save_restore;
}
}
@@ -465,31 +461,28 @@ static int handle_concrete_asic(struct queue *q,
* to KFD queue priority (0 to 15)
* Indexed by thunk_queue_priority+3
*/
static uint32_t priority_map[] = {0,3,5,7,9,11,15};
static uint32_t priority_map[] = {0, 3, 5, 7, 9, 11, 15};
HSAKMT_STATUS
HSAKMTAPI
hsaKmtCreateQueue(
HSAuint32 NodeId, //IN
HSA_QUEUE_TYPE Type, //IN
HSAuint32 QueuePercentage, //IN
HSA_QUEUE_PRIORITY Priority, //IN
void* QueueAddress, //IN
HSAuint64 QueueSizeInBytes, //IN
HsaEvent* Event, //IN
HsaQueueResource* QueueResource //OUT
)
HSAKMT_STATUS HSAKMTAPI hsaKmtCreateQueue(HSAuint32 NodeId,
HSA_QUEUE_TYPE Type,
HSAuint32 QueuePercentage,
HSA_QUEUE_PRIORITY Priority,
void *QueueAddress,
HSAuint64 QueueSizeInBytes,
HsaEvent *Event,
HsaQueueResource *QueueResource)
{
HSAKMT_STATUS result;
uint32_t gpu_id;
uint16_t dev_id;
uint64_t doorbell_mmap_offset;
unsigned doorbell_offset;
unsigned int doorbell_offset;
struct device_info *dev_info;
int err;
CHECK_KFD_OPEN();
if (Priority < HSA_QUEUE_PRIORITY_MINIMUM ||
if (Priority < HSA_QUEUE_PRIORITY_MINIMUM ||
Priority > HSA_QUEUE_PRIORITY_MAXIMUM)
return HSAKMT_STATUS_INVALID_PARAMETER;
@@ -500,31 +493,37 @@ hsaKmtCreateQueue(
dev_id = get_device_id_by_node(NodeId);
dev_info = get_device_info_by_dev_id(dev_id);
struct queue *q = allocate_exec_aligned_memory(sizeof (*q),
struct queue *q = allocate_exec_aligned_memory(sizeof(*q),
PAGE_SIZE, dev_info->asic_family,
NodeId);
if (q == NULL)
if (!q)
return HSAKMT_STATUS_NO_MEMORY;
memset(q, 0, sizeof(*q));
struct kfd_ioctl_create_queue_args args;
memset(&args, 0, sizeof(args));
args.gpu_id = gpu_id;
q->dev_info = dev_info;
switch (Type)
{
case HSA_QUEUE_COMPUTE: args.queue_type = KFD_IOC_QUEUE_TYPE_COMPUTE; break;
case HSA_QUEUE_SDMA: args.queue_type = KFD_IOC_QUEUE_TYPE_SDMA; break;
case HSA_QUEUE_COMPUTE_AQL: args.queue_type = KFD_IOC_QUEUE_TYPE_COMPUTE_AQL; break;
default: return HSAKMT_STATUS_INVALID_PARAMETER;
switch (Type) {
case HSA_QUEUE_COMPUTE:
args.queue_type = KFD_IOC_QUEUE_TYPE_COMPUTE;
break;
case HSA_QUEUE_SDMA:
args.queue_type = KFD_IOC_QUEUE_TYPE_SDMA;
break;
case HSA_QUEUE_COMPUTE_AQL:
args.queue_type = KFD_IOC_QUEUE_TYPE_COMPUTE_AQL;
break;
default:
return HSAKMT_STATUS_INVALID_PARAMETER;
}
if (Type != HSA_QUEUE_COMPUTE_AQL)
{
if (Type != HSA_QUEUE_COMPUTE_AQL) {
QueueResource->QueueRptrValue = (uintptr_t)&q->rptr;
QueueResource->QueueWptrValue = (uintptr_t)&q->wptr;
}
@@ -545,8 +544,7 @@ hsaKmtCreateQueue(
err = kmtIoctl(kfd_fd, AMDKFD_IOC_CREATE_QUEUE, &args);
if (err == -1)
{
if (err == -1) {
free_queue(q);
return HSAKMT_STATUS_ERROR;
}
@@ -558,14 +556,16 @@ hsaKmtCreateQueue(
* doorbell page is included in the doorbell offset
* returned by KFD. This allows doorbells to be
* allocated per-device, independent of the
* per-process queue ID. */
* per-process queue ID.
*/
doorbell_mmap_offset = args.doorbell_offset &
~(HSAuint64)(doorbells[NodeId].size - 1);
doorbell_offset = args.doorbell_offset &
(doorbells[NodeId].size - 1);
} else {
/* On older chips, the doorbell offset within the
* doorbell page is based on the queue ID. */
* doorbell page is based on the queue ID.
*/
doorbell_mmap_offset = args.doorbell_offset;
doorbell_offset = q->queue_id * dev_info->doorbell_size;
}
@@ -585,28 +585,24 @@ hsaKmtCreateQueue(
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtUpdateQueue(
HSA_QUEUEID QueueId, //IN
HSAuint32 QueuePercentage,//IN
HSA_QUEUE_PRIORITY Priority, //IN
void* QueueAddress, //IN
HSAuint64 QueueSize, //IN
HsaEvent* Event //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtUpdateQueue(HSA_QUEUEID QueueId,
HSAuint32 QueuePercentage,
HSA_QUEUE_PRIORITY Priority,
void *QueueAddress,
HSAuint64 QueueSize,
HsaEvent *Event)
{
struct kfd_ioctl_update_queue_args arg;
struct queue *q = PORT_UINT64_TO_VPTR(QueueId);
CHECK_KFD_OPEN();
if (Priority < HSA_QUEUE_PRIORITY_MINIMUM ||
if (Priority < HSA_QUEUE_PRIORITY_MINIMUM ||
Priority > HSA_QUEUE_PRIORITY_MAXIMUM)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (q == NULL)
return (HSAKMT_STATUS_INVALID_PARAMETER);
if (!q)
return HSAKMT_STATUS_INVALID_PARAMETER;
arg.queue_id = (HSAuint32)q->queue_id;
arg.ring_base_address = (uintptr_t)QueueAddress;
arg.ring_size = QueueSize;
@@ -614,27 +610,22 @@ hsaKmtUpdateQueue(
arg.queue_priority = priority_map[Priority+3];
int err = kmtIoctl(kfd_fd, AMDKFD_IOC_UPDATE_QUEUE, &arg);
if (err == -1)
{
return HSAKMT_STATUS_ERROR;
}
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtDestroyQueue(
HSA_QUEUEID QueueId //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtDestroyQueue(HSA_QUEUEID QueueId)
{
CHECK_KFD_OPEN();
struct queue *q = PORT_UINT64_TO_VPTR(QueueId);
struct kfd_ioctl_destroy_queue_args args;
if (q == NULL)
return (HSAKMT_STATUS_INVALID_PARAMETER);
if (!q)
return HSAKMT_STATUS_INVALID_PARAMETER;
memset(&args, 0, sizeof(args));
@@ -643,30 +634,22 @@ hsaKmtDestroyQueue(
int err = kmtIoctl(kfd_fd, AMDKFD_IOC_DESTROY_QUEUE, &args);
if (err == -1)
{
return HSAKMT_STATUS_ERROR;
}
else
{
free_queue(q);
return HSAKMT_STATUS_SUCCESS;
}
free_queue(q);
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtSetQueueCUMask(
HSA_QUEUEID QueueId, //IN
HSAuint32 CUMaskCount, //IN
HSAuint32* QueueCUMask //IN
)
HSAKMT_STATUS HSAKMTAPI hsaKmtSetQueueCUMask(HSA_QUEUEID QueueId,
HSAuint32 CUMaskCount,
HSAuint32 *QueueCUMask)
{
struct queue *q = PORT_UINT64_TO_VPTR(QueueId);
struct kfd_ioctl_set_cu_mask_args args;
CHECK_KFD_OPEN();
if (CUMaskCount == 0 || QueueCUMask == NULL || ((CUMaskCount % 32) != 0))
if (CUMaskCount == 0 || !QueueCUMask || ((CUMaskCount % 32) != 0))
return HSAKMT_STATUS_INVALID_PARAMETER;
memset(&args, 0, sizeof(args));
@@ -675,23 +658,18 @@ hsaKmtSetQueueCUMask(
args.cu_mask_ptr = (uintptr_t)QueueCUMask;
int err = kmtIoctl(kfd_fd, AMDKFD_IOC_SET_CU_MASK, &args);
if (err == -1)
{
return HSAKMT_STATUS_ERROR;
}
return HSAKMT_STATUS_SUCCESS;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtSetTrapHandler(
HSAuint32 Node,
void *TrapHandlerBaseAddress,
HSAuint64 TrapHandlerSizeInBytes,
void *TrapBufferBaseAddress,
HSAuint64 TrapBufferSizeInBytes
)
HSAKMT_STATUS HSAKMTAPI hsaKmtSetTrapHandler(HSAuint32 Node,
void *TrapHandlerBaseAddress,
HSAuint64 TrapHandlerSizeInBytes,
void *TrapBufferBaseAddress,
HSAuint64 TrapBufferSizeInBytes)
{
struct kfd_ioctl_set_trap_handler_args args;
HSAKMT_STATUS result;
+2 -6
Просмотреть файл
@@ -26,12 +26,8 @@
#include "libhsakmt.h"
#include "linux/kfd_ioctl.h"
HSAKMT_STATUS
HSAKMTAPI
hsaKmtGetClockCounters(
HSAuint32 NodeId, //IN
HsaClockCounters* Counters //OUT
)
HSAKMT_STATUS HSAKMTAPI hsaKmtGetClockCounters(HSAuint32 NodeId,
HsaClockCounters *Counters)
{
HSAKMT_STATUS result;
uint32_t gpu_id;
Разница между файлами не показана из-за своего большого размера Загрузить разницу
+2 -5
Просмотреть файл
@@ -28,15 +28,12 @@
#include <string.h>
#include "linux/kfd_ioctl.h"
HSAKMT_STATUS
HSAKMTAPI
hsaKmtGetVersion(
HsaVersionInfo* VersionInfo //OUT
)
HSAKMT_STATUS HSAKMTAPI hsaKmtGetVersion(HsaVersionInfo *VersionInfo)
{
CHECK_KFD_OPEN();
struct kfd_ioctl_get_version_args args;
memset(&args, 0, sizeof(args));
if (kmtIoctl(kfd_fd, AMDKFD_IOC_GET_VERSION, &args) == -1)