SWDEV-540733 - Add PCI CHIP ID device attribute (#224)
Co-authored-by: Rahul Manocha <rmanocha@amd.com>
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Manocha, Rahul
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@@ -166,7 +166,7 @@ typedef struct hipDeviceProp_t {
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int concurrentKernels; ///< Device can possibly execute multiple kernels concurrently.
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int ECCEnabled; ///< Device has ECC support enabled
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int pciBusID; ///< PCI Bus ID.
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int pciDeviceID; ///< PCI Device ID.
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int pciDeviceID; ///< PCI Device ID
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int pciDomainID; ///< PCI Domain ID
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int tccDriver; ///< 1:If device is Tesla device using TCC driver, else 0
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int asyncEngineCount; ///< Number of async engines
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@@ -421,142 +421,178 @@ typedef enum __HIP_NODISCARD hipError_t {
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* hipDeviceAttributeUnused number: 5
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*/
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typedef enum hipDeviceAttribute_t {
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hipDeviceAttributeCudaCompatibleBegin = 0,
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hipDeviceAttributeCudaCompatibleBegin = 0,
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hipDeviceAttributeEccEnabled = hipDeviceAttributeCudaCompatibleBegin, ///< Whether ECC support is enabled.
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hipDeviceAttributeAccessPolicyMaxWindowSize, ///< Cuda only. The maximum size of the window policy in bytes.
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hipDeviceAttributeAsyncEngineCount, ///< Asynchronous engines number.
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hipDeviceAttributeCanMapHostMemory, ///< Whether host memory can be mapped into device address space
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hipDeviceAttributeCanUseHostPointerForRegisteredMem,///< Device can access host registered memory
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///< at the same virtual address as the CPU
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hipDeviceAttributeClockRate, ///< Peak clock frequency in kilohertz.
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hipDeviceAttributeComputeMode, ///< Compute mode that device is currently in.
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hipDeviceAttributeComputePreemptionSupported, ///< Device supports Compute Preemption.
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hipDeviceAttributeConcurrentKernels, ///< Device can possibly execute multiple kernels concurrently.
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hipDeviceAttributeConcurrentManagedAccess, ///< Device can coherently access managed memory concurrently with the CPU
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hipDeviceAttributeCooperativeLaunch, ///< Support cooperative launch
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hipDeviceAttributeCooperativeMultiDeviceLaunch, ///< Support cooperative launch on multiple devices
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hipDeviceAttributeDeviceOverlap, ///< Device can concurrently copy memory and execute a kernel.
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///< Deprecated. Use instead asyncEngineCount.
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hipDeviceAttributeDirectManagedMemAccessFromHost, ///< Host can directly access managed memory on
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///< the device without migration
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hipDeviceAttributeGlobalL1CacheSupported, ///< Device supports caching globals in L1
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hipDeviceAttributeHostNativeAtomicSupported, ///< Link between the device and the host supports native atomic operations
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hipDeviceAttributeIntegrated, ///< Device is integrated GPU
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hipDeviceAttributeIsMultiGpuBoard, ///< Multiple GPU devices.
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hipDeviceAttributeKernelExecTimeout, ///< Run time limit for kernels executed on the device
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hipDeviceAttributeL2CacheSize, ///< Size of L2 cache in bytes. 0 if the device doesn't have L2 cache.
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hipDeviceAttributeLocalL1CacheSupported, ///< caching locals in L1 is supported
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hipDeviceAttributeLuid, ///< 8-byte locally unique identifier in 8 bytes. Undefined on TCC and non-Windows platforms
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hipDeviceAttributeLuidDeviceNodeMask, ///< Luid device node mask. Undefined on TCC and non-Windows platforms
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hipDeviceAttributeComputeCapabilityMajor, ///< Major compute capability version number.
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hipDeviceAttributeManagedMemory, ///< Device supports allocating managed memory on this system
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hipDeviceAttributeMaxBlocksPerMultiProcessor, ///< Max block size per multiprocessor
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hipDeviceAttributeMaxBlockDimX, ///< Max block size in width.
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hipDeviceAttributeMaxBlockDimY, ///< Max block size in height.
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hipDeviceAttributeMaxBlockDimZ, ///< Max block size in depth.
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hipDeviceAttributeMaxGridDimX, ///< Max grid size in width.
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hipDeviceAttributeMaxGridDimY, ///< Max grid size in height.
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hipDeviceAttributeMaxGridDimZ, ///< Max grid size in depth.
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hipDeviceAttributeMaxSurface1D, ///< Maximum size of 1D surface.
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hipDeviceAttributeMaxSurface1DLayered, ///< Cuda only. Maximum dimensions of 1D layered surface.
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hipDeviceAttributeMaxSurface2D, ///< Maximum dimension (width, height) of 2D surface.
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hipDeviceAttributeMaxSurface2DLayered, ///< Cuda only. Maximum dimensions of 2D layered surface.
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hipDeviceAttributeMaxSurface3D, ///< Maximum dimension (width, height, depth) of 3D surface.
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hipDeviceAttributeMaxSurfaceCubemap, ///< Cuda only. Maximum dimensions of Cubemap surface.
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hipDeviceAttributeMaxSurfaceCubemapLayered, ///< Cuda only. Maximum dimension of Cubemap layered surface.
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hipDeviceAttributeMaxTexture1DWidth, ///< Maximum size of 1D texture.
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hipDeviceAttributeMaxTexture1DLayered, ///< Maximum dimensions of 1D layered texture.
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hipDeviceAttributeMaxTexture1DLinear, ///< Maximum number of elements allocatable in a 1D linear texture.
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///< Use cudaDeviceGetTexture1DLinearMaxWidth() instead on Cuda.
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hipDeviceAttributeMaxTexture1DMipmap, ///< Maximum size of 1D mipmapped texture.
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hipDeviceAttributeMaxTexture2DWidth, ///< Maximum dimension width of 2D texture.
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hipDeviceAttributeMaxTexture2DHeight, ///< Maximum dimension hight of 2D texture.
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hipDeviceAttributeMaxTexture2DGather, ///< Maximum dimensions of 2D texture if gather operations performed.
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hipDeviceAttributeMaxTexture2DLayered, ///< Maximum dimensions of 2D layered texture.
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hipDeviceAttributeMaxTexture2DLinear, ///< Maximum dimensions (width, height, pitch) of 2D textures bound to pitched memory.
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hipDeviceAttributeMaxTexture2DMipmap, ///< Maximum dimensions of 2D mipmapped texture.
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hipDeviceAttributeMaxTexture3DWidth, ///< Maximum dimension width of 3D texture.
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hipDeviceAttributeMaxTexture3DHeight, ///< Maximum dimension height of 3D texture.
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hipDeviceAttributeMaxTexture3DDepth, ///< Maximum dimension depth of 3D texture.
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hipDeviceAttributeMaxTexture3DAlt, ///< Maximum dimensions of alternate 3D texture.
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hipDeviceAttributeMaxTextureCubemap, ///< Maximum dimensions of Cubemap texture
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hipDeviceAttributeMaxTextureCubemapLayered, ///< Maximum dimensions of Cubemap layered texture.
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hipDeviceAttributeMaxThreadsDim, ///< Maximum dimension of a block
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hipDeviceAttributeMaxThreadsPerBlock, ///< Maximum number of threads per block.
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hipDeviceAttributeMaxThreadsPerMultiProcessor, ///< Maximum resident threads per multiprocessor.
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hipDeviceAttributeMaxPitch, ///< Maximum pitch in bytes allowed by memory copies
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hipDeviceAttributeMemoryBusWidth, ///< Global memory bus width in bits.
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hipDeviceAttributeMemoryClockRate, ///< Peak memory clock frequency in kilohertz.
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hipDeviceAttributeComputeCapabilityMinor, ///< Minor compute capability version number.
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hipDeviceAttributeMultiGpuBoardGroupID, ///< Unique ID of device group on the same multi-GPU board
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hipDeviceAttributeMultiprocessorCount, ///< Number of multiprocessors on the device.
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hipDeviceAttributeUnused1, ///< Previously hipDeviceAttributeName
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hipDeviceAttributePageableMemoryAccess, ///< Device supports coherently accessing pageable memory
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///< without calling hipHostRegister on it
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hipDeviceAttributePageableMemoryAccessUsesHostPageTables, ///< Device accesses pageable memory via the host's page tables
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hipDeviceAttributePciBusId, ///< PCI Bus ID.
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hipDeviceAttributePciDeviceId, ///< PCI Device ID.
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hipDeviceAttributePciDomainId, ///< PCI Domain Id.
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hipDeviceAttributePciDomainID = hipDeviceAttributePciDomainId, ///< PCI Domain ID, for backward compatibility.
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hipDeviceAttributePersistingL2CacheMaxSize, ///< Maximum l2 persisting lines capacity in bytes
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hipDeviceAttributeMaxRegistersPerBlock, ///< 32-bit registers available to a thread block. This number is shared
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///< by all thread blocks simultaneously resident on a multiprocessor.
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hipDeviceAttributeMaxRegistersPerMultiprocessor, ///< 32-bit registers available per block.
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hipDeviceAttributeReservedSharedMemPerBlock, ///< Shared memory reserved by CUDA driver per block.
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hipDeviceAttributeMaxSharedMemoryPerBlock, ///< Maximum shared memory available per block in bytes.
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hipDeviceAttributeSharedMemPerBlockOptin, ///< Maximum shared memory per block usable by special opt in.
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hipDeviceAttributeSharedMemPerMultiprocessor, ///< Shared memory available per multiprocessor.
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hipDeviceAttributeSingleToDoublePrecisionPerfRatio, ///< Cuda only. Performance ratio of single precision to double precision.
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hipDeviceAttributeStreamPrioritiesSupported, ///< Whether to support stream priorities.
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hipDeviceAttributeSurfaceAlignment, ///< Alignment requirement for surfaces
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hipDeviceAttributeTccDriver, ///< Cuda only. Whether device is a Tesla device using TCC driver
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hipDeviceAttributeTextureAlignment, ///< Alignment requirement for textures
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hipDeviceAttributeTexturePitchAlignment, ///< Pitch alignment requirement for 2D texture references bound to pitched memory;
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hipDeviceAttributeTotalConstantMemory, ///< Constant memory size in bytes.
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hipDeviceAttributeTotalGlobalMem, ///< Global memory available on devicice.
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hipDeviceAttributeUnifiedAddressing, ///< Cuda only. An unified address space shared with the host.
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hipDeviceAttributeUnused2, ///< Previously hipDeviceAttributeUuid
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hipDeviceAttributeWarpSize, ///< Warp size in threads.
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hipDeviceAttributeMemoryPoolsSupported, ///< Device supports HIP Stream Ordered Memory Allocator
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hipDeviceAttributeVirtualMemoryManagementSupported, ///< Device supports HIP virtual memory management
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hipDeviceAttributeHostRegisterSupported, ///< Can device support host memory registration via hipHostRegister
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hipDeviceAttributeMemoryPoolSupportedHandleTypes, ///< Supported handle mask for HIP Stream Ordered Memory Allocator
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hipDeviceAttributeEccEnabled =
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hipDeviceAttributeCudaCompatibleBegin, ///< Whether ECC support is enabled.
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hipDeviceAttributeAccessPolicyMaxWindowSize, ///< Cuda only. The maximum size of the window
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///< policy in bytes.
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hipDeviceAttributeAsyncEngineCount, ///< Asynchronous engines number.
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hipDeviceAttributeCanMapHostMemory, ///< Whether host memory can be mapped into device address
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///< space
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hipDeviceAttributeCanUseHostPointerForRegisteredMem, ///< Device can access host registered
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///< memory at the same virtual address as
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///< the CPU
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hipDeviceAttributeClockRate, ///< Peak clock frequency in kilohertz.
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hipDeviceAttributeComputeMode, ///< Compute mode that device is currently in.
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hipDeviceAttributeComputePreemptionSupported, ///< Device supports Compute Preemption.
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hipDeviceAttributeConcurrentKernels, ///< Device can possibly execute multiple kernels
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///< concurrently.
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hipDeviceAttributeConcurrentManagedAccess, ///< Device can coherently access managed memory
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///< concurrently with the CPU
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hipDeviceAttributeCooperativeLaunch, ///< Support cooperative launch
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hipDeviceAttributeCooperativeMultiDeviceLaunch, ///< Support cooperative launch on multiple
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///< devices
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hipDeviceAttributeDeviceOverlap, ///< Device can concurrently copy memory and execute a kernel.
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///< Deprecated. Use instead asyncEngineCount.
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hipDeviceAttributeDirectManagedMemAccessFromHost, ///< Host can directly access managed memory on
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///< the device without migration
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hipDeviceAttributeGlobalL1CacheSupported, ///< Device supports caching globals in L1
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hipDeviceAttributeHostNativeAtomicSupported, ///< Link between the device and the host supports
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///< native atomic operations
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hipDeviceAttributeIntegrated, ///< Device is integrated GPU
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hipDeviceAttributeIsMultiGpuBoard, ///< Multiple GPU devices.
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hipDeviceAttributeKernelExecTimeout, ///< Run time limit for kernels executed on the device
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hipDeviceAttributeL2CacheSize, ///< Size of L2 cache in bytes. 0 if the device doesn't have L2
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///< cache.
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hipDeviceAttributeLocalL1CacheSupported, ///< caching locals in L1 is supported
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hipDeviceAttributeLuid, ///< 8-byte locally unique identifier in 8 bytes. Undefined on TCC and
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///< non-Windows platforms
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hipDeviceAttributeLuidDeviceNodeMask, ///< Luid device node mask. Undefined on TCC and
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///< non-Windows platforms
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hipDeviceAttributeComputeCapabilityMajor, ///< Major compute capability version number.
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hipDeviceAttributeManagedMemory, ///< Device supports allocating managed memory on this system
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hipDeviceAttributeMaxBlocksPerMultiProcessor, ///< Max block size per multiprocessor
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hipDeviceAttributeMaxBlockDimX, ///< Max block size in width.
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hipDeviceAttributeMaxBlockDimY, ///< Max block size in height.
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hipDeviceAttributeMaxBlockDimZ, ///< Max block size in depth.
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hipDeviceAttributeMaxGridDimX, ///< Max grid size in width.
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hipDeviceAttributeMaxGridDimY, ///< Max grid size in height.
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hipDeviceAttributeMaxGridDimZ, ///< Max grid size in depth.
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hipDeviceAttributeMaxSurface1D, ///< Maximum size of 1D surface.
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hipDeviceAttributeMaxSurface1DLayered, ///< Cuda only. Maximum dimensions of 1D layered surface.
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hipDeviceAttributeMaxSurface2D, ///< Maximum dimension (width, height) of 2D surface.
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hipDeviceAttributeMaxSurface2DLayered, ///< Cuda only. Maximum dimensions of 2D layered surface.
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hipDeviceAttributeMaxSurface3D, ///< Maximum dimension (width, height, depth) of 3D surface.
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hipDeviceAttributeMaxSurfaceCubemap, ///< Cuda only. Maximum dimensions of Cubemap surface.
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hipDeviceAttributeMaxSurfaceCubemapLayered, ///< Cuda only. Maximum dimension of Cubemap layered
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///< surface.
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hipDeviceAttributeMaxTexture1DWidth, ///< Maximum size of 1D texture.
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hipDeviceAttributeMaxTexture1DLayered, ///< Maximum dimensions of 1D layered texture.
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hipDeviceAttributeMaxTexture1DLinear, ///< Maximum number of elements allocatable in a 1D linear
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///< texture. Use cudaDeviceGetTexture1DLinearMaxWidth()
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///< instead on Cuda.
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hipDeviceAttributeMaxTexture1DMipmap, ///< Maximum size of 1D mipmapped texture.
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hipDeviceAttributeMaxTexture2DWidth, ///< Maximum dimension width of 2D texture.
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hipDeviceAttributeMaxTexture2DHeight, ///< Maximum dimension hight of 2D texture.
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hipDeviceAttributeMaxTexture2DGather, ///< Maximum dimensions of 2D texture if gather operations
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///< performed.
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hipDeviceAttributeMaxTexture2DLayered, ///< Maximum dimensions of 2D layered texture.
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hipDeviceAttributeMaxTexture2DLinear, ///< Maximum dimensions (width, height, pitch) of 2D
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///< textures bound to pitched memory.
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hipDeviceAttributeMaxTexture2DMipmap, ///< Maximum dimensions of 2D mipmapped texture.
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hipDeviceAttributeMaxTexture3DWidth, ///< Maximum dimension width of 3D texture.
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hipDeviceAttributeMaxTexture3DHeight, ///< Maximum dimension height of 3D texture.
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hipDeviceAttributeMaxTexture3DDepth, ///< Maximum dimension depth of 3D texture.
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hipDeviceAttributeMaxTexture3DAlt, ///< Maximum dimensions of alternate 3D texture.
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hipDeviceAttributeMaxTextureCubemap, ///< Maximum dimensions of Cubemap texture
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hipDeviceAttributeMaxTextureCubemapLayered, ///< Maximum dimensions of Cubemap layered texture.
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hipDeviceAttributeMaxThreadsDim, ///< Maximum dimension of a block
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hipDeviceAttributeMaxThreadsPerBlock, ///< Maximum number of threads per block.
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hipDeviceAttributeMaxThreadsPerMultiProcessor, ///< Maximum resident threads per multiprocessor.
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hipDeviceAttributeMaxPitch, ///< Maximum pitch in bytes allowed by memory copies
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hipDeviceAttributeMemoryBusWidth, ///< Global memory bus width in bits.
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hipDeviceAttributeMemoryClockRate, ///< Peak memory clock frequency in kilohertz.
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hipDeviceAttributeComputeCapabilityMinor, ///< Minor compute capability version number.
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hipDeviceAttributeMultiGpuBoardGroupID, ///< Unique ID of device group on the same multi-GPU
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///< board
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hipDeviceAttributeMultiprocessorCount, ///< Number of multiprocessors on the device.
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hipDeviceAttributeUnused1, ///< Previously hipDeviceAttributeName
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hipDeviceAttributePageableMemoryAccess, ///< Device supports coherently accessing pageable memory
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///< without calling hipHostRegister on it
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hipDeviceAttributePageableMemoryAccessUsesHostPageTables, ///< Device accesses pageable memory
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///< via the host's page tables
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hipDeviceAttributePciBusId, ///< PCI Bus ID.
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hipDeviceAttributePciDeviceId, ///< PCI Device ID. Returns pcie slot id
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hipDeviceAttributePciDomainId, ///< PCI Domain Id.
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hipDeviceAttributePciDomainID =
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hipDeviceAttributePciDomainId, ///< PCI Domain ID, for backward compatibility.
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hipDeviceAttributePersistingL2CacheMaxSize, ///< Maximum l2 persisting lines capacity in bytes
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hipDeviceAttributeMaxRegistersPerBlock, ///< 32-bit registers available to a thread block. This
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///< number is shared by all thread blocks simultaneously
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///< resident on a multiprocessor.
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hipDeviceAttributeMaxRegistersPerMultiprocessor, ///< 32-bit registers available per block.
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hipDeviceAttributeReservedSharedMemPerBlock, ///< Shared memory reserved by CUDA driver per
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///< block.
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hipDeviceAttributeMaxSharedMemoryPerBlock, ///< Maximum shared memory available per block in
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///< bytes.
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hipDeviceAttributeSharedMemPerBlockOptin, ///< Maximum shared memory per block usable by special
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///< opt in.
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hipDeviceAttributeSharedMemPerMultiprocessor, ///< Shared memory available per multiprocessor.
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hipDeviceAttributeSingleToDoublePrecisionPerfRatio, ///< Cuda only. Performance ratio of single
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///< precision to double precision.
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hipDeviceAttributeStreamPrioritiesSupported, ///< Whether to support stream priorities.
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hipDeviceAttributeSurfaceAlignment, ///< Alignment requirement for surfaces
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hipDeviceAttributeTccDriver, ///< Cuda only. Whether device is a Tesla device using TCC driver
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hipDeviceAttributeTextureAlignment, ///< Alignment requirement for textures
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hipDeviceAttributeTexturePitchAlignment, ///< Pitch alignment requirement for 2D texture
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///< references bound to pitched memory;
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hipDeviceAttributeTotalConstantMemory, ///< Constant memory size in bytes.
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hipDeviceAttributeTotalGlobalMem, ///< Global memory available on devicice.
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hipDeviceAttributeUnifiedAddressing, ///< Cuda only. An unified address space shared with the
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///< host.
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hipDeviceAttributeUnused2, ///< Previously hipDeviceAttributeUuid
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hipDeviceAttributeWarpSize, ///< Warp size in threads.
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hipDeviceAttributeMemoryPoolsSupported, ///< Device supports HIP Stream Ordered Memory Allocator
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hipDeviceAttributeVirtualMemoryManagementSupported, ///< Device supports HIP virtual memory
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///< management
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hipDeviceAttributeHostRegisterSupported, ///< Can device support host memory registration via
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///< hipHostRegister
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hipDeviceAttributeMemoryPoolSupportedHandleTypes, ///< Supported handle mask for HIP Stream
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///< Ordered Memory Allocator
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hipDeviceAttributeCudaCompatibleEnd = 9999,
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hipDeviceAttributeAmdSpecificBegin = 10000,
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hipDeviceAttributeCudaCompatibleEnd = 9999,
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hipDeviceAttributeAmdSpecificBegin = 10000,
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hipDeviceAttributeClockInstructionRate = hipDeviceAttributeAmdSpecificBegin, ///< Frequency in khz of the timer used by the device-side "clock*"
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hipDeviceAttributeUnused3, ///< Previously hipDeviceAttributeArch
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hipDeviceAttributeMaxSharedMemoryPerMultiprocessor, ///< Maximum Shared Memory PerMultiprocessor.
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hipDeviceAttributeUnused4, ///< Previously hipDeviceAttributeGcnArch
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hipDeviceAttributeUnused5, ///< Previously hipDeviceAttributeGcnArchName
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hipDeviceAttributeHdpMemFlushCntl, ///< Address of the HDP_MEM_COHERENCY_FLUSH_CNTL register
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hipDeviceAttributeHdpRegFlushCntl, ///< Address of the HDP_REG_COHERENCY_FLUSH_CNTL register
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hipDeviceAttributeCooperativeMultiDeviceUnmatchedFunc, ///< Supports cooperative launch on multiple
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///< devices with unmatched functions
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hipDeviceAttributeCooperativeMultiDeviceUnmatchedGridDim, ///< Supports cooperative launch on multiple
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///< devices with unmatched grid dimensions
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hipDeviceAttributeCooperativeMultiDeviceUnmatchedBlockDim, ///< Supports cooperative launch on multiple
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///< devices with unmatched block dimensions
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hipDeviceAttributeCooperativeMultiDeviceUnmatchedSharedMem, ///< Supports cooperative launch on multiple
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///< devices with unmatched shared memories
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hipDeviceAttributeIsLargeBar, ///< Whether it is LargeBar
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hipDeviceAttributeAsicRevision, ///< Revision of the GPU in this device
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hipDeviceAttributeCanUseStreamWaitValue, ///< '1' if Device supports hipStreamWaitValue32() and
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///< hipStreamWaitValue64(), '0' otherwise.
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hipDeviceAttributeImageSupport, ///< '1' if Device supports image, '0' otherwise.
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hipDeviceAttributePhysicalMultiProcessorCount, ///< All available physical compute
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///< units for the device
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hipDeviceAttributeFineGrainSupport, ///< '1' if Device supports fine grain, '0' otherwise
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hipDeviceAttributeWallClockRate, ///< Constant frequency of wall clock in kilohertz.
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hipDeviceAttributeNumberOfXccs, ///< The number of XCC(s) on the device
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hipDeviceAttributeMaxAvailableVgprsPerThread, ///< Max number of available (directly or indirectly
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///< addressable) VGPRs per thread in DWORDs.
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hipDeviceAttributeClockInstructionRate =
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hipDeviceAttributeAmdSpecificBegin, ///< Frequency in khz of the timer used by the
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///< device-side "clock*"
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hipDeviceAttributeUnused3, ///< Previously hipDeviceAttributeArch
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hipDeviceAttributeMaxSharedMemoryPerMultiprocessor, ///< Maximum Shared Memory PerMultiprocessor.
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hipDeviceAttributeUnused4, ///< Previously hipDeviceAttributeGcnArch
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hipDeviceAttributeUnused5, ///< Previously hipDeviceAttributeGcnArchName
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hipDeviceAttributeHdpMemFlushCntl, ///< Address of the HDP_MEM_COHERENCY_FLUSH_CNTL register
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hipDeviceAttributeHdpRegFlushCntl, ///< Address of the HDP_REG_COHERENCY_FLUSH_CNTL register
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hipDeviceAttributeCooperativeMultiDeviceUnmatchedFunc, ///< Supports cooperative launch on
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///< multiple devices with unmatched
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///< functions
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hipDeviceAttributeCooperativeMultiDeviceUnmatchedGridDim, ///< Supports cooperative launch on
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///< multiple devices with unmatched
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///< grid dimensions
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hipDeviceAttributeCooperativeMultiDeviceUnmatchedBlockDim, ///< Supports cooperative launch on
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///< multiple devices with unmatched
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///< block dimensions
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hipDeviceAttributeCooperativeMultiDeviceUnmatchedSharedMem, ///< Supports cooperative launch on
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///< multiple devices with unmatched
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///< shared memories
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hipDeviceAttributeIsLargeBar, ///< Whether it is LargeBar
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hipDeviceAttributeAsicRevision, ///< Revision of the GPU in this device
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hipDeviceAttributeCanUseStreamWaitValue, ///< '1' if Device supports hipStreamWaitValue32() and
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///< hipStreamWaitValue64(), '0' otherwise.
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hipDeviceAttributeImageSupport, ///< '1' if Device supports image, '0' otherwise.
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hipDeviceAttributePhysicalMultiProcessorCount, ///< All available physical compute
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///< units for the device
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hipDeviceAttributeFineGrainSupport, ///< '1' if Device supports fine grain, '0' otherwise
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hipDeviceAttributeWallClockRate, ///< Constant frequency of wall clock in kilohertz.
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hipDeviceAttributeNumberOfXccs, ///< The number of XCC(s) on the device
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hipDeviceAttributeMaxAvailableVgprsPerThread, ///< Max number of available (directly or
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///< indirectly addressable) VGPRs per thread in
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///< DWORDs.
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hipDeviceAttributePciChipId, ///< GPU Manufacturer device id
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hipDeviceAttributeAmdSpecificEnd = 19999,
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hipDeviceAttributeVendorSpecificBegin = 20000,
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// Extended attributes for vendors
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hipDeviceAttributeAmdSpecificEnd = 19999,
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hipDeviceAttributeVendorSpecificBegin = 20000,
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// Extended attributes for vendors
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} hipDeviceAttribute_t;
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typedef enum hipDriverProcAddressQueryResult {
|
||||
|
||||
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