Guard #ifdef USE_ROCR_20 is added for ROCR_20 device properties (memoryClockRate, memoryBusWidth)

By default isn't defined.
To add ROCR_20 support HIP have to be compiled as follows: make CXX_DEFINES+=-DUSE_ROCR_20


[ROCm/clr commit: d4b15399f5]

projects/clr/hipamd/include/hip_runtime_api.h

@@ -81,8 +81,10 @@ typedef struct hipDeviceProp_t {
     int maxThreadsDim[3];                       ///< Max number of threads in each dimension (XYZ) of a block.
     int maxGridSize[3];                         ///< Max grid dimensions (XYZ).
     int clockRate;                              ///< Max clock frequency of the multiProcessors in khz.
+#ifdef USE_ROCR_20
     int memoryClockRate;                        ///< Max global memory clock frequency in khz.
     int memoryBusWidth;                         ///< Global memory bus width in bits.
+#endif
     size_t totalConstMem;                       ///< Size of shared memory region (in bytes).
     int major;                                  ///< Major compute capability.  On HCC, this is an approximation and features may differ from CUDA CC.  See the arch feature flags for portable ways to query feature caps.
     int minor;                                  ///< Minor compute capability.  On HCC, this is an approximation and features may differ from CUDA CC.  See the arch feature flags for portable ways to query feature caps.
@@ -145,8 +147,10 @@ typedef enum hipDeviceAttribute_t {
     hipDeviceAttributeWarpSize,                             ///< Warp size in threads.
     hipDeviceAttributeMaxRegistersPerBlock,                 ///< Maximum number of 32-bit registers available to a thread block. This number is shared by all thread blocks simultaneously resident on a multiprocessor.
     hipDeviceAttributeClockRate,                            ///< Peak clock frequency in kilohertz.
+#ifdef USE_ROCR_20
     hipDeviceAttributeMemoryClockRate,                      ///< Peak memory clock frequency in kilohertz.
     hipDeviceAttributeMemoryBusWidth,                       ///< Global memory bus width in bits.
+#endif
     hipDeviceAttributeMultiprocessorCount,                  ///< Number of multiprocessors on the device.
     hipDeviceAttributeComputeMode,                          ///< Compute mode that device is currently in.
     hipDeviceAttributeL2CacheSize,                          ///< Size of L2 cache in bytes. 0 if the device doesn't have L2 cache.

projects/clr/hipamd/include/nvcc_detail/hip_runtime_api.h

@@ -242,10 +242,12 @@ inline static hipError_t hipDeviceGetAttribute(int* pi, hipDeviceAttribute_t att
         cdattr = cudaDevAttrMaxRegistersPerBlock; break;
     case hipDeviceAttributeClockRate:
         cdattr = cudaDevAttrClockRate; break;
+#ifdef USE_ROCR_20
     case hipDeviceAttributeMemoryClockRate:
         cdattr = cudaDevAttrMemoryClockRate; break;
     case hipDeviceAttributeMemoryBusWidth:
         cdattr = cudaDevAttrGlobalMemoryBusWidth; break;
+#endif
     case hipDeviceAttributeMultiprocessorCount:
         cdattr = cudaDevAttrMultiProcessorCount; break;
     case hipDeviceAttributeComputeMode:

projects/clr/hipamd/samples/1_Utils/hipInfo/hipInfo.cpp

@@ -80,9 +80,11 @@ void printDeviceProp (int deviceId)
     cout << setw(w1) << "pciDeviceID: " << props.pciDeviceID << endl;
     cout << setw(w1) << "multiProcessorCount: " << props.multiProcessorCount << endl;
     cout << setw(w1) << "maxThreadsPerMultiProcessor: " << props.maxThreadsPerMultiProcessor << endl;
-    cout << setw(w1) << "memoryBusWidth: " << props.memoryBusWidth << endl;
     cout << setw(w1) << "clockRate: " << (float)props.clockRate / 1000.0 << " Mhz" << endl;
+#ifdef USE_ROCR_20
     cout << setw(w1) << "memoryClockRate: " << (float)props.memoryClockRate / 1000.0 << " Mhz" << endl;
+    cout << setw(w1) << "memoryBusWidth: " << props.memoryBusWidth << endl;
+#endif
     cout << setw(w1) << "clockInstructionRate: " << (float)props.clockInstructionRate / 1000.0 << " Mhz" << endl;
     cout << setw(w1) << "totalGlobalMem: " << fixed << setprecision(2) << bytesToGB(props.totalGlobalMem) << " GB" << endl;
     cout << setw(w1) << "maxSharedMemoryPerMultiProcessor: " << fixed << setprecision(2) << bytesToGB(props.maxSharedMemoryPerMultiProcessor) << " GB" << endl;

projects/clr/hipamd/src/hip_hcc.cpp

@@ -343,6 +343,7 @@ hipError_t ihipDevice_t::getProperties(hipDeviceProp_t* prop)
     // Group memory will not be paged out, so, the physical memory size is the total shared memory size, and also equal to the group region size.
     prop->maxSharedMemoryPerMultiProcessor = prop->totalGlobalMem;
 
+#ifdef USE_ROCR_20
     // Get Max memory clock frequency
     err = hsa_region_get_info(*am_region, (hsa_region_info_t)HSA_AMD_REGION_INFO_MAX_CLOCK_FREQUENCY, &prop->memoryClockRate);
     DeviceErrorCheck(err);
@@ -351,6 +352,7 @@ hipError_t ihipDevice_t::getProperties(hipDeviceProp_t* prop)
     // Get global memory bus width in bits
     err = hsa_region_get_info(*am_region, (hsa_region_info_t)HSA_AMD_REGION_INFO_BUS_WIDTH, &prop->memoryBusWidth);
     DeviceErrorCheck(err);
+#endif
 
     // Set feature flags - these are all mandatory for HIP on HCC path:
     // Some features are under-development and future revs may support flags that are currently 0.
@@ -818,10 +820,12 @@ hipError_t hipDeviceGetAttribute(int* pi, hipDeviceAttribute_t attr, int device)
             *pi = prop->regsPerBlock; break;
         case hipDeviceAttributeClockRate:
             *pi = prop->clockRate; break;
+#ifdef USE_ROCR_20
         case hipDeviceAttributeMemoryClockRate:
             *pi = prop->memoryClockRate; break;
         case hipDeviceAttributeMemoryBusWidth:
             *pi = prop->memoryBusWidth; break;
+#endif
         case hipDeviceAttributeMultiprocessorCount:
             *pi = prop->multiProcessorCount; break;
         case hipDeviceAttributeComputeMode:

projects/clr/hipamd/tests/src/hipGetDeviceAttribute.cpp

@@ -67,8 +67,10 @@ int main(int argc, char *argv[])
     CHECK(test_hipDeviceGetAttribute(deviceId, hipDeviceAttributeWarpSize, props.warpSize));
     CHECK(test_hipDeviceGetAttribute(deviceId, hipDeviceAttributeMaxRegistersPerBlock, props.regsPerBlock));
     CHECK(test_hipDeviceGetAttribute(deviceId, hipDeviceAttributeClockRate, props.clockRate));
+#ifdef USE_ROCR_20
     CHECK(test_hipDeviceGetAttribute(deviceId, hipDeviceAttributeMemoryClockRate, props.memoryClockRate));
     CHECK(test_hipDeviceGetAttribute(deviceId, hipDeviceAttributeMemoryBusWidth, props.memoryBusWidth));
+#endif
     CHECK(test_hipDeviceGetAttribute(deviceId, hipDeviceAttributeMultiprocessorCount, props.multiProcessorCount));
     CHECK(test_hipDeviceGetAttribute(deviceId, hipDeviceAttributeComputeMode, props.computeMode));
     CHECK(test_hipDeviceGetAttribute(deviceId, hipDeviceAttributeL2CacheSize, props.l2CacheSize));