Remove gfx802 page size workaround on gfx803

All tonga page size alignment is done in the memory management
functions in fmm.c. All other code only specifies the minimum
alignment it needs and lets fmm.c handle the HW-specific
alignment.

Clean up aligned-exec memory allocation in queue.c to remove
hard-coded TONGA_PAGE_SIZE alignments and remove code duplication.
Make sure alignments are consistent between allocate and free.

Change-Id: Ia8923448173d1cef315af24cebff12adef385cb0

src/events.c

@@ -76,7 +76,7 @@ hsaKmtCreateEvent(
 	/* dGPU code */
 	if (is_dgpu && events_page == NULL) {
 		events_page = allocate_exec_aligned_memory_gpu(KFD_SIGNAL_EVENT_LIMIT * 8,
-			TONGA_PAGE_SIZE,
+			PAGE_SIZE,
 			args.node_id, true);
 		if (!events_page) {
 			return HSAKMT_STATUS_ERROR;

src/fmm.c

@@ -1067,17 +1067,23 @@ HSAKMT_STATUS fmm_init_process_apertures(unsigned int NumNodes)
 			uintptr_t alt_base;
 			uint64_t alt_size;
 			int err;
+			uint64_t vm_alignment = PAGE_SIZE;
+
+			if (gpu_mem[gpu_mem_id].device_id >= 0x6920 &&
+			    gpu_mem[gpu_mem_id].device_id <= 0x6939)
+				/* Workaround for Tonga GPUVM HW bug */
+				vm_alignment = TONGA_PAGE_SIZE;
 
 			dgpu_mem_init(gpu_mem_id, &svm.dgpu_aperture.base,
 					&svm.dgpu_aperture.limit);
 
 			/* Set proper alignment for scratch backing aperture */
-			gpu_mem[gpu_mem_id].scratch_physical.align = TONGA_PAGE_SIZE;
+			gpu_mem[gpu_mem_id].scratch_physical.align = vm_alignment;
 
 			/* Set kernel process dgpu aperture. */
 			set_dgpu_aperture(i, (uint64_t)svm.dgpu_aperture.base,
 				(uint64_t)svm.dgpu_aperture.limit);
-			svm.dgpu_aperture.align = TONGA_PAGE_SIZE;
+			svm.dgpu_aperture.align = vm_alignment;
 
 			/* Place GPUVM aperture after dGPU aperture
 				* (FK: I think this is broken but leaving it for now) */
@@ -1086,7 +1092,7 @@ HSAKMT_STATUS fmm_init_process_apertures(unsigned int NumNodes)
 					svm.dgpu_aperture.base);
 			gpu_mem[gpu_mem_id].gpuvm_aperture.limit = VOID_PTR_ADD(gpu_mem[gpu_mem_id].gpuvm_aperture.limit,
 				(unsigned long)gpu_mem[gpu_mem_id].gpuvm_aperture.base);
-			gpu_mem[gpu_mem_id].gpuvm_aperture.align = TONGA_PAGE_SIZE;
+			gpu_mem[gpu_mem_id].gpuvm_aperture.align = vm_alignment;
 
 			/* Use the first 1/4 of the dGPU aperture as
 				* alternate aperture for coherent access.
@@ -1107,7 +1113,7 @@ HSAKMT_STATUS fmm_init_process_apertures(unsigned int NumNodes)
 				fprintf(stderr, "Error! Failed to set alt aperture for GPU [0x%x]\n", gpu_mem[gpu_mem_id].gpu_id);
 				ret = HSAKMT_STATUS_ERROR;
 			}
-			svm.dgpu_alt_aperture.align = TONGA_PAGE_SIZE;
+			svm.dgpu_alt_aperture.align = vm_alignment;
 		}
 	}
 

src/queues.c

@@ -135,7 +135,7 @@ struct queue
 	uint32_t rptr;
 	void *eop_buffer;
 	void *ctx_save_restore;
-	enum asic_family_type type;
+	const struct device_info *dev_info;
 };
 
 struct process_doorbells
@@ -266,20 +266,15 @@ static void* allocate_exec_aligned_memory(uint32_t size,
 					uint32_t NodeId)
 {
 	if (IS_DGPU(type))
-		return allocate_exec_aligned_memory_gpu(size, TONGA_PAGE_SIZE, NodeId, false);
+		return allocate_exec_aligned_memory_gpu(size, align, NodeId, false);
 	return allocate_exec_aligned_memory_cpu(size, align);
 }
 
-static void release_exec_aligned_memory_gpu(void *addr, uint32_t size)
-{
-	if (hsaKmtUnmapMemoryToGPU(addr) == HSAKMT_STATUS_SUCCESS)
-		hsaKmtFreeMemory(addr, (HSAuint64)size);
-}
-
-static void release_exec_aligned_memory(void *addr, uint32_t size, enum asic_family_type type)
+static void free_exec_aligned_memory(void *addr, uint32_t size, uint32_t align,
+				     enum asic_family_type type)
 {
 	if (IS_DGPU(type))
-		release_exec_aligned_memory_gpu(addr, TONGA_PAGE_SIZE);
+		free_exec_aligned_memory_gpu(addr, size, align);
 	else
 		free(addr);
 }
@@ -288,30 +283,31 @@ static void free_queue_gpu(struct queue *q)
 {
 	if (q->eop_buffer) {
 		hsaKmtUnmapMemoryToGPU(q->eop_buffer);
-		hsaKmtFreeMemory(q->eop_buffer, TONGA_PAGE_SIZE);
+		hsaKmtFreeMemory(q->eop_buffer, q->dev_info->eop_buffer_size);
 	}
 	if (q->ctx_save_restore) {
 		hsaKmtUnmapMemoryToGPU(q->ctx_save_restore);
-		hsaKmtFreeMemory(q->ctx_save_restore, TONGA_PAGE_SIZE);
+		hsaKmtFreeMemory(q->ctx_save_restore, q->dev_info->ctx_save_restore_size);
 	}
-	release_exec_aligned_memory((void *)q, sizeof(*q), q->type);
+	free_exec_aligned_memory((void *)q, sizeof(*q), PAGE_SIZE, q->dev_info->asic_family);
 }
 
-static void free_queue(struct queue *q, enum asic_family_type type)
+static void free_queue(struct queue *q)
 {
-	if (IS_DGPU(type))
+	if (IS_DGPU(q->dev_info->asic_family))
 		return free_queue_gpu(q);
 	return free_queue_cpu(q);
 }
 
-static int handle_concrete_asic(struct device_info *dev_info, struct queue *q,
-								struct kfd_ioctl_create_queue_args *args,
-								uint32_t NodeId)
+static int handle_concrete_asic(struct queue *q,
+				struct kfd_ioctl_create_queue_args *args,
+				uint32_t NodeId)
 {
+	const struct device_info *dev_info = q->dev_info;
 	if (dev_info) {
 		if (dev_info->eop_buffer_size > 0) {
 			q->eop_buffer =
-					allocate_exec_aligned_memory(dev_info->eop_buffer_size,
+					allocate_exec_aligned_memory(q->dev_info->eop_buffer_size,
 					PAGE_SIZE,
 					dev_info->asic_family,
 					NodeId);
@@ -380,11 +376,11 @@ hsaKmtCreateQueue(
 
 	args.gpu_id = gpu_id;
 
-	q->type = dev_info->asic_family;
+	q->dev_info = dev_info;
 
-	err = handle_concrete_asic(dev_info, q, &args, NodeId);
+	err = handle_concrete_asic(q, &args, NodeId);
 	if (err != HSAKMT_STATUS_SUCCESS) {
-		free_queue(q, dev_info->asic_family);
+		free_queue(q);
 		return err;
 	}
 
@@ -393,7 +389,7 @@ hsaKmtCreateQueue(
 	case HSA_QUEUE_COMPUTE: args.queue_type = KFD_IOC_QUEUE_TYPE_COMPUTE; break;
 	case HSA_QUEUE_SDMA: args.queue_type = KFD_IOC_QUEUE_TYPE_SDMA; break;
 	case HSA_QUEUE_COMPUTE_AQL: args.queue_type = KFD_IOC_QUEUE_TYPE_COMPUTE_AQL; break;
-	default: free_queue(q, dev_info->asic_family); return HSAKMT_STATUS_INVALID_PARAMETER;
+	default: free_queue(q); return HSAKMT_STATUS_INVALID_PARAMETER;
 	}
 
 	if (Type != HSA_QUEUE_COMPUTE_AQL)
@@ -413,7 +409,7 @@ hsaKmtCreateQueue(
 
 	if (err == -1)
 	{
-		free_queue(q, dev_info->asic_family);
+		free_queue(q);
 		return HSAKMT_STATUS_ERROR;
 	}
 
@@ -428,7 +424,7 @@ hsaKmtCreateQueue(
 		if (ptr == MAP_FAILED) {
 			pthread_mutex_unlock(&doorbells[NodeId].doorbells_mutex);
 			hsaKmtDestroyQueue(q->queue_id);
-			free_queue(q, dev_info->asic_family);
+			free_queue(q);
 			return HSAKMT_STATUS_ERROR;
 		}
 
@@ -504,7 +500,7 @@ hsaKmtDestroyQueue(
 	}
 	else
 	{
-		free_queue(q, q->type);
+		free_queue(q);
 		return HSAKMT_STATUS_SUCCESS;
 	}
 }