Make data alignment requirements matching ISA manual
From https://developer.amd.com/wp-content/resources/Vega_Shader_ISA.pdf
8.1.7. Alignment
For Dword or larger reads or writes, the two LSBs of the byte-address
are ignored, thus forcing Dword alignment.
[ROCm/rccl commit: 4751992231]
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@@ -343,8 +343,12 @@ __device__ void ReduceCopy128bMulti( const int w, const int nw, const int t,
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}
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}
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#if defined(__HIP_PLATFORM_HCC__) || defined(__HCC__) || defined(__HIPCC__)
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template <typename T>
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__device__ int ptrAlign128(T* ptr) { return (uint64_t)ptr % alignof(int32_t); }
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#else
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__device__ int ptrAlign128(T* ptr) { return (uint64_t)ptr % alignof(Pack128); }
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#endif
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// Try to limit consecutive load/stores to 8.
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// Use UNROLL 8 when we have a single source and a single destination, 4 otherwise
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@@ -366,9 +370,15 @@ __device__ void ReduceOrCopyMulti(const int tid, const int nthreads,
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for (int i=0; i<MINDSTS; i++) alignDiff |= (align ^ ptrAlign128(dsts[i]));
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for (int i=MINDSTS; i<MAXDSTS && i<ndsts; i++) alignDiff |= (align ^ ptrAlign128(dsts[i]));
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#if defined(__HIP_PLATFORM_HCC__) || defined(__HCC__) || defined(__HIPCC__)
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int Npreamble = alignDiff ? Nrem :
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N < alignof(int32_t) ? N :
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(alignof(int32_t) - align) % alignof(int32_t);
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#else
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int Npreamble = alignDiff ? Nrem :
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N < alignof(Pack128) ? N :
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(alignof(Pack128) - align) % alignof(Pack128);
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#endif
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// stage 1: preamble: handle any elements up to the point of everything coming
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// into alignment
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